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Staff IC Design Engineer

Staff IC Design Engineer

Vmware

3 - 7 years

13 - 17 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

jtag simulation atpg digital design vhdl coding rtl design ic design axi modelsim design rtl coding ahb perl system verilog tcl synthesis sta asic verification c cdc ovm scan insertion rtl uvm verilog asic design gls lint dft spyglass mbist ncsim

Work Mode

Work from Office

Job Type

Full Time

Job Description

1. RTL development and Verification for Digital subsystems, Memory Subsystems including BIST.

2. DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems with Tessent/Embedded MBIST

3. MBIST, ATPG, RSQ Verification and sign-off.

4. Formal verification, Cross Clock Domain checks, Power/Timing sign off

5. Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently.

Skillset:

1. Hands on Experience with RTL, Synthesis,

2. Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs

3. Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the DFT signoff.

4. Familiarity with Spyglass, LEC, CDC, and Synthesis tools DC Ultra, Fusion Compiler.

5. Familiarity with GLS, simulation, UVM, OVM methodologies is a big plus

6. Proficiency with Verilog NC, Verilog XL tools

7. Strong fundamentals in digital design and Coding/Verifying complex RTL subsystems

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Staff IC Design Engineer