69 Spyglass Jobs

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NAMinimum 15 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various teams to ensure that application requirements are met, overseeing the development process, and providing guidance to team members. You will also engag...

About Marvell Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Data Center Engineering Business Unit closely collaborates with strategic customers in the development of adv...

About The Role About The Role Should be good in Integration of SOC & RTL coding. Should be aware of SOC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog,Micro-architecture, R TL coding,CDC, Lint, Synthesis, STA,IP development , SoC integration,VCLP,scripting -Perl,Python,Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow,ARM Coretex,DMA, DDR, SPI, I2C, UART,AHB/AXI/APB,Ethernet, USB, PCIe,Mipi CSI/DSI, LPDDR. Education B.E/B.Tech/ Any Engineering.

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience 5-10 years with Masters (6 to 10 years with Bachelors) Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with...

You have an exciting opportunity with Tessolve Semiconductor in Bangalore for the roles of RTL Design Engineer and Design Verification Engineer. For the position of RTL ASIC Engineer, you should have at least 7 years of work experience in ASIC/IP Design with expertise in Logic design and RTL design. Your responsibilities will involve IP design and integration, along with proficiency in tools such as Lint and CDC for ASIC development. Knowledge of Synthesis and understanding of timing concepts would be advantageous. Additionally, familiarity with AMBA protocols like AXI, AHB, APB, and SoC clocking/reset architecture is preferred. As a Design Verification Engineer, you are required to have 5 t...

About The Role Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NA Minimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your day will involve overseeing the application development process, coordinating with team members, and ensuring project milestones are met.Roles & Responsibilities:Bachelors degree in computer science, El...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

You should have a minimum of 4 years of experience in the field. You must be proficient in using Synthesis and netlist validation tools, particularly LEC and Spyglass checks, as well as scan insertion and DRC debug. It is essential to be well-versed in both Synopsys and Mentor Graphics DFT flows. Your expertise should also include experience in Scan Compression for Hierarchical and Modular EDT, ATPG, and Coverage debug, along with the ability to manage multiple clock domains and familiarity with the OCC flow. You should have practical experience in BIST and BISR insertion and Validation with SMS and MBIST Architect. Hands-on experience with JTAG, IJTAG, and SSN is required. You should be fam...

You are a highly experienced RTL Design Lead responsible for driving the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. Your role involves leading RTL design activities for complex IPs or SoC sub-systems and collaborating with various teams to ensure successful integration and tapeout. You will be required to mentor junior designers, support silicon bring-up, and debug as needed. To excel in this role, you must have a proven track record of delivering IP or SoC designs from spec to GDSII. Your expertise should include micro-architecture development, pipelining, clock-domain crossing, and a good understanding of the ASIC design flow. Hands-on experience with A...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role in the AECG ASIC organization ...

Company Description Colliers (NASDAQ, TSX: CIGI) is a leading global diversified professional services company, specializing in commercial real estate services, engineering consultancy and investment management With operations in 70 countries, our 22,000 enterprising professionals provide exceptional service and expert advice to clients For nearly 30 years, our experienced leadership with substantial inside ownership has consistently delivered approximately 20% compound annual investment returns for shareholders With annual revenues exceeding $4 5 billion and $99 billion of assets under management, Colliers maximizes the potential of property, infrastructure and real assets to accelerate the...

Job Description for RTL We are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge. Key Responsibilities: Integrate IP blocks into SoC at RTL level Perform RTL coding and micro-architecture design (Verilog/VHDL) Run and debug SpyGlass Lint, CDC, and DC Synthesis flows Conduct STA and design rule checks Develop automation scripts (Perl, Python, Shell, Tcl) Collaborate with verification and physical design teams Work on VCLSP and SoC-level integration flows Primary Skills: RTL Design: Verilog, VHDL, Micro-architecture ...

Job Description for RTL We are hiring a SoC Integration Engineer with strong expertise in RTL coding and SoC integration flows. The ideal candidate should have hands-on experience with SpyGlass Lint, CDC, DC Synthesis, and VCLSP, along with scripting knowledge. Key Responsibilities: Integrate IP blocks into SoC at RTL level Perform RTL coding and micro-architecture design (Verilog/VHDL) Run and debug SpyGlass Lint, CDC, and DC Synthesis flows Conduct STA and design rule checks Develop automation scripts (Perl, Python, Shell, Tcl) Collaborate with verification and physical design teams Work on VCLSP and SoC-level integration flows Primary Skills: RTL Design: Verilog, VHDL, Micro-architecture ...

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for l...

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for l...

Qualcomm India Private Limited is seeking a talented individual to join their Wireless IP team for the role of designing and developing cutting-edge RTL for next-generation cellular and Wi-Fi modem IPs used in mobile, wearable, and IoT platforms. In this role, you will be responsible for working on high-performance, low-power digital designs throughout the full VLSI development cycle, from architecture and micro-architecture to RTL implementation and SoC integration. You will have the opportunity to collaborate with global teams and contribute to market-leading wireless solutions. Your key responsibilities will include designing and implementing RTL for wireless modem IPs and SoC subsystems ...

Alternate Job Titles: Digital IP Verification Engineer IP Methodology Engineer ASIC Methodology Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a strong background in electronics or electrical engineering, holding a Bachelor&aposs or Master&aposs degree from a reputed university. Wi...

We are seeking an experienced RTL Design Engineer to be a part of our advanced ASIC/SoC development team in Bengaluru. As an RTL Design Engineer, you will be responsible for developing high-quality, synthesizable RTL code using Verilog/SystemVerilog and integrating complex IPs and subsystems into high-performance SoCs. Collaboration with system architects, contribution to micro-architecture, and ensuring design quality through checks like Lint, CDC, and Synthesis will be key aspects of this role. Your responsibilities will include leading SoC-level integration activities, providing technical guidance in design reviews, and interfacing with cross-functional teams for smooth bring-up and signo...

You are a highly experienced ASIC RTL Design Architect responsible for leading the design and verification of cutting-edge SoCs and high-speed digital IPs. With over 10 years of experience in ASIC/FPGA design, your expertise lies in RTL using Verilog/SystemVerilog, Lint, CDC, and Spyglass-based design verification methodologies. Your main responsibilities include leading RTL design and micro-architecture for high-performance ASIC SoCs, ensuring compliance with Lint, CDC, and SDC constraints using Spyglass or equivalent tools, driving design optimization and timing closure, as well as collaborating with cross-functional teams such as Design Verification, DFT, Physical Design, and Software tea...

Minimum qualifications: Bachelor's or Master's degree or equivalent practical experience, 5 years of experience with Design for Testability/Design for Debugging (DFT/DFD) flows and methodologies, Experience in developing DFT specifications and DFT architecture, Experience in fault modeling, test standards and industry DFT/DFD/Automatic Test Pattern Generation (ATPG) tools with Application-Specific Integrated Circuit (ASIC) DFT, synthesis, simulation and verification flow, Preferred qualifications: Experience with DFT for a subsystem with multiple physical partitions, Experience with Internal JTAG (IJTAG) ICL, Procedural Description Language (PDL) terminology, ICL extraction, Instrument Conne...

Job Title: Lead RTL Design Engineer Microarchitecture (10+ Years) Company: ACL Digital Experience: 10 to 15 Years Location: [Insert Location or Remote/Hybrid] Job Type: Full Time Contact Email: prabhu.p@acldigital.com Contact Number: +91-8754387484 Job Description: ACL Digital is hiring a Lead RTL Design Engineer with strong expertise in microarchitecture and RTL design . This is a leadership role ideal for professionals with 10+ years of experience in digital design, ASIC/SoC development, and hands-on RTL coding. Key Responsibilities: Own microarchitecture and RTL development of complex IPs or subsystems. Lead block-level design from spec to synthesis and signoff. Drive RTL design using Ver...

Strong on Digital Design, SV, UVM. Hands-on experience in any of the DV protocols like PCIe, USB 3.0, DDR 3/4/5, AMBA, Ethernet (10G/100G), SATA, and MIPI (CSI/DSI), UFS, CXL Also Hiring PD, RTL, DFT Apply& Share resume to mansoor@hisoltech.com

Qualcomm India Private Limited is seeking a Hardware Engineer with expertise in complex high-performance RTL design, particularly on DSP or processor based sub-systems. You should be proficient in hardware design using Verilog, System Verilog, or VHDL and have knowledge of on-chip bus interface protocols like AXI, APB, and AHB. Experience in model development (SystemC, or C++), RTL to gates synthesis (Synopsys DCG or Cadence Genus), design rule and CDC checking (SVA assertions, Spyglass, 0-in), and working on high-performance low power RTL design is essential. Familiarity with scripting languages such as PERL, Python, TCL, C, etc., is also required. As a Hardware Engineer at Qualcomm, your r...

As an ASIC Design Engineer at our Bangalore location, you will join a dynamic team focused on delivering high-speed ASICs for complex systems. Your role will involve defining and architecting high-performance blocks, conducting micro-architecture and logic design, collaborating with verification and physical design teams, and ensuring maximum throughput with minimal power consumption. Your expertise in Verilog RTL coding, knowledge of tools like Synopsys Design Compiler and Verplex LEC, experience in networking ASIC design, familiarity with memory subsystems, clock synchronization, and serial interfaces, as well as strong problem-solving and debugging skills will be essential. Effective comm...