RTL Design Lead / Manager

As an experienced RTL Design Lead, you will be responsible for driving the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. Your key responsibilities will include: - Leading RTL design activities for complex IPs or SoC sub-systems. - Working closely with architects to translate high-level specifications into micro-architecture and RTL. - Driving design reviews, coding standards, and technical quality. - Defining and implementing RTL design methodologies and flows. - Collaborating with verification, DFT, synthesis, and backend teams to ensure successful integration and tapeout. - Guiding and mentoring junior designers in the team. - Supporting silicon bring-up and debug as needed. Your required skills for this role include: - Proven track record of delivering IP or SoC designs from spec to GDSII. - Experience in micro-architecture development, pipelining, and clock-domain crossing. - Good understanding of ASIC design flow, including synthesis, STA, and linting. - Hands-on experience with AMBA protocols (AXI/APB/AHB) and other standard interfaces. - Strong debugging and problem-solving skills. - Familiarity with low-power design techniques is a plus. In addition to the required skills, the following preferred skills would be beneficial: - Exposure to high-speed protocols (PCIe, USB, Ethernet, etc.). - Familiarity with scripting languages (Python, Perl, TCL) to automate design tasks. - Experience with tools like Synopsys DC, Spyglass, Verdi, VCS, etc. - Prior experience in leading and mentoring a small team. You should hold a Bachelors or Masters degree in Electronics/Electrical Engineering or a related field to be considered for this position.,