25 Amba Protocols Jobs

We are seeking a Director of Engineering (Design Verification) to oversee and expand our DV practice. With over 15 years of experience in SoC/ASIC verification, exceptional technical expertise, demonstrated leadership abilities, and the talent to motivate high-performing teams, you will play a pivotal role in our organization. Responsibilities include leading end-to-end SoC/ASIC Design Verification programs, establishing DV methodologies, flows, and best practices (UVM, SV, C-based), delivering technical leadership and practical problem-solving, managing and guiding top-performing engineering teams, collaborating with cross-functional teams for project success, driving customer engagement, ensuring delivery excellence, and supporting business development through pre-sales and technical discussions. The ideal candidate will possess a minimum of 15 years of semiconductor design verification experience, including at least 5 years in a leadership capacity. Proficiency in SystemVerilog, UVM, C/C++ co-simulation, and testbench architecture is essential. In-depth knowledge of ARM architecture, AMBA protocols (AXI, CHI, APB), high-speed interfaces (PCIe, DDR, Ethernet), Formal Verification, GLS, coverage closure, GLS methodology/flows, VIP Integration & Sequence usage, C-SV co-simulation, and Python scripting is required. Strong skills in people management, mentoring, and stakeholder engagement are also critical. Joining Seminovaa offers you the chance to be part of a rapidly growing semiconductor services company, led by its founder. You will have the opportunity to shape and lead the Design Verification practice, working on cutting-edge projects in AI, Automotive, Networking, and High-Performance Computing. Our collaborative, innovation-driven culture provides global exposure and a dynamic work environment. Apply now by sending your profile to careers@seminovaa.com. #SemiconductorJobs #VLSICareers #ChipDesign #NowHiring #Seminovaa #DFTengineers #Verificationengineers #PhysicalDesignEngineers,

This role is for a SoC Verification Engineer to join a verification team with the primary goal of achieving first-pass silicon success. The ideal candidate will have extensive experience in the verification of complex Systems-on-Chip (SoCs), and will be responsible for driving verification strategies, developing test environments, and ensuring design quality through rigorous analysis. Responsibilities Drive the overall verification strategy and write detailed Test Plans . Develop comprehensive Test Benches and Test cases using industry-standard tools, methodologies, and High-Level Verification Languages (HVLS). Analyze Code Coverage, Functional Coverage, and Assertions to ensure thorough verification. Actively debug and resolve complex verification issues to ensure a successful first-pass silicon. Skills Solid experience in the verification of complex SoCs . Expertise in SoC Verification using C and Verilog . Expertise in AMBA protocols like AXI/AHB/APB and experience working with ARM Processors . Strong skills in Test Plan creation and verification technologies like Code Coverage . Good knowledge of gate-level simulation and scripting languages like Perl and TCL . Excellent debugging and problem-solving skills . Knowledge of SV and UVM is a plus. Verification experience in complex protocols like USB, PCIe, DDR, or UFS is highly desirable. Qualifications A B.Tech. or M.Tech. degree with at least 6 years of solid experience in the verification of complex SoCs. Immediate availability is preferred.

This role is for an IP Verification Engineer to join an IP verification team, dedicated to achieving first-pass silicon success. The ideal candidate will have solid experience in the verification of complex IPs or SoCs, and will be responsible for driving verification strategies, developing test environments, and ensuring design quality through rigorous analysis. Responsibilities Drive the overall verification strategy and write detailed Test Plans . Develop comprehensive Test Benches and Test cases using industry-standard tools, methodologies, and High-Level Verification Languages (HVLS). Analyze Code Coverage, Functional Coverage, and Assertions to ensure thorough verification. Actively debug and resolve complex verification issues to ensure a successful first-pass silicon. Skills Solid experience in the verification of complex IPs or SoCs . Expertise in IP Verification using SV/UVM . Expertise in AMBA protocols like AXI/AHB/APB. Strong skills in Test Plan creation and verification technologies. Good knowledge of gate-level simulation and scripting languages like Perl and TCL . Excellent debugging and problem-solving skills . Verification experience in complex protocols like USB, PCIe, or DDR is highly desirable. Qualifications A B.Tech or M.Tech degree with relevant experience. Immediate availability is preferred.

This role is for an ASIC Verification Engineer to join an IP or SoC verification team, with the ultimate goal of achieving first-pass silicon success. The ideal candidate will have solid experience in the verification of complex IPs or SoCs, and will be responsible for driving verification strategies, developing test environments, and ensuring design quality through rigorous analysis. Responsibilities Drive the overall verification strategy and write detailed Test Plans . Develop comprehensive Test Benches and Test cases . Analyze Code Coverage, Functional Coverage, and Assertions to ensure thorough verification. Utilize industry-standard tools, methodologies, and High-Level Verification Languages (HVLS). Skills Expertise in SoC Verification using C and SV/UVM or IP Verification using SV/UVM . Expertise in AMBA protocols like AXI/AHB/APB and experience working with ARM Processors . Expertise in Test Plan creation and verification technologies. Good knowledge of gate-level simulation and scripting languages like Perl and TCL . Excellent debugging and problem-solving skills . Experience in Low Power Verification is a plus. Verification experience in complex protocols like USB, PCIe, or DDR is highly desirable. Qualifications A B.Tech or M.Tech degree with solid experience in the verification of complex IPs or SoCs.

Qualcomm India Private Limited is seeking a candidate with a minimum of 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV. The ideal candidate should have experience in Logic design/micro-architecture/RTL coding, along with hands-on experience in designing and integrating complex multi clock domain blocks. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols like AXI, AHB, APB, clocking/reset/debug architecture are necessary. Experience in Multi Clock designs and Asynchronous interface is a must, as well as familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime. Collaboration with Design verification and validation teams for pre/post Silicon debug is expected, and hands-on experience in Low power design is preferable. Additionally, experience in Synthesis and understanding of timing concepts for ASIC is essential. The minimum qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 3+ years of Hardware Engineering or related work experience. Alternatively, a Master's degree in the relevant fields with 2+ years of experience or a PhD with 1+ year of experience would also be considered. Qualcomm is an equal opportunity employer committed to providing accessibility to individuals with disabilities throughout the application/hiring process. Reasonable accommodations can be requested by emailing disability-accommodations@qualcomm.com or calling Qualcomm's toll-free number. Employees are expected to adhere to all applicable policies and procedures, including security and confidentiality requirements. Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use the site or submit profiles, applications, or resumes on behalf of individuals. Unsolicited submissions from agencies will not be accepted, and Qualcomm does not bear responsibility for any fees related to such submissions. For more information about this role, please contact Qualcomm Careers.,

Qualcomm India Private Limited is seeking a skilled ASIC IP Cores Design Engineer to join their Hardware Engineering team. As a part of this role, you will be expected to work as a strong designer on peripheral IPs, providing design and microarchitecture solutions independently. Additionally, you will play a key role in guiding and mentoring junior team members and collaborating with external teams to address cross-team dependencies. Taking complete ownership of projects and driving them forward will be a significant part of your responsibilities. The ability to provide schedule estimates will be advantageous, along with prior experience in people management. To excel in this role, you should possess 3-6 years of work experience in ASIC IP cores design, with a Bachelor's degree in Electrical Engineering being required and a Master's degree being preferred. Knowledge of AMBA protocols such as AXI, AHB, and APB, as well as familiarity with SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and Ethernet, is highly desirable. Working closely with SoC verification and validation teams for pre and post-silicon debug will be part of your responsibilities. Proficiency in low power design, multi-clock designs, and asynchronous interfaces is a must. Experience in using ASIC development tools like Lint, CDC, Design Compiler, and Primetime is essential, along with an understanding of constraint development and timing closure. Proficiency in Synthesis and timing concepts will be an added advantage. You should have strong microarchitecting skills in RTL design from high-level design specifications. Excellent problem-solving abilities, effective communication, and teamwork skills are key requirements for this role. Being self-driven and capable of working with minimal supervision is crucial. Proficiency in System Verilog, Verilog, C/C++, Perl, and Python will be beneficial. The ability to lead a small design team will also be an advantage. A minimum qualification of a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 2+ years of Hardware Engineering experience, a Master's degree with 1+ year of relevant experience, or a PhD in a related field is required. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If you require accommodations during the application/hiring process, please contact Qualcomm for support. Qualcomm expects its employees to adhere to all applicable policies and procedures, including those related to security and confidentiality. This is an exciting opportunity for a skilled engineer to join a dynamic team at Qualcomm. If you meet the qualifications and are excited about the prospect of contributing to cutting-edge projects, we encourage you to apply.,

Are you looking for a unique opportunity to be a part of something great Want to join a 20,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchips nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and its won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Create System and FPGA designs to exercise all the use models targeted for each product mimicking end applications in a customer setting. Write system and product level validation plans for new and existing silicon products and projects; execute per plan, record and communicate results. FPGA prototyping and emulation. Understanding spec., writing emulation plan and executing per plan. Record and communicate results. Understand hardware architectures, use models and system level design implementations required to utilize the silicon features. Be an effective contributor in a cross-functional team-oriented environment. Write high-quality code in Verilog, VHDL, and C code for embedded processors. Maintain existing code. Learn new system designs and validation methodologies. Understand FPGA architectures. Be conversant with on-chip debug tool. Requirements/Qualifications: - Excellent verbal and written communication skills in English - 5+ Years experience in Design with RTL coding in Verilog and VHDL and Verification of RTL - Possess an in-depth understanding of hardware architectures, system-level IC design implementation, knowledge of how to create end-use scenarios - Optimizing code for FPGA architectures - Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools - Basic knowledge of embedded processors such as ARM Cortex-M3 or RISC and familiarity with AMBA protocols APB, AHB, AXI, ACE - Working knowledge of embedded software C/C++ is also a plus - Strong technical background in FPGA prototype emulation, and debug - Strong technical background in silicon validation, failure analysis, and debug - Excellent Board level debug capabilities in a lab environment: hands-on troubleshooting skills for digital logic and analog circuit on PCBs using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Idenitfy, Xilinx Chipscope, Altera Signalscope, Lattice Reveal - Design with RTL coding in Verilog and VHDL is a must - Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools - Hands-on systems level design and debug experience with at least two of the following high-speed serial communications protocols: PCIe Gen1/2/3, Interlaken (10.3125 Gbps), CPRI (614.4Mbps - 12.672 Gbps), SGMII or QSGMII, XAUI or HiGig/+/II, 10GBASE-R/-KR, Serial Rapid IO Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.,

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This will involve working on a variety of components including yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to bring cutting-edge products to the market. Collaboration with cross-functional teams is a key aspect of this role to ensure that solutions meet performance requirements. The ideal candidate should have a minimum of 4 to 6 years of work experience in ASIC RTL Design. Experience in Logic design, micro-architecture, and RTL coding is essential. Hands-on experience with the design and integration of complex multi clock domain blocks is a must. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols such as AXI, AHB, APB, clocking/reset/debug architecture are also required. Candidates should have experience in Multi Clock designs and Asynchronous interface. Familiarity with ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. An understanding of Automotive System Designs, Functional Safety, Memory controller designs, and microprocessors would be advantageous. The role involves close collaboration with Design verification and validation teams for pre/post Silicon debug. Prior experience in Low power design is preferred. Additionally, expertise in Synthesis and a solid grasp of timing concepts for ASIC are must-haves for this position.,

Qualcomm India Private Limited is looking for a Hardware Engineer with over 12 years of experience in SoC design. You should have a strong understanding of AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and SDCC. Knowledge of memory controller designs and microprocessors would be an added advantage. In this role, you will be responsible for constraint development and timing closure, working closely with SoC verification and validation teams for pre/post Silicon debug. Hands-on experience in Low power SoC design is required, along with expertise in Synthesis and understanding of timing concepts for ASIC. You should also have experience in Multi Clock designs and Asynchronous interface. Familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime is necessary. Minimum qualifications include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field with 6+ years of Hardware Engineering experience, or a Master's degree in the same field with 5+ years of experience, or a PhD with 4+ years of experience. If you are an individual with a disability and need accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. For reasonable accommodations, you may contact disability-accommodations@qualcomm.com. Qualcomm expects all employees to adhere to applicable policies and procedures, including security and confidentiality requirements. Please note that Qualcomm's Careers Site is for individuals seeking jobs at Qualcomm. Staffing agencies and individuals represented by agencies are not authorized to use this site. Unsolicited submissions from agencies will not be accepted. For more information about this role, please contact Qualcomm Careers.,

Qualcomm India Private Limited is seeking a qualified Hardware Design Engineer with 5-8 years of experience in ASIC IP cores design to join their Engineering Group. In this role, you will be responsible for working independently on peripheral IPs, designing and proposing microarchitecture solutions, guiding and mentoring junior team members, and collaborating with external teams to resolve cross-team dependencies. Additionally, you will be expected to take complete ownership of one or more projects and drive them independently. The ideal candidate should possess a Bachelor's degree in Electrical Engineering (Master's degree preferred) and have a strong knowledge of AMBA protocols such as AXI, AHB, and APB. Experience with SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and Ethernet is desirable. Hands-on experience in Low power design, Multi Clock designs, and Asynchronous interfaces is required. Proficiency in using ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. Furthermore, the successful candidate should have a good understanding of constraint development, timing closure, and synthesis concepts. Strong experience in micro architecting RTL design from high-level design specification is essential. Proficiency in System Verilog, Verilog, C/C++, Perl, and Python is a plus. Excellent problem-solving, communication, and teamwork skills are mandatory for this role. The ability to lead a small design team and work with minimal supervision is also required. Minimum qualifications for this position include a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with at least 3 years of Hardware Engineering experience. Alternatively, a Master's degree with 2+ years of relevant experience or a PhD with 1+ year of experience will also be considered. As a Hardware Design Engineer at Qualcomm, you will leverage your knowledge and experience to plan, optimize, verify, and test electronic systems. You will collaborate with various teams to implement new requirements and incorporate the latest test solutions to improve yield, test time, and quality. Your responsibilities will also include evaluating and developing manufacturing solutions for leading-edge products, ensuring reliability, and identifying potential design flaws or compatibility issues. This role requires independent work with minimal supervision, providing guidance to team members, and making decisions that may impact work beyond the immediate team. Strong verbal and written communication skills are essential for conveying information effectively. Problem-solving and prioritization skills will be necessary to complete tasks efficiently. If you meet the qualifications and are interested in joining Qualcomm's dynamic team, we encourage you to apply for this exciting opportunity.,

Qualcomm India Private Limited is seeking a skilled ASIC IP cores design engineer to join their Hardware Engineering team. In this role, you will be responsible for designing and working independently on peripheral IPs, developing design and microarchitecture solutions, guiding and mentoring junior team members, and collaborating with external teams to drive and resolve cross-team dependencies. You will take complete ownership of one or more projects and drive them independently, with the ability to provide schedule estimates and potentially manage people. To be successful in this role, you should have 5-8 years of work experience in ASIC IP cores design and hold a Bachelor's degree in Electrical Engineering, with a preference for a Master's degree. Knowledge of AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking/reset/debug architecture and peripherals like USB, PCIE, and Ethernet, is preferred. Experience in low power design, multi-clock designs, and asynchronous interface is required. You should also have hands-on experience with ASIC development tools like Lint, CDC, Design compiler, and Primetime. Additionally, you should possess strong problem-solving skills, excellent communication abilities, and be a team player. Self-driven individuals who can work with minimal supervision and have experience in System Verilog, Verilog, C/C++, Perl, and Python are preferred. The ability to lead a small design team is also a plus. Qualcomm is an equal opportunity employer and is committed to providing accommodations for individuals with disabilities during the application and hiring process. If you require accommodation, you can contact Qualcomm for assistance. It is important to note that Qualcomm expects all employees to adhere to company policies and procedures, including those related to the protection of confidential information. If you are a proactive and experienced ASIC IP cores design engineer looking to work in a challenging and collaborative environment, this position at Qualcomm India Private Limited may be the right fit for you.,

You should have knowledge of AMBA protocols including AXI, AHB, APB, SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and SDCC. An understanding of memory controller designs and microprocessors would be an added advantage. Hands-on experience in constraint development and timing closure is essential for this role. You will be required to work closely with the SoC verification and validation teams for pre and post Silicon debug. Experience in Low power SoC design is a must-have for this position. You should also have experience in Synthesis and a good understanding of timing concepts for ASIC. Hands-on experience in Multi Clock designs and Asynchronous interface is a key requirement. Additionally, familiarity with tools in ASIC development such as Lint, CDC, Design compiler, and Primetime is necessary. The ideal candidate should have 2-4 years of relevant experience in the field.,

You are an experienced and highly skilled Senior SOC Design Verification Engineer with over 10 years of experience, specializing in PCIE (Peripheral Component Interconnect Express) protocols. As a key member of the team at Eximietas Design, you will be responsible for ensuring the robustness and correctness of cutting-edge System on Chip (SoC) designs. Your role will involve developing and implementing verification plans for complex SoC designs, with a particular focus on PCIE subsystems. You will work on creating and maintaining advanced testbenches using SystemVerilog and UVM (Universal Verification Methodology), as well as writing and executing test cases to verify functional and performance requirements, especially for PCIE protocols. Your responsibilities will also include debugging and resolving functional and performance issues in collaboration with design and architecture teams, developing and enhancing verification environments for PCIE and related interfaces, performing coverage-driven verification, and ensuring coverage closure. You will collaborate with cross-functional teams to define verification strategies and methodologies, mentor junior engineers, and contribute to the continuous improvement of verification processes. To qualify for this role, you should have a strong background in SoC design verification, with expertise in SystemVerilog, UVM, and PCIE specifications (e.g., PCIE Gen3/Gen4/Gen5) and verification methodologies. You should be proficient in developing and debugging complex testbenches and test cases for PCIE subsystems, with experience in coverage-driven verification and achieving coverage closure. Familiarity with AMBA protocols (AXI, AHB, APB), low-power verification techniques, power-aware simulation, and formal verification tools and methodologies will be beneficial. Strong problem-solving skills, attention to detail, excellent communication, and teamwork skills are essential for this role. Preferred skills for this position include knowledge of scripting languages like Python, Perl, or Tcl, familiarity with machine learning accelerators or AI/ML-based SoC designs, and experience with advanced process nodes (e.g., 7nm, 5nm). In return, Eximietas Design offers you the opportunity to work on cutting-edge SoC designs and innovative technologies in a collaborative and inclusive work environment. You will receive a competitive compensation and benefits package, along with professional growth and development opportunities.,

As a Digital DV Engineer at our company, you will be responsible for developing and maintaining reusable, scalable, and modular processor-level verification environments using UVM System Verilog. Your role will involve designing and implementing test plans, testbenches, and directed/random tests to validate ARM M-series and RISC-V processor designs, with exposure to DSP processors considered a plus. You will integrate and verify processor subsystems in SoC environments, ensuring seamless interaction with other components. Your tasks will also include executing regression tests across various scenarios and corner cases to ensure functionality and robustness. You will be expected to analyze simulation results, debug issues, and provide detailed reports to design and verification teams. Collaboration with cross-functional teams, including architecture, software, and hardware, will be essential to define verification strategies and ensure alignment. Additionally, you will optimize verification flows, improve coverage metrics, and manage verification closure for processors. To be successful in this role, you should possess a Bachelor's or Master's degree in Electrical/Electronic Engineering or a related field, along with at least 5 years of hands-on experience in processor verification. Proficiency in UVM SystemVerilog, a solid understanding of processor architectures, instruction sets, and pipeline designs, as well as knowledge of AMBA protocols and interfaces used in SoCs are required. Strong experience with C programming for processor-level test development and familiarity with verification methodologies such as constrained random testing, coverage-driven verification, and assertion-based verification are essential. Proficiency in using EDA tools for simulation, debugging, and coverage analysis is also expected, along with the ability to debug RTL-level issues and collaborate closely with design engineers for issue resolution. This is a full-time position located in Bangalore, requiring a minimum of 7 years of experience in the field. The ideal candidate should be available to start within 0-30 days of notice period.,

At Cadence, we are looking for individuals who are passionate about technology and aspire to lead and innovate in the industry. Your responsibilities will include understanding and reviewing design specifications, developing verification strategies, test plans, and coverage plans. Additionally, you will be tasked with creating constrained random verification environments, verification components, writing tests, sequences, functional coverage, and assertions to achieve verification goals. Furthermore, you will be developing C-based test cases for SOC verification. To excel in this role, you should have a strong background in functional verification fundamentals, environment planning, test plan generation, and environment development. Proficiency in System Verilog and experience with UVM based functional verification environment development are required. Knowledge of verilog, vhdl, C, C++, Perl, and Python is essential. Expertise in AMBA protocols such as AXI, AHB, and APB is a must, along with familiarity with USB, PCIE, Ethernet, DDR, LPDDR, or similar protocols. Proficiency in version control and load sharing software is also necessary. Desirable skills and experience include prior experience with Cadence tools and flows, familiarity with ARM/CPU architectures, experience in developing C-based test cases for SOC verification, some exposure to assembly language programming, and knowledge of protocols like UART, I2C, SPI, and JTAG. Embedded C code development and debug, as well as formal verification experience, would be advantageous. Strong communication, organizational, planning, and presentation skills are crucial for success in this role. You should be able to work independently, deliver high-quality results in a fast-paced environment, and be open to learning new methodologies, languages, and protocols. Personal development and growth are essential to meet the evolving demands of the semiconductor industry. A self-motivated mindset and willingness to take on additional responsibilities to contribute to the team's success are highly valued. Join us at Cadence, where we tackle challenges that others cannot. Let's make a difference together.,

Qualcomm India Private Limited is seeking a Software Engineer with expertise in various aspects of System on Chip (SoC) architecture and design. In this role, you will be responsible for working with AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking, reset, debug architecture, and peripherals like USB, PCIE, and SDCC. An understanding of Memory controller designs and microprocessors is considered an added advantage for this position. As a Software Engineer at Qualcomm, you will be required to have hands-on experience in constraint development and timing closure. Additionally, you will collaborate closely with the SoC verification and validation teams for pre/post Silicon debug. Proficiency in Low power SoC design, Synthesis, Multi Clock designs, and Asynchronous interface is crucial for this role. Experience in using tools in ASIC development such as Lint, CDC, Design compiler, and Primetime is also a requirement. The ideal candidate for this position should hold a Bachelor's degree in Engineering, Information Systems, Computer Science, or a related field, along with at least 2 years of Software Engineering experience. Alternatively, a Master's degree with 1+ year of relevant work experience or a PhD in a related field is also acceptable. A minimum of 2 years of academic or work experience with Programming Languages like C, C++, Java, Python, etc., is necessary for this role. Qualcomm is an equal opportunity employer that is committed to providing an accessible process for individuals with disabilities who may need accommodations during the application/hiring process. If you require an accommodation, you may contact Qualcomm through the provided email address or toll-free number. The company expects its employees to adhere to all applicable policies and procedures, including those related to the protection of confidential information. Please note that Qualcomm's Careers Site is exclusively for individuals seeking job opportunities at Qualcomm. Staffing and recruiting agencies are not authorized to use the site or submit profiles, applications, or resumes on behalf of individuals. Unsolicited submissions from agencies will not be accepted. For any inquiries about this role, please contact Qualcomm Careers directly.,

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3-6 yrs of experience Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.,

15+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12+ years of experience with a Bachelor's/ Masters degree in Electrical/ Electronics engineering

12+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12+ years of experience with a Bachelor's/ Masters degree in Electrical/ Electronics engineering

Role & responsibilities "You will be closely working with Architecture Team, SOC Design Team, Product Design, Software Teams; Understand the requirement, enhancements required etc; create a realistic schedule and resource plan You will completely own the IP Design; preparing the micro-architecture, detailed design document, implement design using RTL coding techniques, performing reviews and ensuring all quality criteria are met Work with verification team on reviewing the verification test plan to ensure design features are verified correctly, issue debug, coverage analysis etc Provide support to SOC Integration, Physical Design, Software, Product Engineering team on pre & post silicon activities on need basis" Preferred candidate profile - Min 7 years full time experience in IP design, Detailed understanding of SOC Design - Good understanding and Hands on experience in interconnect designs, multi-clock designs, SoC BUS architecture and NOC concept; - Experience in performance and latency tuning will be an add-on - Proficiency in IP Design using Verilog, System Verilog hardware logic design language - Sound knowledge of AMBA protocols like APB/AHB/AXI/ACE/ACE-Lite -Self-driven, Strong problem solving, root causing and debugging skill -Experience in creating documents such as micro-architecture, hardware design document, verification request etc -Work collaboratively with other members of the IP Team, SOC Team, cross-functional teams across various geographies - Good written and verbal communication skills

Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/DSC/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/DDR/PCIe/ USB/ MIPI Be an individual contributor in the Verification Tasks - Architect testbenches, coding of TE, debug, verification coverage improvement, etc. Will contribute to technical review of TE Code of medium complexity. Will contribute to technical process and quality improvement to achieve high quality deliveries Will be expected to Solve complex/ abstract problems The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers. The role offers ample scope to mentor junior engineers and interns and to enhance ones leadership skills. Key Qualifications and Experience Must have BSEE/ MSEE in EE with 6 to 12 years of relevant experience in the following areas: Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. Knowledge of one or more of protocols: Ethernet/AMBA (AMBA2, AXI, CHI)/ SD/eMMC/USB/ DDR/PCIe MIPI/DSC. Knowledge of Ethernet protocol will be plus. Hands on experience with creating detailed design of components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM, OVM Test Planning, Coverage Planning, Assertion Planning Hands on experience with System Verilog coding and Simulation tools; Deep Knowledge of OOPs Concepts Experience with Perforce or similar revision control environment Knowledge of Perl/Shell scripts. Exposure to quality processes in the context of IP design and verification is an added advantage In addition, the candidate should have good communication skills, will be a team player, and will have good problem-solving skills.

Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience inVerilog/System-Verilogis a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime isrequired. Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 2-9 years of experience in SoC design Educational Requirements: 2+ years of experience with abachelors/masters degree in Electrical engineering

12+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12+ years of experience with a Bachelors/ masters degree in Electrical/ Electronics engineering

Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Qualcomm is not responsible for any fees related to unsolicitedresumes/applications.

Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC. Experience in Synthesis / Understanding of timing concepts is a plus. Experience in ECO fixes and formal verification. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Excellent oral and written communications skills. Proactive, creative, curious, motivated to learn and contribute with good collaboration