RTL Design Lead / Manager

You are a highly experienced RTL Design Lead responsible for driving the architecture, micro-architecture, and RTL development of digital IP/SoC blocks. Your role involves leading RTL design activities for complex IPs or SoC sub-systems and collaborating with various teams to ensure successful integration and tapeout. You will be required to mentor junior designers, support silicon bring-up, and debug as needed. To excel in this role, you must have a proven track record of delivering IP or SoC designs from spec to GDSII. Your expertise should include micro-architecture development, pipelining, clock-domain crossing, and a good understanding of the ASIC design flow. Hands-on experience with AMBA protocols and standard interfaces is essential, along with strong debugging and problem-solving skills. Familiarity with low-power design techniques is considered a plus. Preferred skills for this role include exposure to high-speed protocols, proficiency in scripting languages for automating design tasks, and experience with tools like Synopsys DC, Spyglass, Verdi, VCS, etc. Prior experience in leading and mentoring a small team is also beneficial. As an ideal candidate, you should possess a Bachelor's or Master's degree in Electronics/Electrical Engineering or a related field. Your role will involve working closely with architects to translate high-level specifications into micro-architecture and RTL, driving design reviews, coding standards, and technical quality, and defining/implementing RTL design methodologies and flows. If you are seeking a challenging opportunity to lead RTL design activities, collaborate with cross-functional teams, and contribute to the successful development of cutting-edge IPs and SoCs, this role is tailored for you.,