1362 Rtl Jobs

One of our client is looking for Senior UI Engineer. About the Role: We're hiring a Senior UI Engineer to lead the development of high-quality, scalable front-end interfaces for finance and workflow-driven products. You'll work on UI architecture, reusable component systems, and performance-optimised React/Next.js applications while collaborating closely with design and backend teams. Key Skills: * React.js, Next.js, TypeScript * Component-driven development & design systems * State management (Redux/Zustand/Recoil) * UI performance optimisation, accessibility, responsive design * Testing frameworks (Jest, RTL, Cypress/Playwright) * API integrations (REST/GraphQL), real-time data (WebSockets...

In this role, you will be responsible for developing and implementing user interface components in React.Js and Next.Js with workflows built using Redux, Context, etc. You will also be working with Node.Js and Next.Js to create and maintain server-side functionality like building optimized APIs, Cron Jobs, etc. You will be responsible for profiling and improving application performance, and documenting codebase. **Key Responsibilities:** - Ability to clearly understand requirements, translate them into technical requirements, and implement code. - Strong proficiency in JavaScript, including DOM manipulation and the JavaScript object model. Proficiency in TypeScript will be helpful. - In-dept...

DFT architecture, ATPG, MBIST, BIST, Memory Test, RTL, DFT rule check, gate level simulations, Scan Insertion, Scan Chain, Test Coverage Analysis,STA Contact- gagan@bestnanotech.in

Hi all here we have openings for ASIC design engineer. Pls find below jd ASIC Design Engineer Experience : 5-9years Location : Hyderabad. Mode : work from Office Notice period: 0-30days Understanding of IP design, RTL coding, Verilog/SV Proficient in RTL simulation tools Knowledge of High-speed interfaces PCIe, Ethernet, DDR AMBA AXI/AHB/APB Protocol Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Perl, Python, Unix shells and Make files. Excellent communication skills and experience working with global teams Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC...

Greetings from for the Day We have challenging roles at WIPRO, Please find the below active requirement. Please share your updated resume if your interested to apply for the current roles. ASIC RTL Lead / Architect (RTL Design, RTL Coding & Integration, IP, targeted for SOC, Static checks, Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI) Experience : 9 Years 22 Years Work Location : Bangalore / Hyderabad / Kochi / Pune Work Mode : Hybrid (3 days Work From Office) Employment Type : Full Time with Wipro Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowled...

Greetings from for the Day We have challenging roles at WIPRO, Please find the below active requirement. Please share your updated resume if your interested to apply for the current roles. ASIC RTL Engineer (RTL Design, RTL Coding & Integration, IP, targeted for SOC, Static checks, Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI) Experience : 6 Years 22 Years Work Location : Bangalore / Hyderabad / Kochi / Pune Work Mode : Hybrid (3 days Work From Office) Employment Type : Full Time with Wipro Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of sy...

Kindly share your updated cv to chaitra@skygate.co.in Job Description: - Design, develop, and verify FPGA modules using Verilog. Work with Vivado for synthesis, simulation, and implementation. Develop solutions on Xilinx Zynq UltraScale+ platforms. Integrate and interface peripherals such as I2C, SPI, DDR, EMMC, AMBA, PL, PS , etc. Collaborate with hardware, software, and system teams for end-to-end design delivery. S trong • hands-on experience with Verilog . Proficiency with Xilinx Vivado design suite. Strong knowledge of FPGA architecture, synthesis flows, and timing closure. Experience working with Xilinx Zynq UltraScale+ FPGA family. Expertise in interfacing protocols such as I2C, SPI, ...

We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL ...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role : Execellent Customer Interfacing and Pre-Sale skills. Proposal Writting, presentation and tuning as per requirement. Must have excellent skills/ Hands On experience in areas including RTL logic design, design verification, team work, customer focus, and communication Will have demonstrated experience as a senior technical contributor, planning and leading RTL logic design development projects Should have good hands on Knowledge on Test Bench creation , configuration and UVM methodologies . Will have demonstrated experience in developing verification environments and performing complete verification on design blocks, sub-systems and full SoCs Must possess proven experience with customer...

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair eq...

This intensive offline training program is designed for professionals with 4years of experience in electronics, domains who are looking to transition into or deepen their expertise in ASIC Design Verification (DV).

As an experienced Frontend Developer, you will play a crucial role in building and maintaining cutting-edge chat UI features. Your responsibilities will include: - Building chat UI components such as message lists, infinite scroll, typing indicators, and read receipts - Converting Figma designs into pixel-perfect UI - Implementing real-time state synchronization using Zustand / Jotai - Integrating WebSocket events for message updates - Implementing SSR / ISR / SEO metadata in Next.js - Working with Tailwind CSS + shadcn/ui for components, modals, and drawers - Handling file uploads & previews for various file types - Optimizing UI performance with virtualized lists, caching, and lazy loading...

As a Director of Physical Design at Tecquire Solutions Private Limited, you will play a crucial role in leading and growing the physical design team to implement complex SoC and ASIC designs effectively. Your responsibilities will include: - Leading and managing the entire Physical Design team across multiple projects and geographies. - Driving end-to-end physical implementation including RTL handoff, floorplanning, place & route, clock tree synthesis, static timing analysis, physical verification (DRC/LVS), and tape-out. - Owning project planning, resource allocation, schedule management, and risk mitigation across multiple physical design programs. - Collaborating with cross-functional tea...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FVExperience in Logic design/micro-architecture/RTL coding is a must.Must have hands on experience with design and integration of complex multi clock domain blocksExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architectureHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.Work closely with the Design verification and va...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

What You'll Be Doing : - In this position, you will expect to lead all block/chip level PD activities. - PD activities includes floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification. - Work in collaboration with design team for addressing design challenges. - Help team members in debugging tool/design related issues. - Constantly look for improvement in RTL2GDS flow to improve PPA. - Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. - Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and m...

Experience : 20+Years KEY EXPERTISE : - Seasoned ASIC Front End leader with 20 years of cross domain experience ranging from architecture, uArch, IP/Sub- systems/SOC/chiplets design/integration, RTL coding, Synthesis, CDC, timing, power analysis, system/IP verification, Silicon Bring up. - Proven track record of leading the design and development of complex IPs, sub-systems, chiplets for SOCs in the multiple domains like PCIE, USB, UCIE, ARM/x86 CPUs, RISC-V, VPU/NPU, GPU, LSIO, NOC, Fabrics, AMBA buses, DRAM, SD/SDIO/eMMC etc. Responsible for defining the technical direction of ASIC designs and collaborating with cross- functional teams to ensure successful ASIC implementation. - Demonstrat...

Role & responsibilities We are looking for a highly skilled Digital Front-End Lead to drive and contribute to chip-level architecture, RTL design, and verification, while managing and mentoring a high-performing team. The ideal candidate will possess deep technical expertise and leadership capabilities, with a strong background in SoC design, RTL coding, verification planning, and project management . This role requires a proactive approach to continuous improvement and collaboration across disciplines. We are specifically seeking a Verification Leader with design exposure , capable of ensuring robust verification strategies while contributing to architectural and design decisions. * Target ...

Job Title: React JS Developer Job Description We're Concentrix. The intelligent transformation partner. Solution-focused. Tech-powered. Intelligence-fueled. The global technology and services leader that powers the world's best brands, today and into the future. We're solution-focused, tech-powered, intelligence-fueled. With unique data and insights, deep industry expertise, and advanced technology solutions, we're the intelligent transformation partner that powers a world that works, helping companies become refreshingly simple to work, interact, and transact with. We shape new game-changing careers in over 70 countries, attracting the best talent. The Concentrix Technical Products and Serv...

Job Title: React JS Developer Job Description We're Concentrix. The intelligent transformation partner. Solution-focused. Tech-powered. Intelligence-fueled. The global technology and services leader that powers the world's best brands, today and into the future. We're solution-focused, tech-powered, intelligence-fueled. With unique data and insights, deep industry expertise, and advanced technology solutions, we're the intelligent transformation partner that powers a world that works, helping companies become refreshingly simple to work, interact, and transact with. We shape new game-changing careers in over 70 countries, attracting the best talent. The Concentrix Technical Products and Serv...

Job Title: React JS Developer Job Description We're Concentrix. The intelligent transformation partner. Solution-focused. Tech-powered. Intelligence-fueled. The global technology and services leader that powers the world's best brands, today and into the future. We're solution-focused, tech-powered, intelligence-fueled. With unique data and insights, deep industry expertise, and advanced technology solutions, we're the intelligent transformation partner that powers a world that works, helping companies become refreshingly simple to work, interact, and transact with. We shape new game-changing careers in over 70 countries, attracting the best talent. The Concentrix Technical Products and Serv...

ACL Digital | Hiring RTL Design Engineer (Automotive MCU IPs) Experience: 4 – 11 Years Location: Bangalore Notice Period: 30 Days Only (Immediate Joiners Preferred) Key Responsibilities Design & implementation of Digital RTL IPs for Automotive MCU Infrastructure Convert Architecture Micro-Architecture and develop high-quality IP Develop synthesizable RTL (VHDL/Verilog/SystemVerilog) for complex designs Insert DFT/DFM features – Scan Chains & MBIST Implement ASIL-based safety mechanisms (ISO 26262) Run QC checks – Synthesis, Lint, CDC/RDC, DFT, Power Analysis Deliver design documentation & safety compliance reports Work with global multi-site teams Required Skillset (Must-Have & Highlighted) ...

Looking experienced DFT Engg to join our ASIC/SoC design team. You'll be responsible for developing DFT architectures, integrating test logic, enabling high fault coverage, and supporting silicon bring-up to ensure robust manufacturability and yield. Required Candidate profile 5+ yrs exp IN DFT/ASIC/SoC test design & infrastructure roles. Aware of digital design, RTL, and SoC design flows. Hands-on exp with DFT tools. Verilog/SystemVerilog and scripting (Python/Perl/TCL).

About The Role Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies.In this role, you will: Implement FPGA code on target hardware and test with system components and software. Perform RTL design, implementation, testing, and integration of FPGA-based systems. Deliver high-performance hardware solutions for Datacom and Aerospace applications. Participate in R&D activitie...