153 Ovm Jobs

About NCR VOYIX NCR VOYIX Corporation (NYSE: VYX) is a leading global provider of digital commerce solutions for the retail, restaurant, and banking industries. Headquartered in Atlanta, Georgia, with approximately 16,000 employees in 35 countries worldwide, NCR VOYIX has been a pioneer in consumer transaction technologies for nearly 140 years. The company is dedicated to transforming everyday consumer interactions into meaningful moments by enhancing stores, restaurants, and digital banking experiences through cloud-based, platform-led SaaS, and services capabilities. As a leader in the market segments it serves, NCR VOYIX collaborates with renowned retailers, restaurants, and financial institutions to create exceptional consumer experiences. Leveraging expertise, research and development capabilities, and a unique platform, the company helps customers navigate, simplify, and optimize their technology systems to achieve various goals from customer satisfaction and revenue growth to operational excellence, cost reduction, and profit growth. NCR VOYIX brings innovative, industry-leading technology to businesses of all sizes globally, earning the trust of both well-known brands and local favorites. Job Description Position Title: UNIX Systems Engineer I Location: Chennai, India Working hours: 24x7 on rotation basis Summary Description: The UNIX Support team plays a crucial role in NCR VOYIX's infrastructure, working closely with various teams to maintain a robust hardware and software solution for the NCR VOYIX UNIX environment. As a UNIX Systems Engineer I, you will support architectural development, deployment of new installations and solutions, and provide second/third level technical consultation for day-to-day operations and off-hours support on a rotational basis. Strong teaming and communication skills are essential as you collaborate within a global organization, provide support and mentorship to lower-level teams, and work with individuals from diverse locations and cultures. A keen understanding of technologies and the ability to work within NCR's overall infrastructure architecture are key requirements for this role. Key Areas of Responsibility: - Develop and implement UNIX releases and solutions within the NCR VOYIX environment - Maintain the UNIX environment to defined availability targets - Diagnose and resolve technical and operational software and hardware issues - Plan and schedule installations of new server hardware - Monitor system performance and present technical information to various audiences - Provide input on procedural documentation and review regularly Basic Requirements: - Strong analytical skills and communication abilities - Creativity, innovation, and problem-solving skills - Project management capabilities - Quick learning and application of new concepts and technologies - Independence in working towards defined objectives - Proficiency in UNIX scripting and ansible playbook writing Preferred Skills: - Experience in supporting UNIX environments including Linux, Solaris, Suse, Redhat - Server hardware installation and troubleshooting - Configuration and testing of complex server architectures on virtualized platforms - Support in architecture design through solution deployment - VMWare and Oracle Engineered servers experience - Cloud environment familiarity (OCI, AZURE, Google) Education Requirements: - Bachelor's degree in Computer Science, Computer Engineering, Management Information Systems, or related field, or equivalent job experience Please note that offers of employment are subject to passing applicable screening criteria. NCR VOYIX values diversity and is an equal opportunity employer.,

Are you interested in a unique opportunity to be a part of something great Would you like to join a 20,000-member team that is at the forefront of technology that powers the world around us Microchip Technology, Inc. offers an environment of trust, empowerment, respect, diversity, and communication. You will have the chance to own a piece of a multi-billion dollar global organization and more. At Microchip, employees are part of a culture that supports growth and stability. They are engaged and motivated by a wide range of products and solutions with unlimited career potential. The nationally-recognized Leadership Passage Programs at Microchip facilitate career growth for over a thousand individuals annually. The company is committed to employee development, values-based decision making, and fostering a strong sense of community based on its Vision, Mission, and 11 Guiding Values. This commitment has earned Microchip numerous awards for diversity and workplace excellence. As a Verification Engineer at Microchip, your responsibilities will include playing a key role in block-level verification. You will develop verification test plans based on design specifications, create test environments using System Verilog and UVM methodologies, and integrate with RTL while conducting basic simulation bring-up for the design. You will be tasked with generating code/functional coverage, analyzing coverage results, correlating them with the test plan, creating multiple test cases, and launching regressions. Additionally, you will collaborate with the design team to quickly identify and resolve design issues. The ideal candidate for this role will have expertise in domains such as AHB, AXI, PCIe, USB, and Ethernet. Proficiency in Verilog and System Verilog is essential, as well as familiarity with at least one of the following methodologies: OVM, UVM, VMM. Experience with EDA tools like Questasim, VCS, NCSim, or NCVerilog is required. You should have experience in developing test bench components at both block and SOC levels, creating test plans, and writing test sequences. Knowledge of functional coverage, code coverage, and assertions (OVA, SVA, PSL) is desirable. Strong analytical, problem-solving skills, excellent written and verbal communication in English, and a passion for teamwork and excelling in a competitive environment are also essential. Qualifications for this role include a Bachelor's Level Degree (ECE, EE / preferred specialization) with more than 9 years of work experience. The role may involve up to 25% travel time. Please note that Microchip Technology Inc. does not accept unsolicited agency resumes. Kindly refrain from forwarding resumes to the recruiting team or other Microchip employees, as the company is not responsible for any fees related to unsolicited resumes. Visit our careers page to explore exciting opportunities and company perks.,

HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. With a strong foundation built on four decades of innovation, a world-renowned management philosophy, and a relentless focus on customer relationships, we pride ourselves on our culture of invention and risk-taking. HCL is committed to diversity, social responsibility, sustainability, and education initiatives, exemplified by our worldwide network of R&D facilities and co-innovation labs. With over 187,000+ Ideapreneurs across 50 countries, we deliver holistic services across industry verticals to leading enterprises, including 250 of the Fortune 500 and 650 of the Global 2000. Enterprises today are at a critical juncture where digital technologies such as analytics, cloud, IoT, and automation are key to success. To help enterprises leverage these technologies for their business objectives, HCL offers an integrated portfolio of products and services through three business units: IT and Business Services (ITBS), Engineering and R&D Services (ERS), and Products and Platforms (P&P). As a Technology Manager at HCL Technologies in Ha Noi or Ho Chi Minh (Vietnam), your responsibilities will include managing technology in projects, providing technical guidance or solutions, developing and guiding team members to enhance their technical capabilities, preparing status reports to minimize exposure and risks on projects, ensuring process compliance, and participating in technical discussions or reviews. **Responsibilities:** - Manage technology in projects and provide technical guidance or solutions - Develop and guide team members to enhance their technical capabilities - Prepare and submit status reports to minimize exposure and risks on projects - Ensure process compliance in the assigned module and participate in technical discussions or reviews **Requirements:** - 5+ years of experience - Bachelors/Masters degree in Electronics/Electrical Engineering with 5+ years of experience in verification - Good understanding of ASIC/SoC life cycle - Experience in OVM/UVM methodologies using SV - Experience with Full chip test plan development/modification - Experience with Testbench development/modification, Test case development, coding, execution, bug analysis, Regressions, coverage analysis, Verification closure - Experience in prevalent standards & Protocols viz. PCIe Gen3/4/5/USB3/DDR4/5, /Ethernet/CSI2/I3C/AMBA - Experience with Gate level simulations - Experience in scripting - Participation in multiple ASIC/SoC verifications till tape out stage - Good command of English. Opportunity to work onsite in Japan **Benefits:** - 18 paid leaves per year (including 12 annual leaves + 6 personal leaves) - Insurance plan based on full salary + 13th salary + Performance Bonus - 100% full salary in probation period - Medical Benefit for Employee and Family - Fast-paced, flexible, and multinational working environment - Opportunity to travel onsite (in 49 countries) - Internal Training (Technical & Functional). Scope of English Training - Working hours: 8:30 AM-6:00 PM, Mondays to Fridays,

Position : ASIC Design Verification Engineer Requirements : 2Years to 15Years experience in SystemVerilog/UVM-based verification for IP/SoC Skills in assertions, formal verification and emulation Experience with high-speed interfaces (PCIe, DDR, Ethernet), scripting (Python, TCL, Perl) and working across cross-functional teams Responsibilities : Full verification closurefrom test planning and testbench development to formal, emulation-based verification and ensuring first-pass silicon success Role & responsibilities Preferred candidate profile

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL) With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs You possess excellent problem-solving skills and can work effectively in a collaborative environment Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs, What Youll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards, Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases, Building/updating functional verification environments to execute test plans, Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs, Performing simulation, random and direct stimulus development, and coverage review, Working closely with digital designers for debugging and achieving the desired coverage, The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology, Enhancing the reliability and performance of Synopsys' products through meticulous verification processes, Driving innovation in the semiconductor industry by verifying complex digital designs, Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards, Improving the efficiency of the verification process through automation and advanced verification methodologies, Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers, What Youll Need: Tech/M Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog, Proficiency in scripting and automation using TCL, PERL, or Python, Strong debug and diagnostic skills, Experience in building and updating functional verification environments, Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams, A proactive problem solver with a keen eye for detail, An enthusiastic learner with a passion for technology and innovation, A team player who thrives in a collaborative environment, A highly organized individual who can manage multiple tasks and priorities effectively, The Team Youll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process, Show

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Bachelors /Masters degree in Engineering Relevant experience of 6+yrs in any of the mentioned domain - Verification/ Emulation/ Validation Verification: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce FPGA Emulation : Familiarity with Verilog/Vhdl and General Digital Logic Design concepts Knowledge of system-level architecture including buses like ARM processor bringup, AXI/AHB, bridges, memory controllers such as DDR/Nand. Knowledge of peripheral emulation like PCIE/USB is a plus. Strong working knowledge of UNIX environment and scripting languages such as Perl or shell Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow Pre/Post silicon Validation: ARM based System-On-Chip Pre-Silicon emulation and Post-Silicon ASIC Validation experience related to board bring up and debug. Perform system level validation and debug Debug experience with Lauterbach Trace32 environment. Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers. Embedded software development of low level hardware drivers in C language. Working experience related to one or more of the following is required. ARM/DSP Processors/USB/PCIE, Ethernet Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Good knowledge on AMBA protocols (CHI/AXI/AHB) Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Execute verification plans, regression enabling for all features and, debug of the test failures Hands-on experience of GLS and timing simulations Exposure to Formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

You are a passionate and innovative engineer with a strong foundation in digital and analog design You have a knack for developing complex arithmetic and logic operations and are adept at translating algorithmic flowcharts into pseudo code Your background in Electrical Electronics Engineering, Electronics and Telecommunication Engineering, or a related field has equipped you with the skills necessary to excel in high-speed serial link design and verification You thrive in a collaborative environment and have a continuous improvement mindset, always eager to learn and grow Your knowledge of hardware description languages like Verilog and SystemVerilog, combined with your understanding of protocols such as PCIe and IEEE8023, makes you a valuable asset to any team You are ready to take on challenges and contribute to the success of cutting-edge technology What Youll Be Doing: Designing and verifying high-speed serial links for inter and intra chip communication Developing finite state machines for complex digital and analog operations Translating algorithmic flowcharts into efficient pseudo code Conducting functional verification using methodologies like UVM, OVM, and VMM Collaborating with cross-functional teams to ensure design and verification accuracy Staying updated with the latest industry protocols and standards to meet technical requirements The Impact You Will Have: Enhancing the performance and reliability of high-speed data transfer systems Contributing to the development of innovative technologies that shape the future of connectivity Ensuring the successful integration of high-speed serial links in various applications Improving product quality and efficiency through rigorous design and verification processes Setting new benchmarks in the industry for data transfer speed and reliability Driving continuous improvement and innovation within the team and organization What Youll Need: 2-3 yrs with Bachelors or Masters degree in Electrical Electronics Engineering, Electronics and Telecommunication Engineering, or a related field Strong fundamentals in digital and analog design Proficiency in hardware description languages, especially Verilog and SystemVerilog Experience with functional verification methodologies like UVM, OVM, and VMM Knowledge of high-speed serial data protocols such as PCIe and IEEE8023 Who You Are: Innovative and passionate about technology Detail-oriented with strong problem-solving skills Collaborative and team-oriented Adaptable and eager to learn new skills Effective communicator with the ability to convey complex ideas clearly The Team Youll Be A Part Of: You will be part of the Solutions Group (SG) at Synopsys India Pvt Ltd, a team of experts dedicated to pushing the boundaries of high-speed serial link design, verification, validation, and packaging This team is committed to meeting industry standards and protocol requirements, ensuring our consumer and enterprise products lead the market in performance and reliability

You should have a minimum of 3 years of experience in System Verilog HVL and at least 3 years of experience in OVM/UVM/VMM/Test Harness. It is important to have hands-on experience in developing assertion, checkers, coverage, and scenario creation. You must have successfully executed at least 2 SoC Verification projects and possess experience in developing test and coverage plans, Verification environment, and validation plans. Knowledge of at least one industry standard protocol such as Ethernet, PCIe, MIPI, USB, or similar is required. Participation in reviews and audits is also expected. For management responsibilities, you should have a minimum of 2 years of experience in leading a team of 5 to 10 engineers. Your role will involve defining/deriving scope, estimation, schedule, and deliverables of proposed work. It is crucial to ensure the compatibility of resources, tools, and platforms, as well as working closely with customers through the acceptance of deliverables. Effective management of team members through coaching, mentoring, guidance, and career planning is essential for this role.,

As a Sr. Verification Engineer specializing in SOC Verification at SmartSoC, you will be responsible for the technical execution of complex ARM-based SOC Verification projects. Your role will involve test planning, environment architecture, and the development of SV-UVM environments. To succeed in this role, you should have 3-10 years of experience in Design Verification, with a strong expertise in SOC Verification. Excellent communication and presentation skills are essential, along with a deep knowledge of Verification methodologies such as Coverage Driven Test Planning, Environment Architecture, and Verification Flow. Proficiency in System Verilog and familiarity with methodologies like OVM, UVM, VMM, or RVM is required. Additionally, you should possess a solid understanding of protocols, including at least one of SATA, USB, Ethernet, or PCIE. The ability and willingness to adapt to new methodologies, languages, and protocols are crucial for success in this position. This opportunity falls under the VLSI (Silicon engineering) job category and is available in multiple locations, including India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and the USA (Texas). If you are a driven and skilled SOC Verification expert looking to tackle challenging projects in a dynamic environment, we encourage you to apply and be a part of our innovative team.,

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: ASIC Design. Experience: 3-5 Years.

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Technical and Professional Expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic units. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Your Role and Responsibilities Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Required Technical and Professional Expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

As a Sr. Verification Engineer specializing in SOC Verification, you will be a valuable member of the SmartSoC team, contributing your expertise to intricate SOC Verification projects. Your responsibilities will entail the technical execution of SOC Verification projects for complex ARM-based SOCs. This involves tasks such as Test Planning, Environment Architecture, and creating SV-UVM environments to ensure the successful verification of SOC designs. To excel in this role, you should possess 3 to 10 years of experience in Design Verification, coupled with excellent Communication and Presentation Skills. Your proficiency in SOC Verification is crucial, along with your expertise in Verification methodologies such as Coverage Driven Test Planning, Environment Architecting, and Verification Flow. A strong command of System Verilog is essential, as well as familiarity with methodologies like OVM, UVM, VMM, or RVM. Furthermore, your knowledge of protocols, specifically one of SATA, USB, Ethernet, or PCIE, will be highly beneficial. Your willingness and ability to adapt to new methodologies, languages, and protocols are key attributes for success in this role. This position falls under the Job Category of VLSI (Silicon Engineering) and offers opportunities in various locations including Bangalore, Chennai, Hyderabad, Noida in India, Stockholm in Sweden, and Texas in the USA. Join us at SmartSoC and be part of a dynamic team working on cutting-edge SOC Verification projects.,

Perform maintenance activities for Oracle Private Cloud Appliance (PCA) Experience configuring networks and storage in the data centre and in a virtualized environment. Have experience of administering on Oracle Virtual Manager Exp in Virtualization

Roles & Responsibilities: Be part of a team to verify or emulate/prototype complex system on a chip designs. Interact with design engineers to identify important verification scenarios. RTL Design / porting of ASIC RTL targeting FPGA prototyping and emulation platforms, such as Synopsys ZEBU, Cadence Palladium or Siemens Veloce Synthesis, PNR and timing analysis of RTL on industry standard prototyping and emulation platforms Qualification, Experience & Skills desired: Bachelor's degree in Electrical/Electronics Engineering with 5+ years of relevant experience, or masters degree in Electrical Engineering Skilled in FPGA design techniques, RTL Design, tools and processes. Minimum 5 years and above experience in digital design/verification, emulation/ FPGA prototyping and system validation. Verilog/SystemVerilog based verification experience at Subsystem and Full chip level. Experienced in transactor-based verification. Verification methodology like UVM/OVM knowhow is a plus. Knowledge of RTL language (e.g., VHDL, Verilog), in-circuit emulation, simulation acceleration and FPGA prototyping. Familiar with emulation/prototyping tools and methodologies. Real experience of mapping complex SOC design into multi-FPGA platforms/emulators and hands on experience with Synopsys ZEBU, Cadence Palladium, Siemens Veloce or HAPS A proven track record with emulation-based verification methodologies including ownership of a suitably complex emulation workflow environment. Well versed in model building for prototyping or emulation. Experience with STA/timing closure, wrapper creation, HDL simulation, synthesis, and memory modelling for prototyping/emulation. Working knowledge of Perl, Python & Shell scripts is a plus Experience with digital systems based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols. Experience with SOC boot flow, writing basic test cases, clocking and platform bring up in Emulators or Silicon desired Interested in and passionate about staying updated with tech trends. Excellent verbal and written communication skills to communicate issues, impact and corrective action.

Solid Experience in DFT Architecture. The candidate should have experience with ATPG, JTAG, BSCAN, BIST and MBIST flows. Experience on Hierarchical DFT techniques using Pattern Retargeting in Tessent flow Strong knowledge of the Tessent Shell environment and Tessent tools The desired candidate must have specific emphasis on the following tools Test Kompress / Fastscan ATPG, MBIST, Boundary scan. Hands on experience in simulating scan patterns and debugging pattern mismatches during verification process Experience in helping to debug failing scan patterns on the ATE is highly desirable. Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification.(Mentor, Cadence, Synopsys) Must be able to simulate and debug MBIST testbenches. Ability to come up with a detailed test plan based on the Arch specs Should be knowledgeable in all SOC functions such as Digital design, STA, Synthesis, PnR, DV and ATE test. The candidate should have prior experience in managing and developing teams Required Qualification B.E / B.Tech / M.E / M.Tech in Electrical / Electronic Engineering.experience-10-16 years Preferred experience of handling 10+ team members. Good understanding and exposure to SoC design and architecture Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects Comfortable with VCS / Verdi and excellent debugging skills Logical in thinking and ability to gel well within a team and be a proactive member of the team. Good communication and leadership skills Excellent team player High Integrity Job Type Full Time Job Location Hubballi

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Verification of processor-based subsystem :(Running /debugging testcases). Skills Must have 5-8y exp Good verification skills (Verilog, system Verilog). Strong Knowledge of UVM methodology, with hands on experience of coding testbenches. with Good debug skills. AMBA (AXI, AHB, APB) Good to have protocol knowledge Exposure to Arm based SOC preferred but not a must Well versed with digital design fundamentals Scripting perl, tcl, Make, shell scripting Nice to have Experience with any other scripting language is a plus

SENIOR VERIFICATION ENGINEER- SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience in SV/ UVM based verification project. Good debug skills is a must. Experience in building components like Scoreboard, functional coverage & writing sequences using SV/UVM based Verification environment One of the following experiences is important: Experience in Video/Display domain in particular DP, oLDI, MIPI CSI/ DSI Experience in any one high speed protocol like USB3, PCIe, MIPI, Unipro etc Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia Singapore SwedenStockholm USADelaware

SR. VERIFICATION ENGINEER – SOC VERIFICATION SmartSoC is looking for smart and enterprising SOC Verification experts to come and work on complex SOC Verification projects. This role will include- Technical execution of SOC Verification projects of complex ARM based SOCs Test Planning, Environment Architecture, SV-UVM environments Desired Skills and Experience- 3 – 10 years experience in Design Verification Excellent Communication and Presentation Skills Expert Knowledge in SOC Verification Expert at Verification – Coverage Driven Test Planning, Architecting Environments, Verification Flow Strong knowledge in System Verilog Knowledge in at least one methodology, OVM, UVM, VMM or RVM Very Good knowledge of protocols, at least one protocol of SATA, USB, Ethernet, PCIE Ability and desire to learn new methodologies, languages, protocols etc. is required Job Category VLSI (Silicon engineering) Job Location IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida SwedenStockholm USATexas

Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM Reading and interpreting technical specs and Register Transfer Level (RTL) code SW development skills (Unit Testing, Test Driven Development) Hands-on Debug Preferred Skills and Experience: Expertise in any of one domain like Audio, Performance, power management will be a huge plus 4+ years’ experience with writing validation plans and implement those validation plans Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul USATexas

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Take ownership of Analog/Mixed designs at the chip and/or block level, ensuring successful verification. Good Understandingof GLS simulations Collaborate with design engineers to understand design tradeoffs and create high-level models for design analysis. Perform behavioral modeling for verification simulations to validate the functionality and performance of mixed-signal designs. Debug and resolve issues arising from verification simulations and work closely with the design team to address any design-related concerns. Stay updated with the latest advancements in mixed-signal verification methodologies and tools, and drive continuous improvement initiatives. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). The primary focus of this role will be on Ethernet protocol verification, ranging from 100G to 800G standards. Key Responsibilities: Ethernet Protocol Expertise Demonstrate expertise in Ethernet standards, encompassing 100G to 800G. In-depth knowledge of specific standards, including 100GE (cl45, cl49, CL82, CL91, CL119), 200GE, 400GE (cl161, cl116), and 800GE (802.df/800ETA). Proficiency in PTP 1588 standard and various Ethernet frame types. Competence in packet insertion/extraction techniques. (Additional knowledge of AXI protocol would be considered an advantage) UVM/SV Proficiency Showcase strong expertise in SystemVerilog (SV) and Universal Verification Methodology (UVM). Architectural Skills Proven ability to architect, build, and maintain a comprehensive verification stack. Test Development Extensive experience in developing a set of regression tests for verification purposes. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 5 to 12 years of relevant industry experience in IP and SOC verification. Strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). Excellent understanding of Ethernet protocols, ranging from 100G to 800G. Proficiency in PTP 1588 standard and various Ethernet frame types. Experience with packet insertion/extraction techniques. Knowledge of AXI protocol (preferred). Proven ability to architect, build, and maintain verification stacks. Demonstrated expertise in developing a comprehensive set of regression tests. If you are a talented Design Verification Engineer with a passion for ensuring the reliability and performance of cutting-edge technology, we encourage you to apply. Join our dynamic team and contribute to the advancement of next-generation technologies. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

Experience Level: Over 4 years Location: Bangalore Skills: Proficiency in SystemC, C++, and SV/Verilog, coupled with hands-on coding experience in these languages. Strong aptitude for debugging and effective communication. Familiarity with scripting languages (desirable). Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore