RTL Design Engineer CPU Microarchitecture

Title: RTL Design Engineer - CPU Microarchitecture

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Job Overview:

MIPS - A GlobalFoundries company is seeking an experienced Design Engineer - CPU Microarchitecture. Responsible for leading and owning RTL development of one or more modules of a high-performance CPU core. Hands-on working knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core is required. The candidate will be responsible for all aspects of the design including Performance, Power, and Area.

Essential Responsibilities:

• Drive the micro-architecture and design of a critical CPU block or multiple blocks of a CPU core
• Explore high-performance strategies working with the CPU modeling team
• Perform Microarchitecture development and specification- from early high-level architectural exploration, through microarchitectural research and arrive at detailed specifications
• Configure Design Features Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
• Perform Functional verification support and assist in the design verification strategy
• Assist with the verification of RTL design performance goals
• Partner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power

Required Qualifications:

• Masters degree or higher in Electronics/Electrical/Computer Engineering
• 4+ Years of relevant experience on RTL Design (microprocessor architecture)
• Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas:
• Instruction fetch and decode, branch prediction
• Instruction scheduling and register renaming
• Out-of-order execution
• Integer and Floating-point execution
• Load/Store execution, prefetching
• Memory management unit/Hypervisor
• Cache and memory subsystems
• Knowledge of Verilog and/or VHDL
• Experience with simulators and waveform debugging tools.
• Knowledge of logic design principles along with timing and power implications

Good to have:

• Experience with designing RISC-V, ARM, and/or MIPS CPU
• Experience with Hardware multi-threading, virtualization, and SIMD designs
• Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
• Understanding of low-power microarchitecture techniques
• Experience using a scripting language such as Perl or Python

Preferred Qualifications:

• Extensive experience in RTL design
• Strong proficiency in Verilog and VHDL
• Practical experience with Load/Store architecture and microprocessor design
• Knowledge of RISC-V architecture (preferred)

About MIPS:

MIPS is a pioneer in RISC-based computing with a legacy of innovation in high-performance microprocessor design. Today, MIPS continues this legacy by leading the adoption and advancement of the RISC-V architecture, delivering scalable processor solutions for cutting-edge computing applications.

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