95 Gls Jobs

Job Description Total experience (5 -7 years) with SOC GLS experience of minimum 3+ years Hands on experience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Education Qualification: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.

Greetings from Capgemini Eng, Bangalore location JD: Total experience (5 -7 years) with S OC GLS experience of minimum 3+ years Hands on ex perience in GLS (Zero Delay, SDF, PAGLS) Excellent debugging skills and fixing issues Knowledge in SV/UVM and test bench flow Good experience in EDA tools such as Synopsys Verdi, Cadence NC Sim. Understanding of SOC Architecture Primary Skills: GLS, SOC Verification. Please share updated resume to madhuri.a.sivarju@cagpemini.com Regards, Madhuri

As an Officer/Senior Officer at Basantnagar Cement Works in Telangana, your role will primarily focus on Costing & MIS tasks. Your key responsibilities will include: - Preparation of daily Cost Sheet - Reviewing Expenses GLs in SAP - Supporting DH/SH in Various Accounting and Costing related work - Conducting Vendor Reconciliation to release and Hold GST In order to excel in this role, you should possess the following qualifications and experience: Qualification Required: - B. Com/ M Com / CA Inter Professional Experience: - 3-5 years of experience in handling Accounting and reconciliation Your functional specialization should cover Accounts MIS, daily costing, Accounts Reconciliation, and T...

Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in execution and debugging of test-suites at the GPU sub-system level Expertise in GLS (Gate-Level Simulation) Expertise in writing assertions and test benches using system verilog Expertise in UVM methodologies Expertise in Test planning Expertise in sub-system level DV Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan and Vietnam are the preferred work locations Preferred resources with valid regional work permit

Overview UVM Based verificaton at SOC level Responsibilities As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Requiremen...

Overview Lead Verification engineer Responsibilities As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches, test harnesses, while interacting with the extended team. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware and Software Engineering, to create a multi-model SoC that enables development of world-class hardware devices. Requirements Bache...

Job Description : Sub System Verification Lead : Team- Functional subsystem Verification team for MediaTek's TV/Automotive/5G/other advanced SoC development Roles Close co-work with global teams to define/verify new features for Mediatek next-gen SoC products Mentor cross-domain teams to achieve the verification goals Responsible for enhancing/developing subsys/SoC test plans and verification methodologies specific to a subsys. Be the domain expert to facilitate and set verification guidelines for global teams Opportunity to interact with top management for subsys verification related expert opinions Drive internal and 3rd party resources to build a strong subsys expertise at MediaTek Bangal...

Job Title: Lead Design Verification Engineer Location: m Bangalore Job Type: Full-time Experience Level: 7+ years Department: Hardware Engineering / VLSI Design Job Summary: We are seeking a highly experienced Lead Design Verification Engineer to lead verification efforts for complex digital designs. The ideal candidate will drive testbench architecture, verification planning, and execution for ASIC/SoC or FPGA-based designs, ensuring first-time-right silicon or system functionality. You will work closely with RTL design, DV, and system engineering teams to deliver high-quality products. Key Responsibilities: Lead and drive the verification strategy, planning, and execution for IP, subsystem...

order General information #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness,...

General Summary: QCT's Bangalore Wireless R&D(WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies. In this role of WRD Verification Engineer, you will be verifying Wifi and/or Modem from both TX and RX perspective. The responsibilities will majorly include :...

Role & responsibilities Description: Performs semiconductor design engineering assignments including engineering and designing chip layout circuits, circuit checking, documenting specifications, modifying and evaluating semiconductor devices and components. Reviews product requirements and logic diagrams for device definition. Typically responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. 3-5 years of experience Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and ...

Qualcomm India Private Limited is looking for an experienced individual with a strong knowledge of digital design and SOC architecture. You should have a good understanding of OOP concepts and hands-on experience in HVL such as System Verilog, UVM/OVM & System C, as well as in HDL such as Verilog. Knowledge of ARM/DSP CPU architecture and High-Speed Peripherals like USB2/3, PCIE, or Audio/Multimedia is essential for this role. Additionally, familiarity with Power-aware Verification, GLS, and Test vector generation would be a plus. Exposure to Version managers like Clearcase/perforce and proficiency in scripting languages like Perl, Tcl, or Python are desired skills. Analytical and debugging ...

At LeadSoc, we collaborate with renowned product companies in the Semicon, Telecom & Automotive sectors, focusing on VLSI Design, Embedded Systems, and Platform Software. If you are enthusiastic about tackling challenging assignments, we encourage you to reach out to us promptly! Engaging in a brief conversation with you will provide us with the opportunity to offer insights into the type of projects awaiting you. It will also help us understand your professional aspirations, facilitating the establishment of a meaningful connection and engagement. This position is based in Bangalore and requires 3 to 6 years of experience. **Technical Requirements:** - Proficiency in verification at SoC/Sub...

Qualcomm India Private Limited is seeking a WLAN Verification Engineer to join the Engineering Group, specifically in the Hardware Engineering team in Bangalore. As part of this team, you will be responsible for verifying the PHY Sub-System from both TX and RX perspectives for WLAN/WiFi solutions. Your role will involve understanding WLAN PHY TX and RX design paths, algorithms controlling wireless systems, and developing test plans to verify WiFi Standards including 11BE sequences and design components. Key Responsibilities: - Develop test plans and own end-to-end DV tasks for coding test bench, test cases, writing assertions, running simulations, and achieving coverage goals. - Explore inno...

As a DV Engineer focused on SOC design verification at Qualcomm India Private Limited, you will be responsible for understanding the internal requirements and complexities of a wide range of SOCs including auto, compute, mobile, XR-VR, and IoT. Your primary task will be to architect the necessary verification strategy, set up methodologies, develop test plans, and ensure that the design meets the highest quality standards. Early involvement in the product life-cycle is emphasized, requiring your participation in architecture/product definition. The ideal candidate should hold a B.E/B.Tech/M.E/M.Tech in Electronics with over 5 years of experience in the verification domain. Strong fundamental...

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for l...

The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates ...

General Summary: Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Scienc...

What You'll Do Cisco SiliconOne team is looking for an expert and talented ASIC Engineer. You will have an ASIC design background with hands-on experience in RTL design with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products. Responsibilities Looking for a Front-end Design ASIC Engineer. Architectural work: in-depth understanding of the architecture, and identification of problems and solutions. All aspects of implementation: specification, design, timing-analysis, power-optimization, flow automation, optimization of the logic for l...

Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IJTAG. and MBIST/LBIST. Experience in Tessent based ATPG flow, GLS and Post-silicon-debug. Hands-on in Perl/Tcl/Python scripting. Excellent analytical, and problem-solving skills. Perform Core and SOC level ATPG to meet Automotive grade quality. Hierarchical ATPG retargeting and Pattern release for application on ATE. Perform SOC and Core level Timing/Non-timing GLS. Silicon bring-up, diagnosis and support for physical failure analysis. Enable Emulation of Gate level SCAN patterns. Education Qualification: BTECH/MTECH in Electrical/Electronics/Computer Science Engineering o...

Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and ...

As a SOC Verification Engineer (SI80FT RM 3512), you will be expected to have hands-on experience in SoC DV flow. Your responsibilities will include working with SoC DV flow, as well as demonstrating expertise in GLS, low power simulations, and PCIe. You should have a minimum of 8 years of experience in this field and be able to join within a notice period of 0-30 days. This full-time position is based in Bangalore.,

We are seeking a Director of Engineering (Design Verification) to oversee and expand our DV practice. With over 15 years of experience in SoC/ASIC verification, exceptional technical expertise, demonstrated leadership abilities, and the talent to motivate high-performing teams, you will play a pivotal role in our organization. Responsibilities include leading end-to-end SoC/ASIC Design Verification programs, establishing DV methodologies, flows, and best practices (UVM, SV, C-based), delivering technical leadership and practical problem-solving, managing and guiding top-performing engineering teams, collaborating with cross-functional teams for project success, driving customer engagement, e...

You will be working as a DFT Engineer in Noida with the following responsibilities: Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IJTAG, and MBIST/LBIST. Experience in Tessent based ATPG flow, GLS, and Post-silicon-debug. Proficient in Perl/Tcl/Python scripting for automation and efficiency. Demonstrate excellent analytical and problem-solving skills. Conduct Core and SOC level ATPG to ensure Automotive grade quality. Handle Hierarchical ATPG retargeting and Pattern release for application on ATE. Execute SOC and Core level Timing/Non-timing GLS. Support silicon bring-up, diagnosis, and physical failure analysis. Facil...

Role & responsibilities Skill sets, experience, and qualifications needed for the role, such as gate-level simulation , verification, timing closures, and familiarity with Cadence tools. Primary and Secondary Skills : Clarification on the essential skills (e.g., GDS experience, timing closures, Cadence tool familiarity, digital design understanding) and advantageous skills (e.g., experience with DRAM or emerging memory). Confirmation that the role is for a digital verification engineer, primarily working on emerging memory products, focusing on GDS simulation, debugging, and resolving timing issues. Preferred candidate profile