962 Uvm Jobs

Job description About The Role Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications: 2+ years experience on AMBA protocols. Strong background and experience on Coherent Protocols (IDI, CHI). Strong coding experience in perl, python (one of the programming languages). Strong in coherency architecture. Preferred Qualifications: Bringing up coherent protocols from 0 to1. 2 + years of Experience on Network on Chip verification. 2+ years of experience developing protocol checkers, bridge checkers, VIP integration, Configurable IP verification.

Job description Intel's Graphic solutions are used by millions of people every day, changing the way the world sees in unprecedented ways. The Graphics IP team responsible for providing the next gen Graphics and High-Performance Compute IP's which go into SoC's in all of Intel Graphics IP products - Integrated, Discrete and Data Centre AI products. We strive to lead the industry through continuous innovation and world-class engineering. We are looking for Experienced Pre-Silicon RTL Design and Verification engineers, where you will work closely with architects/micro-arch's, structural design, and many simulator experts. If you have the desire and ability to learn quickly and gain new knowledge your potential here is limitless. With exciting work and by being at the at the very center of IP designing and validation and working alongside some of the best engineers in the industry, great learning is assured. Qualifications Bachelor / Masters degree in Electronics or Computer Engineering with 3-10 years experience in silicon design development. Well versed with Verilog / System Verilog / UVM. Experience in Pre-silicon verification, Testplan, testbench, Coverage/Assertion writing and closure. Exposure to CPU or GPU Architecture (Computer Architecture Knowledge) Debug Experience with industry standard frontend design and verification flows, tools and methodology Programming / scripting languages like Python, Perl, or Shell scripting automation methods. Good verbal/written communication skills. Effective team player with continuous learning mindset.Be willing to balance multiple tasks. Prior experience in IP development teams would be an added advantage. Experience in IP coverage and functional verification.

Job description About The Role You will be part of Intel Data Center and AI group driving Intel's latest AI SoCs in the World's leading process technologies. In this role you will be responsible to develop SoC / SS pre-Silicon functional verification environment along with a team of highly skilled engineers to verify system level design . Your role spans end to end Pre-Silicon verification from verification architecture definition to PRQ/ customer support.We're looking for a highly motivated, Pre-Silicon Verification Lead Engineer who will be responsible to : Define Verification architecture that is scalable across multi level verification for most advanced multi die SoCs Define domain level verification plan Develop VIPs, protocol checkers, scoreboards. Define coverage, assertion based verification methodologies. Work directly with hardware architects, logic designers to influence overall SoC and system design. Mentor and technically lead junior engineers. Qualifications Candidate should have a Bachelors/ Masters in Electrical or Computer Science Engineering or related field with 15+ years of technical experience. Related technical experience should be in/withSilicon Design and/or Validation/Verification.Preferred QualificationsExperience in CPU/ GPU verification Experience with SV/ UVM Language Experience with Formal verification techniques is a plus Strong background in scripting - PERL/Python System hardware and software debug skills Understanding of software hardware co-validation techniques Solid understanding of system and processor architecture, advanced memory and IO technologies

Job description About The Role You will be part of Intel Data Center and AI group driving Intel's latest AI SoCs in the World's leading process technologies. In this role you will be responsible to develop SoC / SS pre-Silicon functional verification environment along with a team of highly skilled engineers to verify system level design . Your role spans end to end Pre-Silicon verification from verification architecture definition to PRQ/ customer support.We're looking for a highly motivated, Pre-Silicon Verification Lead Engineer who will be responsible to : Define Verification architecture that is scalable across multi level verification for most advanced multi die SoCs Define domain level verification plan Develop VIPs, protocol checkers, scoreboards. Define coverage, assertion based verification methodologies. Work directly with hardware architects, logic designers to influence overall SoC and system design. Mentor and technically lead junior engineers. Qualifications Candidate should have a Bachelors/ Masters in Electrical or Computer Science Engineering or related field with 15+ years of technical experience. Related technical experience should be in/withSilicon Design and/or Validation/Verification.Preferred QualificationsExperience in CPU/ GPU verification Experience with SV/ UVM Language Experience with Formal verification techniques is a plus Strong background in scripting - PERL/Python System hardware and software debug skills Understanding of software hardware co-validation techniques Solid understanding of system and processor architecture, advanced memory and IO technologies

You are in search of an experienced senior verification engineer with over 10 years of expertise in ASIC/SOC/IP/block level functional verification utilizing system verilog/UVM. The perfect candidate for this role should possess a comprehensive understanding of UVM, advanced UVM, and system verilog. Your main responsibilities will include developing a detailed test plan, constructing a complete test-bench, and creating a robust verification environment that comprises interface agents and scoreboard in UVM. Additionally, you should have in-depth knowledge of at least one industry-standard protocol such as Ethernet, PCIe, DDR, USB. Strong debugging skills are essential to promptly address test-bench issues and failures. As part of this role, you will be accountable for verification closure by focusing on coverage and managing bug reports. Proficiency in utilizing industry-standard verification tools like Questa, VCS, or ModelSim is required. Experience with scripting languages like python, perl, or TCL for automation tasks is also beneficial. Furthermore, you will be responsible for managing a team of 6 to 7 Engineers and engaging with customers to provide task updates. Experience in collaborating with Japanese customers is a prerequisite for this position. Proficiency in the Japanese language is a mandatory skill. If you meet these qualifications and are enthusiastic about taking on these responsibilities, we encourage you to apply for this challenging and rewarding role.,

The job opportunity is based in Bangalore, Karnataka, India, where a new Silicon R&D center is being established. The center aims to pioneer the IPs that will power the digital ASICs for the future mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks, including the Ericsson Radio System - RAN Compute, Radio, and Transport. The goal is to enable communication service providers to exceed the expectations of their end-customers. The design centers aim to lead innovation in the telecommunications sector by leveraging cutting-edge tools and methodologies. As a team member, you will play a crucial role in shaping the future of global connectivity and contributing to the advancement of 5G and 6G technologies. You will have the opportunity to collaborate with talented teams globally, fostering a collaborative and innovative work environment that encourages creativity and teamwork. The work environment prioritizes work-life balance, professional growth, and continuous learning opportunities. The culture values diversity, innovation, and inclusivity. Key Responsibilities: - Participate in the verification of designs at the block or subsystem level. - Define and implement UVM-based test environments. - Contribute to the development and execution of Verification Strategies and Plans. - Develop, run, and debug test cases to ensure design quality. - Optimize verification methodologies and generate documentation. - Collaborate with verifiers, designers, and architects. - Build competence in the technical domain and engage in cross-team collaboration. Required Qualifications: - Bachelor's degree in electrical or computer engineering. - 5+ years of industry experience in verification using SystemVerilog and UVM. - Strong experience in developing verification test plans and test cases, formal verification, and implementing scoreboards and checkers. - Proficiency in SystemVerilog Assertions. Additional Requirements: - Experience with Cadence or Synopsys verification suites. - Team-oriented with strong communication skills. - Attention to detail, commitment to quality, and focus on meeting project deadlines. Preferred Skills: - Understanding of radio access systems and low-power design verification. - Knowledge of continuous integration systems, simulation environments, and issue-tracking tools. - Experience in verification of hardware domains such as AMBA-based designs, ARM-based systems, and digital signal processing systems. Join Ericsson for an outstanding opportunity to push the boundaries of technological possibilities, collaborate with diverse innovators, and craft solutions for the future.,

Are you interested in a unique opportunity to be a part of something great Would you like to join a 20,000-member team that is at the forefront of technology that powers the world around us Microchip Technology, Inc. offers an environment of trust, empowerment, respect, diversity, and communication. You will have the chance to own a piece of a multi-billion dollar global organization and more. At Microchip, employees are part of a culture that supports growth and stability. They are engaged and motivated by a wide range of products and solutions with unlimited career potential. The nationally-recognized Leadership Passage Programs at Microchip facilitate career growth for over a thousand individuals annually. The company is committed to employee development, values-based decision making, and fostering a strong sense of community based on its Vision, Mission, and 11 Guiding Values. This commitment has earned Microchip numerous awards for diversity and workplace excellence. As a Verification Engineer at Microchip, your responsibilities will include playing a key role in block-level verification. You will develop verification test plans based on design specifications, create test environments using System Verilog and UVM methodologies, and integrate with RTL while conducting basic simulation bring-up for the design. You will be tasked with generating code/functional coverage, analyzing coverage results, correlating them with the test plan, creating multiple test cases, and launching regressions. Additionally, you will collaborate with the design team to quickly identify and resolve design issues. The ideal candidate for this role will have expertise in domains such as AHB, AXI, PCIe, USB, and Ethernet. Proficiency in Verilog and System Verilog is essential, as well as familiarity with at least one of the following methodologies: OVM, UVM, VMM. Experience with EDA tools like Questasim, VCS, NCSim, or NCVerilog is required. You should have experience in developing test bench components at both block and SOC levels, creating test plans, and writing test sequences. Knowledge of functional coverage, code coverage, and assertions (OVA, SVA, PSL) is desirable. Strong analytical, problem-solving skills, excellent written and verbal communication in English, and a passion for teamwork and excelling in a competitive environment are also essential. Qualifications for this role include a Bachelor's Level Degree (ECE, EE / preferred specialization) with more than 9 years of work experience. The role may involve up to 25% travel time. Please note that Microchip Technology Inc. does not accept unsolicited agency resumes. Kindly refrain from forwarding resumes to the recruiting team or other Microchip employees, as the company is not responsible for any fees related to unsolicited resumes. Visit our careers page to explore exciting opportunities and company perks.,

Eridu AI India Private Limited, a subsidiary of Eridu Corporation, Saratoga, California, USA, invites highly motivated professionals to join its R&D center in Bengaluru. Eridu AI is a Silicon Valley hardware startup dedicated to enhancing training and inference performance for large AI models. By introducing innovative solutions in semiconductors, software, and systems, Eridu AI aims to optimize AI data center performance, increase GPU utilization, and reduce capex and power consumption. The company, backed by a team of experienced Silicon Valley executives and engineers, offers a unique opportunity to work on cutting-edge technology in the AI networking industry. As a Senior Manager at Eridu AI, you will lead the IC Verification team in Bengaluru, shaping the future of AI Networking. This role requires a self-driven individual with a passion for solving real-world problems and a desire to drive innovation in AI networking. Responsibilities: - Manage and lead the Bengaluru team of ASIC verification engineers, ensuring a collaborative work environment and effective communication across different locations. - Provide technical expertise in ASIC verification, ensuring compliance with industry standards and project specifications. - Conduct gate-level simulations, including timing and power analysis, to validate ASIC designs before tape-out. - Oversee RTL coverage analysis and provide feedback to enhance test suite thoroughness. - Collaborate with Firmware teams to ensure seamless integration between hardware and firmware components. - Mentor team members, identify training needs, and manage team augmentation in different locations. Qualifications: - ME/BE in Electrical Engineering, Computer Engineering, or related field. - Minimum 12 years of experience in ASIC verification, particularly in networking ASIC design. - Expertise in Hardware Verification Methodology, System Verilog, UVM, gate/timing/power simulations, and test-plan documentation. - Prior experience with Ethernet, UCIe, and PCIe protocols, high-speed SerDes, and global team management. - Excellent communication skills to lead and coordinate a diverse team effectively. Join Eridu AI to be part of a team that is revolutionizing AI infrastructure and shaping the future of AI networking. Your work will directly impact the next generation of AI networking solutions, pushing the boundaries of AI performance. The starting base salary will be determined based on skills, experience, qualifications, market trends, and comparable roles in the industry. Visit eridu.ai to learn more about our company and team.,

As a RTL Design Engineer for DDR Memory Controller IP development team at Cadence, your primary responsibility will be to design and support the RTL of the DDR Memory Controller solution. You will be working with the existing RTL, adding new features, and ensuring that all leading DDR memory protocols, including DDR4/LPDDR4, are supported. Your tasks will also involve ensuring customer configurations are clean as part of verification regressions, providing customer support, and ensuring the design meets LINT and CDC design guidelines. To qualify for this position, you should have a BE/B.Tech/ME/M.Tech degree in Electrical/Electronics/VLSI and proven experience as a design and verification engineer, with a significant focus on RTL design and development. Proficiency in RTL Design using Verilog is essential, and familiarity with System Verilog and experience in using/debugging in a UVM based environment are required. AXI3/4 experience is preferred, and prior experience with DDR Memory controller and protocols is highly advantageous. Additionally, having prior experience in RTL design and implementation of complex protocols and working in IP development teams will be beneficial for this role. At Cadence, we are committed to making an impact on the world of technology by hiring and developing leaders and innovators like you. Join us in our mission to solve challenges that others can't and be part of a team that is dedicated to work that matters.,

You Are: You are a highly skilled and experienced SoC Verification Lead with a passion for pushing the boundaries of technology. With a minimum of 5 to 20Years of experience in the SoC/IP/Subsystems verification domain, you possess deep technical expertise in various aspects of pre-silicon verification, including UVM, coverage analysis, verification plan creation, and debugging. You have a strong understanding of design concepts and ASIC flows, and you are adept at leading teams to perform verification on complex SoC/IP/Subsystems. Your knowledge of protocols such as PCIe, Ethernet, USB, and DDR, along with your hands-on experience with verification tools like VCS, waveform analyzers, and third-party VIP integration, makes you an invaluable asset. Excellent communication skills and the ability to mentor and guide your team are key aspects of your profile. You are proactive, able to anticipate and mitigate risks, and committed to adhering to high-quality standards. What Youll Be Doing Working with HCL customers to understand their needs and define verification scope and activities. Understanding the complexity and requirements of verification and proposing resource requirements to complete the activities. Leading a team of engineers to perform various pre-silicon verification activities on IPs/Subsystems. Anticipating problems and risks and working towards a resolution and risk mitigation plan. Assisting and mentoring the team in day-to-day activities and growing the capabilities of the verification team for future assignments. Reviewing various results and reports to provide continuous feedback to the team and improve the quality of deliverables. Reporting status to management and providing suggestions to resolve any issues that may impact execution. Collaborating with architects, designers, and pre and post-silicon verification teams to accomplish your tasks. Adhering to quality standards and good test and verification practices. Ramping up on new Verification tools and methodologies using Synopsys Products to enable customers. Working with other Synopsys teams including BU AEs and Sales to develop, broaden, and deploy Tool and IP solutions. The Impact You Will Have: Driving the success of customer projects by ensuring robust and thorough verification of SoC designs. Enhancing Synopsys' reputation as a leader in verification through high-quality deliverables and customer satisfaction. Mentoring and growing the verification team, building a strong foundation for future projects. Identifying and mitigating risks early, ensuring smooth project execution and delivery. Improving verification methodologies and practices, contributing to the overall efficiency and effectiveness of the team. Collaborating with cross-functional teams to achieve seamless integration and execution of verification activities. Providing valuable feedback and insights that drive continuous improvement in verification processes and tools. What Youll Need: B.E/B. Tech/M.E/M. Tech in electronics with a minimum of 12+ years experience in SoC/IP/Subsystems verification domain. Technical expertise in various aspects of pre-silicon Verification (UVM, Coverage Analysis, Verification plan creation, debugging, etc). Good knowledge of various protocols (PCIe, Ethernet, USB, DDR, etc) and/or processor/interconnect/debug architecture. Hands-on experience with verification tools such as VCS, waveform analyzers, and third-party VIP integration (such as Synopsys VIPs). Ability to lead a team to perform verification on complex SoC/IP/Subsystems. Experience with planning and managing verification activities for SoC/Subsystems/IPs. Strong understanding of design concepts, ASIC flows, and stakeholders. Good communication skills. Who You Are: A proactive and detail-oriented leader who can guide and mentor a team. An excellent communicator who can collaborate effectively with cross-functional teams. A problem-solver who can anticipate challenges and develop effective mitigation strategies. A continuous learner who stays updated with the latest verification tools and methodologies. A team player who values quality and strives for excellence in deliverables. Thanks & Regards, Magenderan.R Manager - Talent Acquisition HCLTech - ERS- Bangalore Semiconductor Email:[HIDDEN TEXT] Ph:8050996119 Show more Show less

Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS). Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus. Job Description In your new role you will: Candidate should have working experience with AMS Verification on multiple SOCs or sub-systems. One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS). Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus. Functional knowledge of analog and mixed signal building blocks, such as comparators, op-amps, switched cap circuits, various types of ADCs and DACs, current mirrors, charge pumps, and regulators is expected. Working knowledge of Perl / Skill/ Python/Tcl or other scripting relevant language is a plus. Candidate should have ability to lead a project team, and work collaboratively in a multi-site development environment. Your Profile You are best equipped for this task if you have: Bachelors with 5+ years or Masters with 4+ years of experience Analog: functional spec understanding of standard power management blocks, clock circuits and data converters. Loop analysis is an added advantage HDL/HVL: Verilog/Verilog-ams, SV/UVM added advantage Tools: Cadence Xcelium + spectre/ Synopsys XA-VCS/ Mentor Eldo ADMS Automation: Perl/python/shell Schedule and result oriented execution mindset, flexible in working as per the project scope needs, Exploring and experimentation for continuous methodology improvements Ability to drive projects and debug independently Contact: [HIDDEN TEXT] #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicants experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Functional knowledge of analog and mixed signal building blocks, such as comparators, op-amps, switched cap circuits, various types of ADCs and DACs, current mirrors, charge pumps, and regulators is expected. Working knowledge of Perl / Skill/ Python/Tcl or other scripting relevant language is a plus. Candidate should have ability to lead a project team, and work collaboratively in a multi-site development environment. In your new role you will: Behavioral modeling: Verilog, Wreal or SV-RNM -Full AMS Verification for SoC or IPs -Full Test plan preparation as per the dynamics of product specifications - Full Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -partial Testcase Debug & proposing new scenarios - Partial Handling project dynamics on scope, schedule and effort coming up with alternative verification plans, Mentoring Junior engineer Partial Ability to drive MSV project independently Drive enhancements in known methodologies You are best equipped for this task if you have: Bachelors with 5+ years of experience Analog: functional spec understanding of standard power management blocks, clock circuits and data converters. Loop analysis is an added advantage HDL/HVL: Verilog/Verilog-ams, SV/UVM added advantage Tools: Cadence Xcelium + spectre/ Synopsys XA-VCS/ Mentor Eldo ADMS Automation: Perl/python/shell Schedule and result oriented execution mindset, flexible in working as per the project scope needs, Exploring and experimentation for continuous methodology improvements Ability to drive projects and debug independently Contact: [HIDDEN TEXT] #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicants experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

You are a talented and motivated Design Verification Engineer with 6-15 years of experience, sought by HCLTech VLSI division in Bangalore. Your role is crucial in ensuring the functionality and quality of next-generation integrated circuits. You will be working on challenging projects, utilizing your expertise in verification methodologies and tools. Your responsibilities will include developing and implementing verification plans using industry-standard methodologies like UVM. You will design and write robust verification environments to achieve high code coverage. Utilizing simulation tools such as ModelSim, Cadence Incisive, and Synopsys VCS, you will verify RTL functionality and debug verification failures to identify design issues" root cause. Collaboration with RTL design engineers to resolve bugs and ensure design revisions meet verification requirements is key. Your participation in code reviews and adherence to verification coding standards is essential, along with staying updated on the latest verification tools and methodologies. To qualify for this role, you should hold a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree is a plus). Your 6-15 years of experience in design verification for ASICs or SoCs, strong understanding of digital design principles, and proficiency in Verilog or VHDL with experience in methodologies like UVM are required. Experience with simulation tools and scripting languages like Python and Perl will be advantageous. Excellent analytical, problem-solving, communication, and collaboration skills are essential for effective team work. In return, HCLTech offers a competitive salary and benefits package, the opportunity to work on cutting-edge technologies and projects, a collaborative and dynamic work environment, and potential for professional development and career advancement. Thank you, Magenderan.R Manager - TAG HCLTECH,

Siemens EDA (Formerly Mentor Graphics) is seeking a dynamic and professional Product Engineer (PE) who enjoys multi-tasking in a fast-paced, technical, and friendly environment! In this position, you will be focused on product and deployment scalability of the Austemper Functional Safety products. The ideal candidate will be working closely with product development teams, marketing managers, application engineers, and customers. Some domestic and international travel will be required. As a PE, you will work with us to define feature and product requirements for functional safety products, addressing current and emerging automotive safety challenges. Collaborating with product development and marketing teams, you'll connect these challenges with Siemens technical solutions. You will guide customers on functional safety methodologies and drive product rollouts for next-generation products. Responsibilities include market research, product positioning, and creating presentation materials. You'll present and demonstrate Austemper Functional Safety products at conferences and events, while collaborating actively with customers to understand challenges, deliver training, and provide solutions. Strong customer relationships and problem-solving are key to success in this role. An ideal candidate will have some verification experience and knowledge of reliability or safety standards. Additional responsibilities include: - Managing technical relationships with Siemens existing customer base. - Developing a network of technical relationships at a peer-to-peer level with both our customers and the product engineering teams. - Delivering technical presentations, demonstrations, and training to a range of audiences including users, managers, and decision-makers. - Influencing product direction by gathering customer requirements and defining the use models which drive the product development and marketing teams. - Participating in new feature specification, development, and validation process to ensure the product will meet customer requirements. - Great teammate with the capability to work across geographies in a multi-functional environment. Qualifications / Experience: - B.S.E.E/M.S.E.E. or equivalent preferred with 5+ years of experience. - Hands-on experience with Functional Safety standards and FMEDA calculations. - UVM experience desired. - Graphical interface development experience desired. - Strong verbal and written communication skills; good presentation skills. Good problem-solving and debugging skills. - Exposure to sales and applications environment is a plus. - Occasional travel, up to 30%, is required. We are Siemens, a collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!,

The ideal candidate for this role will be an RTL engineer with over 8 years of practical design and verification experience using SystemVerilog UVM and ASIC verification. You should have hands-on experience with Synopsys and/or Cadence simulation tools, as well as proficiency in RTL and possibly Gate level debug. Desirable skills for this position include experience with Synopsys and/or Cadence Synthesis, STA, DFT, Formal Equivalence tools, and familiarity with JIRA. It would be beneficial to have knowledge of scripting languages such as Python or equivalent, understanding of PLLs, and experience with mixed-signal design modelling and debugging. Keywords: UVM, RTL, SystemVerilog, Synthesis, Analog.,

The role of (VLSI) Design Verification (DV) involves working on functional specifications of IPs, subsystems, and SOC. You will be responsible for reviewing and revising designs, utilizing System Verilog and UVM for verification. Your tasks will include performing RTL simulations using Synopsys and Cadence simulators, as well as working with UPF. We are looking for candidates who can join immediately and hold a degree in BE, B.Tech, ME, or M.Tech. This position is based in Bangalore, Hyderabad, Kochin, and Pune. If you are interested in this opportunity, please reach out to us at career@krazymantra.com.,

Come build community, explore your passions, and do your best work at Microsoft with thousands of University interns from every corner of the world. This opportunity will allow you to bring your aspirations, talent, potential, and excitement for the journey ahead. As a Silicon Engineering Intern, you will design, develop, modify, and evaluate electronic parts, components, or integrated circuitry for digital electronic devices and other digital electronic systems. You will define design architecture and operating parameters for circuitry and microelectronic components, as well as select components and equipment based on analysis of specifications and reliability. Analyzing designs and components to establish operating parameters and performance requirements to define complete pre-silicon verification test cases will be part of your responsibilities. Additionally, you will develop test plans, direct support personnel or other engineers in the preparation and execution of design verification testing, and analyze data generated from test results to perform pre-silicon verification of operating parameters and performance requirements. At Microsoft, Interns work on real-world projects in collaboration with teams across the world while having fun along the way. You'll be empowered to build community, explore your passions, and achieve your goals. This is your chance to bring your solutions and ideas to life while working on cutting-edge technology. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees, we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. Responsibilities include contributing to and improving the hardware solutions developed, using performance instrumentation and presenting results to the team and architects, thinking strategically, creatively, and innovating ways to communicate and visualize user experiences, implementing or recommending technical solutions to common quality and design challenges with guidance from others, writing complete design verification test cases, test benches, or automation using standard practices, and assisting in writing tests for formal pre-silicon verification of subsystems within a single block. **Qualifications:** **Required Qualification:** - Currently pursuing a bachelor's degree in Electronics Engineering, Electrical & Electronics, or Computer Science Engineering. **Preferred Qualifications (PQs):** - Experience or classes in Microelectronics/VLSI courses, Digital Logic Design and Simulation, Object-Oriented Programming and Data Structures, Embedded Systems and Firmware. - Knowledge of verification principles, testbenches, UVM, C/C++ and scripting languages, digital timing analysis, synthesis, place-n-route, circuit design including VLSI design and solid-state devices.,

As a Verification Engineer at CoreIC Technologies, located in Bengaluru, you will contribute your expertise in Embedded Display Port (EDP) and DDR protocols to our dynamic team. With a minimum of 6 years of experience, you will play a crucial role in SoC-level verification using C/C++. Your responsibilities will include developing and executing verification plans for EDP and DDR, building and maintaining testbenches and simulation environments, performing functional and regression testing, as well as debugging issues in close collaboration with design and software teams. To excel in this role, you should possess a minimum of 4 years of experience in Design Verification, a deep understanding of EDP & DDR protocols, and proficiency in C/C++ for SoC verification. Exposure to SystemVerilog/UVM is considered an advantage. Strong problem-solving skills and effective communication abilities are essential traits for success in this position. As a qualified candidate, you should hold a B.E./M.E. degree in Electronics or a related field. If you are excited about the opportunity to join our team and contribute to cutting-edge technology developments, please send your resume to Kriti.tripathi@coreictech.com or directly message us. Join us in shaping the future of technology at CoreIC Technologies. #Hiring #VerificationEngineer #DisplayPort #DDR #SoC #VLSIJobs #BangaloreJobs #CoreICTechnologies,

You are an experienced AMS Verification Engineer with over 8 years of expertise in AMS IC verification, possessing hands-on experience in VerilogAMS, SystemVerilog, and UVM. Your strong skills lie in VerilogAMS and Real Number Modeling, and you have a solid understanding of Cadence tools, VManager, and Tcl/Perl. Any knowledge or experience in Analog/RF would be considered a valuable advantage. The location for this position is in Bengaluru. If you believe you are a suitable candidate for this role, we encourage you to reach out by either sending a direct message or sharing your CV to aayushi.sharma@saracasolutions.com. Join us in shaping the future of semiconductors!,

You are a skilled SOC Verification engineer with over 3 years of experience in the field. Your expertise includes a strong knowledge of ARM architecture, CPU fundamentals, and Cache coherency. You are proficient in programming languages such as C/C++, assembly, and scripting languages. Additionally, you have a good understanding of low-power design and verification methodologies. In this role, you will be responsible for developing CDV UVM verification environments at the system level. You will verify CPU connectivity to IP blocks and develop SoC test plans and test cases. Tracking metrics, including code and functional coverage, will be an essential part of your responsibilities. To qualify for this position, you should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field. You must have a minimum of 3 years of experience in SoC ASIC/FPGA verification. Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM) is required. Experience with simulation, emulation, and formal verification techniques is also necessary. Strong debugging and problem-solving skills will be beneficial in this role. This position is located in Noida, and the ideal candidate should possess a BTECH/MTECH degree in Electrical/Electronics/Computer Science Engineering or an equivalent field.,

HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. With a strong foundation built on four decades of innovation, a world-renowned management philosophy, and a relentless focus on customer relationships, we pride ourselves on our culture of invention and risk-taking. HCL is committed to diversity, social responsibility, sustainability, and education initiatives, exemplified by our worldwide network of R&D facilities and co-innovation labs. With over 187,000+ Ideapreneurs across 50 countries, we deliver holistic services across industry verticals to leading enterprises, including 250 of the Fortune 500 and 650 of the Global 2000. Enterprises today are at a critical juncture where digital technologies such as analytics, cloud, IoT, and automation are key to success. To help enterprises leverage these technologies for their business objectives, HCL offers an integrated portfolio of products and services through three business units: IT and Business Services (ITBS), Engineering and R&D Services (ERS), and Products and Platforms (P&P). As a Technology Manager at HCL Technologies in Ha Noi or Ho Chi Minh (Vietnam), your responsibilities will include managing technology in projects, providing technical guidance or solutions, developing and guiding team members to enhance their technical capabilities, preparing status reports to minimize exposure and risks on projects, ensuring process compliance, and participating in technical discussions or reviews. **Responsibilities:** - Manage technology in projects and provide technical guidance or solutions - Develop and guide team members to enhance their technical capabilities - Prepare and submit status reports to minimize exposure and risks on projects - Ensure process compliance in the assigned module and participate in technical discussions or reviews **Requirements:** - 5+ years of experience - Bachelors/Masters degree in Electronics/Electrical Engineering with 5+ years of experience in verification - Good understanding of ASIC/SoC life cycle - Experience in OVM/UVM methodologies using SV - Experience with Full chip test plan development/modification - Experience with Testbench development/modification, Test case development, coding, execution, bug analysis, Regressions, coverage analysis, Verification closure - Experience in prevalent standards & Protocols viz. PCIe Gen3/4/5/USB3/DDR4/5, /Ethernet/CSI2/I3C/AMBA - Experience with Gate level simulations - Experience in scripting - Participation in multiple ASIC/SoC verifications till tape out stage - Good command of English. Opportunity to work onsite in Japan **Benefits:** - 18 paid leaves per year (including 12 annual leaves + 6 personal leaves) - Insurance plan based on full salary + 13th salary + Performance Bonus - 100% full salary in probation period - Medical Benefit for Employee and Family - Fast-paced, flexible, and multinational working environment - Opportunity to travel onsite (in 49 countries) - Internal Training (Technical & Functional). Scope of English Training - Working hours: 8:30 AM-6:00 PM, Mondays to Fridays,

XIMAX SOLUTIONS in Bengaluru is passionate about talent acquisition, HR consultancy, and career development. We specialize in connecting the right talent with the right opportunities, fostering meaningful relationships, and guiding professionals towards fulfilling careers to drive success and unlock potential. We have the following job opportunities available: **Job 1: Verification Engineer (ARM CPU Based Sub-System, C Programming)** - **Location:** Bangalore - **Experience Required:** 7+ years - **Employment Type:** Full-time **Key Skills & Requirements:** - Expertise in verifying ARM CPU-based sub-systems - Proficiency in C programming - Strong knowledge of verification methodologies - Experience with System Verilog and UVM - Ability to create and execute test plans - Excellent debugging and analytical skills **Job 2: Verification Engineer (SV & UVM)** - **Location:** Bangalore - **Experience Required:** 5+ years - **Employment Type:** Full-time **Key Skills & Requirements:** - Proficient in System Verilog and UVM. - Strong knowledge of verification methodologies. - Experience with simulation and debugging tools. - Ability to create and execute test plans. - Excellent problem-solving and analytical skills. - Strong communication and teamwork skills. If you meet the requirements for either of these positions and are interested in joining our team, please send your resume to ramya@ximaxsolutions.com by 7th October 2024. Join us at XIMAX SOLUTIONS and be a part of the future of semiconductor innovation! Apply here: [Job Application Form](https://forms.gle/b15i5gFeFb9jnN7D9),

Job description In this role, you will be creating UVM testbenches for a SoC and IP, as well as tests, regressions, and functional coverage to achieve zero bug escapes. You will interface with the designers to develop the test plans, and from that develop testcases and coverage to thoroughly verify the RTL. Your regressions will grow to cover the full functionality of the design relative to the architectural simulator and will include corner case testing for the more challenging cases. Your test and coverage reviews will ensure key coverage. ESSENTIAL DUTIES AND RESPONSIBILITIES: Create UVM testbenches, tests, and constraints to ensure design correctness Design, develop, and maintain modular and reusable UVM testbenches for blocks Collaborate with colleagues to develop test plans Create randomized tests, adding constraints and directed tests to fully cover functionality Confirm test completeness through code and functional coverage Review testbenches, tests, and coverage with designers, architects, and SW engineers Integrate tests and coverage within full environment Write C based BareMetal code for SoC level verification Relevant experience of 3-10 years Show more Show less

Position : ASIC Design Verification Engineer Requirements : 2Years to 15Years experience in SystemVerilog/UVM-based verification for IP/SoC Skills in assertions, formal verification and emulation Experience with high-speed interfaces (PCIe, DDR, Ethernet), scripting (Python, TCL, Perl) and working across cross-functional teams Responsibilities : Full verification closurefrom test planning and testbench development to formal, emulation-based verification and ensuring first-pass silicon success Role & responsibilities Preferred candidate profile

Core Technical Skills : SystemVerilog / UVM testbench and coverage methodologies Constraint-random verification, simulation and debug flow Formal verification techniques (e.g. Jasper, VC Formal) Scripting languages: Python, TCL, Perl, Shell Experience with high-speed protocols (PCIe, DDR, Ethernet) and emulation tools Resume & Interview Prep Advice : Highlight projects involving ASIC/SoC verification, testbench implementation, coverage closure using UVM/SystemVerilog Reddit+15Reddit+15Meta Careers+15Indeed+8Atos Jobs+8Indeed+8Reddit+1Indeed+1Reddit+2Meta Careers+2Reddit+2Reddit+2Reddit+2Reddit+2 Showcase contributions in debugging RTL, developing functional coverage models, and scripting automation for regressions Next Steps Role & responsibilities Preferred candidate profile