630 Cdc Jobs

About The Role Project Role : Custom Software Engineer Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : SAP FI CO Finance Good to have skills : NA Minimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various teams to ensure that project goals are met, facilitating discussions to address challenges, and guiding your team through the development process. You ...

Role: Lead /Senior RTL Engineer Experience: 8 to 12 Years Location: Hyderabad Job Description: Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDD...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on exp...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

SoC Front End Design Engineer Company:** NXP India Pvt. Ltd. - Noida Job Summary We are seeking a highly motivated and skilled SoC Front End Design Engineer to join our dynamic team in Noida. This role involves contributing to the design and development of complex System-on-Chip (SoC) architectures, ensuring high-quality and high-performance solutions for next-generation automotive and IoT products. Responsibilities Participate in the architectural definition and micro-architecture development of SoC blocks and sub-systems. Perform RTL design and coding (Verilog/SystemVerilog) for various digital blocks, ensuring adherence to design specifications and best practices. Conduct extensive design...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Job Title: Wireless R&D IP Design Specialist Location: Bangalore Roles And Responsibilities Contribute to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Define and develop next-generation Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture and RTL coding using System Verilog, Verilog, or VHDL. Collaborate with multi-geo teams for design and verification. Technical Requirements Strong experience in IP design (preferably wireless/DSP domain). Exposure to synthesis and Stat...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Job Title: Wireless R&D IP Design Specialist Location: Bangalore Roles And Responsibilities Contribute to flagship Wireless IP development covering WAN, WLAN, GNSS, and Bluetooth technologies. Define and develop next-generation Wireless R&D products. Work on front-end RTL design for wireless IP or DSP-based IPs. Develop micro-architecture and RTL coding using System Verilog, Verilog, or VHDL. Collaborate with multi-geo teams for design and verification. Technical Requirements Strong experience in IP design (preferably wireless/DSP domain). Exposure to synthesis and Stat...

Hi all here we have openings for ASIC design engineer. Pls find below jd ASIC Design Engineer Experience : 5-9years Location : Hyderabad. Mode : work from Office Notice period: 0-30days Understanding of IP design, RTL coding, Verilog/SV Proficient in RTL simulation tools Knowledge of High-speed interfaces PCIe, Ethernet, DDR AMBA AXI/AHB/APB Protocol Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Perl, Python, Unix shells and Make files. Excellent communication skills and experience working with global teams Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC...

Greetings from for the Day We have challenging roles at WIPRO, Please find the below active requirement. Please share your updated resume if your interested to apply for the current roles. ASIC RTL Engineer (RTL Design, RTL Coding & Integration, IP, targeted for SOC, Static checks, Protocols - PCIe, DDR, Ethernet,I2C, UART, SPI) Experience : 6 Years 22 Years Work Location : Bangalore / Hyderabad / Kochi / Pune Work Mode : Hybrid (3 days Work From Office) Employment Type : Full Time with Wipro Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of sy...

Experience: 5+ years as STRIIM Developer Domain: Telecom domain experience is a plus Communication: Excellent verbal and written communication skills Responsibilities: Build and configure real-time data pipelines Work on CDC connectors and transformations Integrate Striim with data lakes and downstream systems Qualifications Bachelor of Engineering

SME Informatica / Celebrus (Administration, Architecture & Advanced Operations) Required Technical Skill Set Informatica (Axon, EDC, IDQ, CDC) advanced administration, architecture design, performance tuning, workflow optimization, data governance & metadata management, patch/upgrade planning, capacity management, automation (Unix Shell/Python/Ansible), SQL/PLSQL, backup/recovery, security & compliance, monitoring/alerting frameworks. Celebrus advanced platform administration Collection/Configuration/Profile servers, clustering, data enrichment, data loader, data streams, activation pipelines, dashboards, event store, SSL & license management. Must-Have - Deep expertise in Informatica admini...

Requirements Description and Requirements Knowledge of transmission equipment and associated terminologies. Knowledge of and demonstrated ability to isolate and resolve troubles in access systems, SONET transport technologies, EDSX cross-connects, OTN, CPL, CDC, PTS, RLS/ELS, synchronization Knowledge of transport hierarchies (OTU, OCx, SONET, STSx, Tx, etc.) Should have worked on transport equipment like Ciena/ Nortel, Fujitsu, Nokia / Alcatel Lucent. Collaborate with other team members for trouble resolution Work with technicians who call in for assistance and/or are acting as hands and feet for assurance on-site Initiate and/or respond to queries, discuss trouble details and confirm resol...

Role Overview: You should have experience working on Video domain IPs and Digital IPs. Additionally, you should have expertise in one or more protocols at the IP level such as MIPI CSI, MIPI DSI, DisplayPort, HDMI, or SDI. Key Responsibilities: - Hands-on experience with architecting and micro-architecture - Verilog/System Verilog RTL coding for FPGA designs - Experience with lint, CDC, synthesis flow, static timing flows, and formal checking Qualification Required: - Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Science Engineering, or equivalent Experience: You should have 7-12 years of relevant experience in FPGA design.,

General Summary: Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 8 to 10 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FVExperience in Logic design/micro-architecture/RTL coding is a must.Must have hands on experience with design and integration of complex multi clock domain blocksExperience in Verilog/System-Verilog is a must.Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architectureHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.Work closely with the Design verification and va...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

Modernize chip solutions is hiring for the RTL Design Engineer Exp:5-12 yrs Loc: BLR Np: 15-30 days Exp: 5+yrs Skills:RTL with mipi exp Loc: HYD If Interested, please share your profile to mail id sushma.vunnam@modernchipsolutions.com

Responsibilities : Maintain & Monitor entire Hospital HIC practices along with the ICO s guideline in alignment with WHO,CDC, State, National guidelinesWork within the multi-disciplinary infection control committee, lead and coordinate the work to support the development of long terms infection prevention and controlled strategies and annual infection prevention and control program To implement the policy and procedure laid down in infection manual in all areas of hospital BMWEnsure Training been provided to all Healthcare workers in the organization on HIC policies , HAI bundle care for nurses ICN will lead the program of infection prevention in hospital premises as per national and CDC gui...

Role & responsibilities : Data Pipeline Development & Management Design and implement robust, scalable ETL/ELT pipelines using Databricks and Apache Spark Process large volumes of structured and unstructured data Develop and maintain data workflows using Databricks workflows, Apache Airflow, or similar orchestration tools Optimize data processing jobs for performance, cost efficiency, and reliability Implement incremental data processing patterns and change data capture (CDC) mechanisms Databricks Platform Engineering Build and maintain Delta Lake tables and implement medallion architecture (bronze, silver, gold layers) Develop streaming data pipelines using Structured Streaming and Delta Li...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Design, develop, and improve software using various engineering methodologies. Ensure code is scalable, maintainable, and optimized for performance. Collaborate with product managers, designers, and other engineers to define software requirements. Participate in code reviews and promote a culture of code quality and knowledge sharing. Stay informed of industry technology trends and contribute to the organization's technology communities. Adhere to secure coding practices to mitigate vulnerabilities and protect sensitive data. Job Requirements Mandatory skills include Go Lang expertise, AWS Connect and lambda, and strong work experience in Dynamo DB. Java is an essential skillset for this rol...

About The Role Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies.In this role, you will: Implement FPGA code on target hardware and test with system components and software. Perform RTL design, implementation, testing, and integration of FPGA-based systems. Deliver high-performance hardware solutions for Datacom and Aerospace applications. Participate in R&D activitie...

Architect and design state-of-the-art RTL for DesignWare IP cores, focusing on protocols such as UALink, Ethernet, DDR, PCIe, and USB. Create and document detailed architecture and micro-architecture specifications for medium to high complexity design components. Perform individual contributor and technical lead responsibilities, including RTL coding, synthesis, CDC analysis, debugging, and test development. Collaborate with verification teams on test planning, coverage planning, and verification closure to ensure high-quality deliverables. Interact with customers to understand and translate specification requirements into robust design solutions. Mentor and technically lead a team of design...

We''re seeking a talented ASIC engineer with a proven track record in high-performance products, ready to make a significant impact in the industry. Join us and push the boundaries of what''s possible!Your ImpactYou are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless ...

SUMMARY Max CTC : 21,330 Work Timings : US Shift/ Night Shift Contract Duration : 6 months Work location : CDC 5,Shollinganallur Important Pointers Candidate should be flexible to WFO Should be comfortable in International Voice Process. English communication should be excellent. Retention Bonus will be paid as follows 3months 5,000 3+6months -10,000 3+6+6months 10,000 Requirements Any Non Technical Graduates with Good communication skill Eligible. No PG and BE / BTECH Graduate is Eligible Should be able to Speak & Write good English with proper punctuation & grammar. Benefits PF,ESI BOTH WAY CAB(Pickup and drop will be provided) Work From office