452 Cdc Jobs

Role & responsibilities : Data Pipeline Development & Management Design and implement robust, scalable ETL/ELT pipelines using Databricks and Apache Spark Process large volumes of structured and unstructured data Develop and maintain data workflows using Databricks workflows, Apache Airflow, or similar orchestration tools Optimize data processing jobs for performance, cost efficiency, and reliability Implement incremental data processing patterns and change data capture (CDC) mechanisms Databricks Platform Engineering Build and maintain Delta Lake tables and implement medallion architecture (bronze, silver, gold layers) Develop streaming data pipelines using Structured Streaming and Delta Li...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

RTL & Synthesis combined skills Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Excellent communication skills, both verbal and written Experience: 5-8 years of experience in RTL Design with exposure to synthesis OR 8+ years of experience in RTL Design Strong understanding of digital basics Proficiency in RTL coding (Verilog), IP design, and RTL integration Hands-on experience with LINT, CDC, and RDC Experience in writing UPFs and CLP/VCLP checks Familiarity with synthesis flow and validating design constraints Specific domain knowledge in ARM protocols, PCIe, Ethernet, RISC V, DDR, etc. Strong scripting knowledge Responsibilitie...

ASIC RTL Design Engineer Job Title: ASIC RTL Design Engineer Position Experience Level: 6 to 10 years Location: Bangalore About The Role : We are seeking a highly skilled and experienced ASIC RTL Design Engineer to join our team in Bangalore. The successful candidate will have 6 to 10 years of relevant experience and will play a crucial role in the design and integration of RTL components for complex ASIC projects. The candidate should possess a strong background in RTL UPF, SoC Design Integration, and multi-domain UPF methodologies. Additionally, a strong understanding of resolving VSI issues is required to excel in this role. Key Responsibilities: RTL UPF Experience: The ideal candidate sh...

RTL DESIGN LEAD ENGINEER RTL DESIGN LEAD ENGINEER The ideal candidate will be required to work on both IP development and integration into SoCs catering to various markets and tech nodes. The job will involve RTL design, front-end tools flow, and SoC integration/porting-related tasks. Desired Skills and Experience- 8+ years of Experience Engineering experience with exposure to front end ASIC tool flows Should be self-driven and independent in tracking and closing tasks with respective holders. In depth knowledge of AHB and bus infrastructures like matrix and fabrics Good understanding of ARM based SoC Architecture Exposure to ARM Cortex A/M integration or support Good understanding of SoC DV...

Pre-Silicon Validation Engineer Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, ...

Role & responsibilities Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDDR.

As an RTL Design/Hardware Engineer at Qualcomm India Private Limited, your role will involve designing and leading all Front-end design activities for Display Sub-system, delivering cutting-edge solutions for various Qualcomm business units like VR, AR, Compute, IOT, and Mobile. You will collaborate closely with cross-functional teams located in different time zones to research, design, and implement performance and power management strategies for the product roadmap. Key Responsibilities: - Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks. - Work closely with technology/circu...

As a Technical Account Manager (TAM) at our company, you will be a crucial part of the TAM team, showcasing your deep technical expertise and customer-facing skills to shape and implement the team's organizational strategy. Your role will involve collaborating with various departments like product, field sales, engineering, and marketing to drive customer adoption and success. **Role Overview:** You will be responsible for building strong, technical relationships with key enterprise customers having large and complex SingleStore deployments. Your impact will extend to developing applications that revolutionize business operations. As a TAM, you will guide clients in seamlessly operationalizi...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

We are looking for a passionate and experienced EDA Methodology Engineer to join our ASICdesign team, focusing on Spyglass lint checking using Synopsys Spyglass for CDC/RDC. In this role, you’ll work closely with design teams and EDA vendors to develop and implement robust verification flows that ensure structural correctness across design stages Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Bachelor’s or Master’s degree in Computer Science, Electronics Engineering, or VLSIDesign. 5–8 years of hands-on experience with Synopsys Spyglass. Strong understanding of RTL design languages: VHDL, Verilog, SystemVerilog. Expertis...

Your Role As a SoC Integration Engineer , you will play a key role in the design and integration of System-on-Chip (SoC) components, contributing to the development of high-performance semiconductor solutions. Youll work on RTL coding, verification flows, and integration of IP blocks, ensuring robust and efficient designs that meet industry standards. In this role, you will: Integrate SoC components and contribute to RTL coding and micro-architecture design. Work with tools and flows such as Spyglass-Lint, CDC, DC-Synthesis, and VCLSP. Develop and maintain scripts using Perl, Python, Shell, and Tcl to automate design tasks. Collaborate with cross-functional teams to ensure seamless SoC integ...

Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter

FPGA development, debug, or customer support experience in large, complex designs. Strong knowledge of PCIe, CXL, and NVMe protocols. Expertise in FPGA debugging, board-level troubleshooting, and signal integrity analysis. Mail id ta6@nippondata.com

Expertise in ASIC RTL Design Expertise in ASIC IP Design Expertise in CDC and Lint tools Expertise in design and simulation tools Expertise in Video processing algorithms / interfaces Expertise in CXL / PCIe Protocol, 5G, Datacenter

Job details: Job Title: Digital RTL Design Engineer Location: On-Site Experience Level: Mid-Senior (3-7 years) Job Description: Responsibilities: Design and implement digital RTL for complex systems. Collaborate with verification engineers to ensure design meets all functional and performance requirements. Perform synthesis, timing analysis, and optimization to meet design specifications. Debug and resolve design issues, ensuring high-quality and reliable designs. Participate in design reviews and provide constructive feedback. Document design processes, specifications, and methodologies. Work closely with cross-functional teams (DFT, PD, DV) for integration and sign-off. Requirements: Bache...

Role & Responsibilities: Design, develop, and optimize robust ETL processes using IBM DataStage v11.x Build complex DataStage Parallel Extender jobs (Aggregator, Lookup, Merge, XML, Java Stages) Ensure high-quality ETL pipeline architecture, performance tuning, and data integrity Collaborate with DB teams and cross-functional stakeholders Handle job scheduling (Control-M, Autosys, Tivoli) and batch execution Contribute to architectural decisions, UDFs, CDC implementation, and Unix shell scripting Preferred Candidate Profile: 5+ years of solid hands-on experience in DataStage v11.x Excellent in PL/SQL, DB2, Unix/Linux Experience with CP4D / Cloud Pak for Data is a big plus Strong analytical a...

Job Description: Should be good in Integration of SOC & RTL coding. Should be aware of soC flow like Spyglass-Lint/Synthesis (DC)/CDC. Should be aware of scripting language. Candidate should have experience on SOC Integration, SpyGlass Lint, CDC, DC-Synthesis & VCLSP. Should have good understanding of SoC flows. Primary Skills: VHDL, Verilog, Micro-architecture, RTL coding, CDC, Lint, Synthesis, STA, IP development, SoC integration, VCLP, scripting - Perl, Python, Shell, and Tcl. Secondary Skills: Synopsis/Cadence tool flow, ARM Coretex, DMA, DDR, SPI, I2C, UART, AHB/AXI/APB, Ethernet, USB, PCIe, Mipi CSI/DSI, LPDDR.

Front End Synthesis and Implementation Engineer - Job Description Front End Synthesis and Implementation Engineer Join the India team of a cutting-edge, well-funded storage startup in Silicon Valley as the Front End Engineer responsible for implementing complex SoCs using ARM architecture. As a Front End Engineer, you will work on SoC RTL and its implementation and quality checks such as synthesis, lint, CDC, and other aspects of the SoC implementation process. You will be involved in checks and flow management for both high-performance, multi-million gate complex IPs and SoCs. You will also be responsible for Power, Performance, and Area (PPA) analysis and optimization, as well as ensuring ...

SAP Data Integration & Snowflake Lead | Remote | 2–11 PM IST Email: kshitij.gawali@enlinkit.com Expert in SAP data extraction & integration to Snowflake, handling delta/full loads, CDC, ECC/S4 data, and replication tools (SNP Glue/SLT).

Description We are seeking an experienced RTL Lead for our VLSI team in India. The ideal candidate will have a strong background in RTL design and verification, with a proven track record of leading complex projects in the semiconductor industry. Responsibilities Lead the RTL design and verification process for complex VLSI projects. Collaborate with cross-functional teams to define specifications and requirements. Develop and implement RTL code using SystemVerilog or VHDL. Perform functional simulation and verification of RTL designs using industry-standard tools. Conduct design reviews and provide feedback to ensure design quality and adherence to best practices. Mentor junior engineers an...

As an ASIC Design Engineer at Cadence, you will be responsible for: - Having 12+ years of experience in ASIC design - Being proficient in Verilog coding, RTL design, and complex control path and data path designs - Having knowledge of interface Protocols such as UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, SATA - Knowing RTL checks like LINT, SDC, CDC, synthesis flow, LEC, and timing constraints - Experience in writing Verilog testbench and running simulations You will be part of a team that is working on impactful technology solutions, pushing boundaries, and solving challenges that others cannot.,

As a Senior PostgreSQL DBA at the company, your role will involve leading database operations for high-volume, HIPAA-compliant workloads. You will be responsible for HA/DR, performance tuning, schema optimization, and ensuring compliance for mission-critical healthcare data. **Key Responsibilities:** - Lead administration, performance tuning, and HA/DR support for PostgreSQL databases. - Implement encryption, masking, and auditing mechanisms for HIPAA compliance. - Design partitioning, indexing, and archival strategies for 1020 TB datasets. - Mentor junior DBAs and collaborate with DBE (Database Engineer) for model optimization. - Collaborate with teams for database modeling and ensuring bes...

As an experienced ASIC RTL Design Engineer at MarvyLogic, you will be an integral part of our culture that values passion for technology solutions impacting businesses. You will have the opportunity to pursue your individual passions while gaining a deep understanding of various industries and emerging technologies to build futuristic and impactful solutions. Working with us may even help you evolve personally towards a more fulfilling life. **Key Responsibilities:** - Possessing 10+ years of ASIC RTL Design experience with proficiency in Verilog/System Verilog - Demonstrating experience with multiple clock and power domains - Having extensive experience in the integration and validation of ...