138 Modelsim Jobs

As a Senior/Lead/Sr. Lead Design Verification Engineer at our company located in Bangalore or Hyderabad, you will play a crucial role in ensuring the verification of high-speed interfaces such as DDR, PCIe, UCIe, or NVMe. You will need to have a Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field with a minimum of 4 years of hands-on experience in this domain. Your responsibilities will include utilizing your expertise in SystemVerilog and UVM to develop verification components like scoreboards, monitors, and sequencers. You will be required to have a strong understanding of digital design principles, verification methodologies, and simulation tools. Additionally, familiarity with protocol specifications and industry standards for DDR, PCIe, UCIe, or NVMe will be crucial for this role. Having experience with simulation tools such as VCS, ModelSim, or Questa will be an added advantage. You should also possess good debugging skills using tools like Waveform Viewers, Logic Analyzers, and protocol analyzers. Problem-solving skills, attention to detail, and the ability to work collaboratively are essential traits for this position. Preferred qualifications for this role include experience with formal verification techniques, knowledge of interface protocols like USB, Ethernet, or SATA, and proficiency in scripting languages like Python for automation purposes. Familiarity with FPGA-based verification platforms and hardware debugging tools will be beneficial in excelling in this role. If you are looking to join a dynamic team where you can leverage your skills in design verification and work on cutting-edge technologies, this position is ideal for you. Join us in our mission to push the boundaries of innovation and make a significant impact in the field of high-speed interface verification.,

Job description Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration and verification of the IP block. Drives quality assurance compliance for smooth IP SoC handoff. Key Responsibilities: Design and develop cache architectures, including L1, L2, and L3 caches. Optimize cache performance, power, and area through innovative design techniques. Work closely with backend (BE) engineers to achieve timing closure and resolve any issues. Conduct static timing analysis (STA) and optimize the design for timing. Utilize lint, CDC (Clock Domain Crossing), and other design tools to ensure design quality and robustness. Implement and adhere to best practices in RTL design Collaborate with microarchitecture, RTL, verification, and physical design teams to ensure seamless integration of cache subsystems. Document design specifications, implementation details, and verification results. Participate in design reviews and provide feedback on other team members designs. Qualifications Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field. 5-15 years of proven experience in design and micro-architecture. Strong understanding of memory hierarchy, cache coherence, and performance optimization techniques. Proficiency in hardware description languages (HDL) such as Verilog or VHDL. Experience integrating BIST and DFT features into RTL designs. Experience implementing Error Correction Code (ECC) mechanisms in cache designs. Knowledge of error detection, correction, and recovery techniques. Experience with simulation and verification tools (e.g., ModelSim, VCS). Experience using lint, CDC, and other design tools to ensure design quality. Proficiency in static timing analysis (STA) and timing closure techniques. Familiarity with physical design constraints and considerations. Excellent problem-solving skills and attention to detail. Strong communication and teamwork abilities.

You are in search of an experienced senior verification engineer with over 10 years of expertise in ASIC/SOC/IP/block level functional verification utilizing system verilog/UVM. The perfect candidate for this role should possess a comprehensive understanding of UVM, advanced UVM, and system verilog. Your main responsibilities will include developing a detailed test plan, constructing a complete test-bench, and creating a robust verification environment that comprises interface agents and scoreboard in UVM. Additionally, you should have in-depth knowledge of at least one industry-standard protocol such as Ethernet, PCIe, DDR, USB. Strong debugging skills are essential to promptly address test-bench issues and failures. As part of this role, you will be accountable for verification closure by focusing on coverage and managing bug reports. Proficiency in utilizing industry-standard verification tools like Questa, VCS, or ModelSim is required. Experience with scripting languages like python, perl, or TCL for automation tasks is also beneficial. Furthermore, you will be responsible for managing a team of 6 to 7 Engineers and engaging with customers to provide task updates. Experience in collaborating with Japanese customers is a prerequisite for this position. Proficiency in the Japanese language is a mandatory skill. If you meet these qualifications and are enthusiastic about taking on these responsibilities, we encourage you to apply for this challenging and rewarding role.,

You are an experienced RTL/FPGA Design Engineer with a minimum of 3 - 7 years of experience in the VLSI domain. You hold a BE/B.Tech degree in Electronics/Electronics & Communication or ME/M.Tech in Electronics/VLSI Design or a closely related field from a recognized university with a strong academic background. Your role will be based in Ahmedabad or Bangalore. In this role, you will be responsible for RTL programming using Verilog/System Verilog or VHDL, possessing knowledge of the complete FPGA Design Development flow. You should be proficient with FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, Libero, etc. Additionally, you will engage in functional verification using Verilog/System Verilog or VHDL, optimize RTL code to meet timings and on-chip resources, and support all phases of FPGA-based product development activities. System Architecture Design, testing, and troubleshooting of hardware will also be part of your responsibilities. To excel in this position, you must have experience with Verilog/SystemVerilog or VHDL for design and verification, along with a deep understanding of FPGA design flow/methodology, IP integration, and design collateral. You should be capable of developing small IP blocks from scratch and conducting basic functional verification. Familiarity with protocols like SPI, I2C, UART, and AXI, as well as knowledge of Altera Quartus II Tool, Questasim, Modelsim, Xilinx tools like ISE and Vivado, and Microsemi tools like Libero, are essential. Understanding of USB, Ethernet, and external memories such as DDR, QDR RAM, and QSPI-NOR based Flash is also required. In terms of personal competencies, you should be self-motivated to learn and contribute, able to work effectively with global teams, and willing to collaborate in a team-oriented environment. Prioritization and execution of tasks to achieve goals in a fast-paced environment, along with strong problem-solving skills, are valuable assets. Your passion for writing clean and neat code that aligns with coding guidelines will be highly appreciated. If you meet these qualifications and are excited about the opportunity to work in the VLSI domain as an RTL/FPGA Design Engineer, we encourage you to apply now.,

About Newton School Come be part of a rocket ship thats creating a massive impact in the world of education! On one side you have over a million college graduates every year with barely 5% employability rates and on the other side, there are thousands of companies struggling to find talent. Newton School aims to bridge this massive gap through its personalized learning platform. We are building an online university and solving the deep problem of the employability of graduates.We have a strong core team consisting of alumni from IITs and IIM, having several years of industry experience in companies like Unacademy, Inmobi, Ola, and Microsoft - among others. On this mission, we are backed by some of the most respected investors around the world, - RTP Global, Nexus Venture Partners, and a slew of angel investors including CREDs Kunal Shah, Flipkarts Kalyan Krishnamoorthy, Unacademy and Razorpay founders, Udaans Sujeet Kumar among others. About the Role: We are looking for VLSI engineers with a strong foundation in digital systems and computer architecture to take on an academic teaching role. This full-time position is ideal for engineers with hands-on experience in RTL design, processor components, or SoC architecture who are excited to teach how computers are built from logic gates to microarchitectures. You will lead classroom instruction, mentor student projects, and help shape curriculum at the intersection of digital logic, hardware systems, and architectural design. Key Responsibilities Teach Computer Architecture by drawing from real-world VLSI design experience covering instruction sets, pipelining, memory systems, and microprocessor implementation. Guide students through lab simulations and RTL projects that explore how architectural concepts are implemented in hardware (e.g., datapaths, control units, cache design). Design and evaluate lab work, assessments, and hands-on student projects that simulate industry applications. Mentor and support students in their academic and professional development journeys. Continuously update course content to reflect current industry trends and technologies. Contribute to curriculum development, academic research, and internal learning initiatives. Host technical workshops, design challenges, and guest sessions to extend classroom learning. Collaborate with fellow faculty, industry mentors, and curriculum designers to enrich learning outcomes Must-Have Skills & Qualifications B.Tech / M.Tech / Ph.D. in Computer Engineering, Electronics, Electrical, or a related field. Experience working on processor subsystems, SoC integration, RTL for custom compute blocks, or related architecture-level VLSI work. Strong technical command over topics such as: ? Computer Architecture: Instruction sets, microprocessors, memory hierarchy, pipelining, cache systems. ? VLSI Design: CMOS circuits, RTL design, ASIC/FPGA flow, timing analysis, layout. Proficiency in tools such as Cadence, ModelSim, Synopsys, Xilinx, Mentor Graphics, etc. Working knowledge of HDL languages (Verilog/VHDL) and scripting (Tcl, Shell, Python). Excellent communication and classroom delivery skills. Demonstrated interest in teaching and mentoring students. Good-to-Have Skills: Prior experience as a faculty member or technical trainer. Familiarity with RISC-V, ARM-based processors, SoC Design, or low-power systems Exposure to DFT, verification methodologies, and EDA flows. Contributions to open-source, academic publications, or online technical content. Comfort with digital tools, LMS platforms, and collaborative teaching formats. Show more Show less

You will be joining as a Senior FPGA Engineer professional at our Bangalore location with a minimum of 5 years of experience. In this role, your primary responsibilities will include collaborating with a team of product managers, developers, and testers to define feature requirements, developing feature specifications, and implementing detailed designs using Verilog and FPGA design tools. You will also be involved in problem isolation, fault finding in embedded systems, customer issue replication, and creating/updating release notes. Additionally, you will work closely with onsite and offsite development teams to deliver market-leading products globally and mentor junior engineers in development, code, and debugging. To excel in this role, you must be an expert Verilog/System Verilog developer with strong embedded debugging skills. Proficiency in AMD/Xilinx FPGA with Vivado/Vitis tool-chains for implementations and validation, as well as experience with Xilinx/AMD simulator/ModelSim for unit and system-level simulations, is essential. You should possess excellent analytical skills, adaptability to ambiguity and change, and a thorough understanding of the FPGA development cycle within project-based environments. Experience with modern 32-bit processors/microcontrollers like ARM, debuggers, protocol analyzers, and logic analyzers is required. Desirable skills include expertise in Embedded Linux Kernel and Device Drivers development, familiarity with video and audio codecs such as MPEG4 and JPEG, knowledge of USB protocols, and understanding of network protocol stack concepts like ethernet, IP, and TCP. Strong communication and documentation skills are necessary for this role. If you are interested in this opportunity, please share the following details along with your profile to vijitha.k@blackbox.com: - Total experience: - Relevant experience in FPGA: - Experience in Embedded: - Experience in Linux: - Current CTC: - Expected CTC: - Notice period: - Current Location: - Preferred Location: - Current Company: - Any pending offers: - Educational Qualifications,

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

Learn everything about RISC-V ISA and its extensions. Build reusable test libararies and test suites for compliance testing. Required Skill Set Must have good knowledge of python scripting Basic computer architecture knowledge. Good to have experience with FPGAs, RISC-V ISA

Challenging and Interesting work on building and enhancing Indias only completely open-source RISC-V based SHAKTI processors. Learn everything about the entire flow from spec to silicon. Work on state-of-the-art research topics and engineering efforts. Exposure to engage with foreign universities and support in preparation to pursue higher studies in India/Abroad. Exposure to engage with leading industry partners thereby improving your career trajectory and exposure. International Publications can also be achieved as part of tenure, boosting your research potential for higher studies. Required Skill Set Must have basic expertise in at least one of: verilog, vhdl, bluespec system verilog and/or chisel. Must have knowledge: digital design, pipelining Basic computer architecture knowledge, include one or more of : in-order cores, out-of-order cores, processors, caches, SoC development, memory architecture, etc. Good to have experience with FPGAs , performance modelling, workload analysis/benchmarking, python scripting, knowledge of peripheral and communication IPs

As a Design Verification Engineer at our company, you will be responsible for verifying high-speed interfaces such as DDR, PCIe, UCIe, or NVMe. You will need a Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field along with at least 4 years of hands-on experience in design verification. Your role will require expertise in SystemVerilog and UVM (Universal Verification Methodology) as well as a strong understanding of digital design principles, verification methodologies, and simulation tools. It is essential for you to be familiar with protocol specifications and industry standards for the interfaces mentioned above. You should have experience working with simulation tools like VCS, ModelSim, or Questa, and be proficient in debugging tools such as Waveform Viewers, Logic Analyzers, and protocol analyzers. The ability to write efficient and reusable verification components like scoreboards, monitors, and sequencers is crucial for this role. Strong problem-solving skills, attention to detail, and excellent communication skills are also required. You should be comfortable working in a collaborative environment and have a willingness to engage with team members effectively. Preferred qualifications for this role include experience with formal verification techniques, knowledge of interface protocols like USB, Ethernet, or SATA, proficiency in scripting languages for automation (e.g., Python), and familiarity with FPGA-based verification platforms and hardware debugging tools. If you are someone who enjoys working on challenging projects, has a passion for design verification, and meets the qualifications mentioned above, we would love to have you join our team in Bangalore or Hyderabad.,

Job Summary: Seeking an experienced FPGA developer to join our team and work on the design and development of complex FPGA-based systems. The ideal candidate will have a strong background in FPGA design, verification, and implementation, as well as experience working with hardware and software engineers to integrate FPGA designs into larger systems.

Job Track Description: Performs business support or technical work, using data organizing and coordination skills. Performs tasks based on established procedures. In some areas, requires vocational training, certifications, licensures, or equivalent experience. General Profile Expands skills within an analytical or operational process. Maintains appropriate licenses, training, and certifications. Applies experience and skills to complete assigned work. Works within established procedures and practices. Works with a moderate degree of supervision. Functional Knowledge Has developed skillset in a range of processes, procedures, and systems. Business Expertise Supports the achievement of company goals by integrating teams for the best outcome. Impact Impacts a team through quality of services and information provided. Follows standardized procedures and practices and receives moderate supervision and guidance. Leadership Has no supervisory responsibilities. Manages own workload. Problem Solving Ability to problem solve, self-guided. Evaluates issues and solutions to provide the best outcome for the client and end-users. Interpersonal Skills Exchanges information and ideas effectively. Responsibility Statements Reviews current processes and identifies trends. Reviews work produced for errors. Evaluates for performance standards (SLAs) required under contract. Compares various sampling techniques and identifies correct samples for auditing. Evaluates workflow tools to run reports. Coaches Level 1 auditors on sampling techniques and business process knowledge. Reconciles transaction processing for data accuracy. Interacts with external auditors to include (SOC 1) Service and Organizational Control Report. Performs other duties as assigned. Complies with all policies and standards.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Good knowledge on AMBA protocols (CHI/AXI/AHB) Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Execute verification plans, regression enabling for all features and, debug of the test failures Hands-on experience of GLS and timing simulations Exposure to Formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Project Role : Application Developer Project Role Description : Design, build and configure applications to meet business process and application requirements. Must have skills : PySpark Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your typical day will involve collaborating with various stakeholders to gather requirements, overseeing the development process, and ensuring that the applications meet the specified needs. You will also be responsible for troubleshooting issues and providing guidance to team members, fostering a collaborative environment that encourages innovation and efficiency in application development. Roles & Responsibilities:- Expected to perform independently and become an SME.- Required active participation/contribution in team discussions.- Contribute in providing solutions to work related problems.- Facilitate knowledge sharing sessions to enhance team capabilities.- Mentor junior team members to support their professional growth. Professional & Technical Skills: - Good to have skills - AWS S3, DeltaLake, Airflow- Experience should be 4+ years in Python- Candidate must be a strong Hands-on senior Developer- Candidate must possess good technical / non-technical communication skills to highlight areas of concern/risks- Should have good troubleshooting skills to do RCA of prod support related issues Additional Information:- The candidate should have minimum 3 years of experience in PySpark.- This position is based at our Bengaluru office.- A 15 years full time education is required.- Candidate must be willing to work in Shift B i.e. from 11 AM IST to 9PM IST. Also, do the weekend support as per a pre-agreed rota. Compensation holiday may be provided for the weekend shift Qualification 15 years full time education

The job is located in Bangalore and requires 3-5 years of experience for 2 available positions. The primary responsibility involves RTL Design, with a focus on practical experience in RTL development using VHDL and/or Verilog. This includes functional and structural RTL design, design partitioning, simulation, regression, and collaboration with design verification teams. The ideal candidate should be familiar with the latest RTL languages and tools such as Modelsim, VCS, Design Compile, Prime Time, Linting tools, CDC tools, UPF, code coverage, System Verilog Assertion, among others. Desirable experience includes strong processor architecture knowledge, microarchitecture implementation, microprocessor integration, and low power design. Effective communication skills, teamwork abilities, self-direction, and time management skills are essential for this role. Preferred qualifications include developing RTL for multiple logic blocks of a DSP core, running various frontend tools for linting, clock domain crossing, and synthesis, collaborating with the physical design team on design constraints and timing closure, working with the power team on power optimization, and collaborating with the verification team on test plan, coverage plan, and coverage closure. The educational requirement for this position is a Bachelor's degree in Engineering, Information Systems, Computer Science, or a related field.,

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

As an RTL/FPGA Design Engineer in the VLSI domain, you will play a crucial role in developing FPGA-based products. With a focus on RTL programming using Verilog/System Verilog or VHDL, you will be responsible for optimizing RTL code to meet timing requirements and on-chip resource constraints. Your expertise in FPGA Development Tools such as Quartus, Modelsim, Vivado, Xilinx ISE, and Libero will be essential in ensuring the successful completion of projects. Your responsibilities will include functional verification using Verilog/System Verilog or VHDL, system architecture design, and testing/troubleshooting of hardware components. Additionally, you will be required to support all phases of FPGA-based product development activities, demonstrating a strong understanding of FPGA design flow/methodology and IP integration. To excel in this role, you should hold a BE/B.Tech or ME/M.Tech degree in Electronics/Electronics & Communication or Electronics/VLSI Design from a recognized university. Proficiency in Verilog/SystemVerilog or VHDL for design and verification is essential, along with knowledge of protocols like SPI, I2C, UART, and AXI. Familiarity with tools such as Quartus II, Questasim, Modelsim, ISE, Vivado, and libero will be advantageous. As a self-motivated individual, you should be eager to learn and contribute effectively within a team-oriented environment. Your ability to prioritize tasks, solve problems creatively, and write clean code following coding guidelines will be highly valued. If you are passionate about working in a dynamic and innovative setting, we encourage you to apply for this exciting opportunity in Ahmedabad or Bangalore. Join us and be a part of our vibrant team dedicated to pushing the boundaries of VLSI design and FPGA technology. Apply now to explore this role further and take the next step in your career growth.,

Job Description: As a Technical Developer at Five Feed Learning Solutions Pvt. Ltd., you will be responsible for various aspects of FPGA and RTL design. You should possess good communication skills and analytical problem-solving capabilities. Your role will involve hands-on experience in FPGA/RTL Design using Verilog HDL, Tanner, Vivado ISE/Xilinx ISE, Modelsim, and Synplify Synopsys. A strong knowledge of VLSI Circuit designs and parameter synthesis is essential. Knowledge of TCAD, HSPICE, and PSPICE will be advantageous. Your responsibilities will include RTL design, verification, FPGA partitioning and implementation, as well as lab-based bring up of the SoC on FPGAs. Recent FPGA experience, including implementation, synthesis using Synplify, and timing closure with Vivado/ISE, is required. You should be able to architect, implement, and verify modules for FPGA interconnect. Proficiency in Verilog, Perl, and Make is expected. You should have expertise in both simulation-based verification and lab-based debug skills on FPGAs. Qualifications: - Graduation in B.E, B.Tech - Post Graduation in M.E., M.Tech VLSI Perks & Benefits: - Salary: Rs 2.5 Lacs - 4 Lacs p.a - Key Skills: Custom Coding, Technical Support, VLSI, Modelsim, Verilog, FPGAs, Perl, Synplify, Vivado/ISE, Xilinx ISE - Industry: Education / Training - Number of Positions: 2 Recruiter Profile: Recruiter Name: Not specified Email Address: hiringteam.3@fflspl.com Contact Company: Five Feed Learning Solutions Pvt. Ltd. Reference ID: FFLSPL/Feb-2025/189-92,

You will be a member of the FPGA development team designing and developing complex FPGAs for use in state-of-the-art embedded systems. As an FPGA Senior Design Engineer / Module Lead, you will be involved in requirements gathering, architecture and detailed design of FPGAs, coding, code walk, development of verification and validation plans, documentation of design, verification / validation, user guides, etc., technical reviews, maintaining Quality standards as per the Project Quality Guidelines and mentoring team members. Experience in architecture design, development and verification of complex FPGAs is crucial for this role. You should possess excellent RTL coding skills in Verilog/VHDL and be familiar with AMD (Xilinx) / Intel (Altera) / Lattice / Microchip FPGAs. Additionally, familiarity with AMD (Xilinx) ISE, Vivado / Intel (Altera) Quartus / Lattice Diamond / Microchip Libero FPGA tools is required. Experience in Functional verification using ModelSim and familiarity with high-speed interfaces such as PCIe, SPI-4.2, SFI-4.2, Gigabit Ethernet, UTOPIA, POS PHY, USB2/3, DDR3, SPI, UART, I2C, Aurora etc. is necessary. Exposure to FPGA Static Timing Analysis and knowledge of scripting languages like TCL and Python are desired skills. You should also have knowledge of Interfacing FPGA to ADC, DACs and experience in FPGA on-chip debugging with Chipscope/ Signaltap. Test bench development in VHDL / Verilog / System Verilog and familiarity with hardware test equipment like High-Speed DSO, Logic Analyzer, Spectrum Analyzer, Network Analyzers, Traffic Generators, etc. are important aspects of this role. Understanding of high-speed Microprocessors / Micro-controllers, L2/L3 switching, TCP/IP, and other networking protocols is beneficial. Knowledge of Hardware Schematics, Quality Process, and Configuration Management tools is also required for this position. Good oral and written communication skills, strong organizational, presentation, and motivational skills are essential qualities. The ideal candidate should have 3 to 5 years of experience in FPGA Development and hold a BE / B.Tech / M.Tech degree in Electronics & Communication Engineering.,

About the Role We are hiring for an Executive Assistant to the founders at Leap. The primary expectation from this role is to provide real leverage to the founders and make sure that they are insanely productive at what they do. Because productive founders set the benchmark for productivity and performance for the company. The charter for this role will include Perform tasks such as managing calendars, planning travel, and other relevant administrative duties. Prompt coordination among various stakeholders for both internal and external meetings. Follow up on action items and ensure timely closure of all actionables. Leading and ensuring the success of vital cross-functional initiatives with multiple stakeholders. Tracking monthly milestones and setting up reviews for the same across all functions. Ideal Persona 2+ relevant years of experience as an EA to the founder or senior leadership team. Extremely resourceful and great at problem solving. Hands-on, adept at multitasking. Exceptional organizational skills and impeccable attention to detail. High degree of professionalism in dealing with diverse groups of people, including Board members, senior executives, internal team, community leaders, donors.

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities -Debug and solve U-Boot issues. -Enhance U-Boot to meet the new customer requirements. contribute to upstream U-Boot with the client changes. Skills Must have 4 to 7 years of C programming experience. 4 to 7 years U-Boot driver development experience. Or 4 to 7 years any firmware driver development experience. Should have Linux Drivers Development knowledge Good System Level knowledge Good debugging skills Nice to have Good Communication skills. Usage of Tool Vivado is an added advantage

We are looking for experienced FPGA Verification Engineer. As a FPGA Verification Engineer, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. As an FPGA Verification engineer, you will be responsible for designing verification plan, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensure first time right quality of Infinera product. Candidate should be capable of handling projects independently and strong will to drive for solutions. Education Necessary: Candidates must have a bachelors degree or higher in EE with very good academics. Roles & Responsibilities: Must have 10 years of experience in developing System Verilog UVM based test environments, developing and implementing test plans at block, sub-chip and chip levels. Must have strong HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and waveform based debugging tools. Exposure to UVM (or similar) verification methodologies is required. Familiarity with HDLs such as Verilog and scripting languages such as perl is highly desired. Working knowledge of RTL design is preferred. Should be conversant with technologies like, Ethernet, PCIe etc. Knowledge of telecom protocol is preferred. Structured and thorough with analytical and troubleshooting skills. Good written and oral communication skills are required. Flexible, innovative, self-driven and willing to take own initiatives. Highly motivated team player. We offer: A high pace in development of new products. Tight cooperation with other disciplines. Short product development cycles, Real results of your work, you will see how it affects our products and sales. International possibilities of development and internal advancement. Social and wellness activities and clubs. A friendly and helpful atmosphere. Highly competent and motivated colleagues.

Solid Experience in DFT Architecture. The candidate should have experience with ATPG, JTAG, BSCAN, BIST and MBIST flows. Experience on Hierarchical DFT techniques using Pattern Retargeting in Tessent flow Strong knowledge of the Tessent Shell environment and Tessent tools The desired candidate must have specific emphasis on the following tools Test Kompress / Fastscan ATPG, MBIST, Boundary scan. Hands on experience in simulating scan patterns and debugging pattern mismatches during verification process Experience in helping to debug failing scan patterns on the ATE is highly desirable. Hands on knowledge in state-of-the-art EDA tools for DFT, design and verification.(Mentor, Cadence, Synopsys) Must be able to simulate and debug MBIST testbenches. Ability to come up with a detailed test plan based on the Arch specs Should be knowledgeable in all SOC functions such as Digital design, STA, Synthesis, PnR, DV and ATE test. The candidate should have prior experience in managing and developing teams Required Qualification B.E / B.Tech / M.E / M.Tech in Electrical / Electronic Engineering.experience-10-16 years Preferred experience of handling 10+ team members. Good understanding and exposure to SoC design and architecture Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects Comfortable with VCS / Verdi and excellent debugging skills Logical in thinking and ability to gel well within a team and be a proactive member of the team. Good communication and leadership skills Excellent team player High Integrity Job Type Full Time Job Location Hubballi

Role Description Share point developer with good experience in Pages and Workflow. Excellent Communication skills. Offshore resource who specializes in Sharepoint (i.e. Pages, workflow) development, etc.). 5-6 yrs of experience.

1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore