211 Modelsim Jobs

Job Specs : Expertise in Digital Verification Expertise in Functional Verification Expertise in SOC / IP Verification Expertise in working on system Verilog assertions & test benches Expertise in working on OVM / UVM / VMM based verification flow Expertise in working on ARM processor Expertise in working on AMBA bus protocols (AXI, AHB, APB) Expertise in CXL or PCIe Protocol Verification Expertise in simulation tools (VCS, ModelSim, Questa) Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases. Expertise in analysing Code Coverage, Functional Coverage and Assertions. Expertise in verification of complex SoCs. Expertise in Test Plan creation and Verification technologies like Code Coverage, Functional coverage, assertion based verification. Expertise in Verification of complex datapath, DSP based ASICs Expertise in MAC Protocol: USB, WiFi , Bluetooth , PCIe is mandatory Good knowledge in gate-level simulation, and Scripting languages like Python, TCL Expert level proficiency (Oral + Written) in Chinese language is mandatory incase Beijing, Taiwan are the preferred work locations Preferred resources with valid regional work permit.

Desired Profile : Bachelor's / Master's degree in engineering from EEE / E&C Expertise in managing and leading technical teams across different continents Expertise in leading business strategy in the VLSI / Semiconductor Services / foundry business industry Expertise in managing end to end projects including tape outs Must be willing to travel at short notice, relocate as per business needs Must be willing to work onsite (customer premises) as per business needs Expertise in working on any of the following technologies is mandatory : ANALOG MIXED SIGNAL LAYOUT - finfet / high speed / planar technology nodes ANALOG DESIGN - data converter / power management / pll ANALOG VERIFICATION ASIC PHYSICAL DESIGN ASIC RTL DESIGN DFT DESIGN - jtag / mbist / lbist / scan DIGITAL VERIFICATION - OVM / UVM / VMM EDA CAD FLOW - tcl / primetime / design compiler Job Specs : Responsible for meeting delivery, revenue, operational, customer satisfaction targets and team management Hire and manage high caliber technical teams across GCC, ODC and onsite Develop, Drive high quality business / technology strategy and oversee the translation of this strategy into tactical action Uphold the organization's culture and long term missions Liaise and negotiate with various partners around the world to bring in new partnership. Synergize all company's resources and talents for the growth of company's business Oversee all sectors and fields of the business to ensure the company's competitiveness Provide leadership, direction, major decision making and resolution support to operations, projects and staff. Build strategic business partnerships and execute these opportunities through collaboration with external partners Location - Bengaluru,Bhubaneswar,Kolkata,Kochi,Mysuru

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Design and micro-Architect who will work across functions like GPU architecture and Systems in design and micro-architecture of the next generation GPU features. Work very closely with Architecture teams to come up with micro-architecture and hardware specification for features Design and RTL ownership Work very closely with Design Verification teams to review test plans and sign off the validation of all design features across products Work closely with physical design teams to achieve the right power, performance and area metrics for the GPU blocks Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Overview Developing emulation testbenches to support necessary DV scenarios and firmware/software/hardware bring up Responsibilities Build emulation models from RTL and release/support those models Develop emulation tools such as debugger and monitor features Work closely with verification and software development teams Develop emulation and verification strategy Develop test framework and test cases Write documents such as verification specification and reports Coach younger colleagues Emulation and Prototyping technologies such as Palladium, Veloce, Zebu, HAPS, (these names are registered trade marks of their respective owners) Requirements Experience - minimum 15+ yrs and above with minimum of 5+ yrs of experience of woking on any one of the Emulation platform. Education QualificationBE/BTech

Well-versed in basics of marketing (Digital, ATL & BTL) Liaise with designers & printers to churn out quality marketing materials Good communication skills (verbal & written) in English (knowledge of local language (Kannada or Tamil) are mandatory) Execution of marketing activities for the market center (Karnataka or Tamil Nadu) in alignment to the marketing plan & in coordination with sales team & the marketing agency Organize & attend events such as conferences, seminars, & exhibitions Good skills of Microsoft Excel, Word & PowerPoint is a must have Do cold-calling of leads generated on daily basis to evaluate them & share the MQLs with sales team Maintain & update lead tracker Mandatory Key Skills tamil,kannada,marketing activities,printers,business development,branding,promotions,advertising,brand management,events,marketing communication,digital marketing,event management,avionics,channel sales,marketing*,sales*,btl*,atl*,exhibitions*

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience in AMBA AXI/AHB/APB System buses Hands on work experience on any of PCIe/Eth/USB/DDR etc. Hands on experience with System Verilog Assertions Scripting for automation, release process, simulations, regressions Good command over written and oral communication Desirable Skills Lead the Verification IP development with 2 or more junior engineers Exposure to full verification cycle Desired Skills and Experience DV Engineer, Design Verification, Verification Engineer

As a Team Leader in FPGA IP Verification, you will be responsible for leading and mentoring a team of engineers. You will define team priorities, set goals, and monitor performance through KPIs and regular reviews. Your role will involve fostering an environment of learning, collaboration, and technical excellence to enhance verification efficiencies. In terms of Technical Management, you will oversee the development and delivery of verification of IPs owned by the team, ensuring alignment with QPDS/releases. You will drive innovation in verification methodologies to enhance quality and efficiency. Collaboration with FPGA design, software, and validation teams to integrate IP into the Quartus ecosystem will be a key aspect of your responsibilities. Ensuring robust quality for the IP owned and providing technical guidance on verification methodology will also be part of your role. Your Functional Expertise will involve being a hands-on technical verification lead, owning the verification of IPs for FPGA. You will perform functional logic verification of an FPGA to ensure it meets specification requirements. Developing verification plans, test benches, and the verification environment to ensure coverage confirming to microarchitecture specifications will be crucial. Executing verification plans, defining and running simulation models, uncovering bugs, and replicating, root causing, and debugging issues in the pre-silicon environment will also be part of your duties. Additionally, collaborating with various teams and documenting test plans will be essential. Qualifications required for this role include a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. You should have 10+ years of experience in verification in IP/FPGA/SoC/ASIC domains and proven expertise in RTL design and verification for FPGA architectures. Hands-on experience with OVM/UVM, System Verilog, and constrained random verification methodologies is necessary. Familiarity with simulation tools such as ModelSim, Questa, VCS, or similar EDA simulators is essential. Experience with Ethernet/PCIe/PIPE & FPGA architecture is an added advantage. In terms of Leadership & Soft Skills, you should possess the ability to lead and develop technical teams, drive collaboration, and deliver results. Strong problem-solving and analytical skills with a proactive mindset are crucial. Excellent communication and stakeholder management skills, capable of engaging both technical and non-technical audiences, will be required. This job requires a proactive individual with strong technical skills, leadership capabilities, and excellent communication abilities. If you are passionate about leading a team in FPGA IP verification and driving technical excellence, this role could be the perfect fit for you.,

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Design and micro-Architect who will work across functions like GPU architecture and Systems in design and micro-architecture of the next generation GPU features. Work very closely with Architecture teams to come up with micro-architecture and hardware specification for features Design and RTL ownership Work very closely with Design Verification teams to review test plans and sign off the validation of all design features across products Work closely with physical design teams to achieve the right power, performance and area metrics for the GPU blocks Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

General Summary: Qualcomm is a company of inventors that unlocked 5G, ushering in an age of rapid acceleration in connectivity and new possibilities. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform its potential into world-changing technologies and products. In the role of GPU Functional Verification Engineer , your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals urrently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 8 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education Requirements BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent coursesfrom reputed universities Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR. The pre-Si verification team in Bangalore is currently heavily involved in the following UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Formal tools both for reduced time to bug & property based FV sign-off Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

General Summary: GPU Functional Verification Engineer In the role of GPU Functional Verification Engineer, your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver The pre-Si verification team in Bangalore is currently heavily involved in the following UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Formal tools both for reduced time to bug & property based FV sign-off Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Role & responsibilities You will develop RTL code to implement FPGA-based digital designs , working from specification stage through to system integration . Projects will range from Mid to multi-million gates. Most projects include designing logic for latest generation of high speed serial protocols like PCIe gen5, Gen6, USB 3.2 Ethernet 10G/25G/100G , digital signal processing and control logic (bus interfaces and state machines) Understand the customer requirements and product definition Define architecture and detailed design spec based on requirements and various trade-offs Micro-architecture and coding of assigned module in VHDL/Verilog Write test bench for verifying design for complete scenario coverage Implementation of the design for porting on FPGA after required optimization based on available resources and timing closure requirement FPGA debugging and HW/SW integration Preferred candidate profile 9+ years of experience, including successful completion of FPGA based projects Coding experience in VHDL and/or Verilog is must Experience targeting Xilinx and/or Altera FPGAs required Familiarity with tools like Modelsim, Questasim, Xilinx Vivado, Planahead, Altera Quartus etc. is required Familiarity with debugging tools like Chipscope, Signal Tap, Logic analyzer, Scope, FPGA editor Implementation of designs with multiple clock domains is required Thorough understanding of appropriate coding styles for FPGAs , and trade-offs for density and speed Experience in RTL implementation of DSP algorithms will be appreciated Experience in development of PCIe, USB, Ethernet transceivers, DDRx, ADC, DAC, AMBA-AXI, SRAM, USB, UART, I2C, SPI will be appreciate Note - Position Open for FPGA based background profiles not for Hardware or Verification

General Summary: Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Expertise : Power fundamentals Good knowledge of PTPX Good knowledge of CLP Knowledge of design verification, RTL coding, synthesis, and physical design Protocol knowledge of , DDR, CHI, Cache, computer organization, bus protocol, Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

About the Role We are hiring for an Executive Assistant to the founders at Leap. The primary expectation from this role is to provide real leverage to the founders and make sure that they are insanely productive at what they do. Because productive founders set the benchmark for productivity and performance for the company. The charter for this role will include Perform tasks such as managing calendars, planning travel, and other relevant administrative duties. Prompt coordination among various stakeholders for both internal and external meetings. Follow up on action items and ensure timely closure of all actionables. Leading and ensuring the success of vital cross-functional initiatives with multiple stakeholders. Tracking monthly milestones and setting up reviews for the same across all functions. Ideal Persona 2+ relevant years of experience as an EA to the founder or senior leadership team. Extremely resourceful and great at problem solving. Hands-on, adept at multitasking. Exceptional organizational skills and impeccable attention to detail. High degree of professionalism in dealing with diverse groups of people, including Board members, senior executives, internal team, community leaders, donors.

As an FPGA Architect at NEC Corporation India Pvt. Ltd, you will be responsible for designing and implementing high-performance FPGA designs for wireless communication and aerospace systems. You will conduct research and development activities related to logical synthesis, netlist partitioning, placement, and routing optimizations for FPGA prototyping. Your role will involve optimizing FPGA designs for latency, throughput, power, performance, and area efficiency. Additionally, you will evaluate and select appropriate technologies and tools to support the development process, collaborating with cross-functional teams to align on product requirements and technical specifications. You should possess a BE/B.Tech/M.E/M.Tech or equivalent qualification with at least 12 years of experience in the field. Strong knowledge of SoC architecture, including CPU, GPU, memory hierarchy, interconnects, and accelerators is essential. Hands-on experience in hardware simulators, SoC design, RTL coding in Verilog/VHDL, and advanced digital verification methodology is required. Prior experience in integrating various components such as Nios, MPIS, MicroBlaze, ARM Cortex, GTX/GTH transceivers, and 10GE MAC/DMA controller/PCIe is preferred. Familiarity with EDA tools like Xilinx Vivado, SystemGenerator, ModelSim/QuestaSim, and proficiency in MATLAB and Python for modeling, simulation, and analysis are also desired. In this role, you will be responsible for improving or developing new products, components, equipment, systems, technologies, or processes. This may involve ensuring that research and design methodologies meet established scientific and engineering standards, formulating business plans and budgets for product development, analyzing quality/safety test results for compliance, and staying updated on industry developments for organizational and customer benefit. You may also be involved in technical presentations, monitoring product development outcomes, and managing product regulatory approval processes. As a senior-level professional, you will apply advanced knowledge and work independently to achieve results in overseeing and managing projects/processes with limited supervision. You will face difficult and sometimes complex problems, coaching and reviewing the work of lower-level professionals. NEC Corporation, a global leader in IT and network technologies with over 123 years of expertise, is committed to empowering people, businesses, and society. NEC India has been instrumental in India's digitization journey for the past 70 years, offering diverse solutions across various sectors. Headquartered in New Delhi, NEC India has a nationwide presence with branches in Ahmedabad, Bengaluru, Chennai, Mumbai, Noida, and Surat. The company specializes in IT & Networking Solutions, Unified Communication Solutions, Safety and Security Solutions, Integrated Retail Solutions, Data Centre Solutions, Safe and Smart City Solutions, Transportation Solutions, SDN Solutions, Carrier Telecom Solutions, and Solutions for Society. By deploying cutting-edge technology, NEC India aims to make lives easier, safer, and more productive for all, contributing to a brighter future.,

In the role of GPU Functional Verification Engineer , your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test bench, own test plan, debug all RTL artefacts, and achieve all signoff matrices Engage with EDA vendors, explore new and innovative DV methodologies to push the limits of sign off quality Collaborate with worldwide architecture, design, and systems teams to achieve all project goals Currently, we are looking for candidates who can match one or more of the profiles listed below, Strong knowledge of UVM based System Verilog TB Knowledge of GPU pipeline design is a plus, not mandatory Proficiency with formal tools working knowledge of Property based FV is a plus, not mandatory Strong communication skills (both written and verbal) Most importantly, ability to learn, improve and deliver Experience Minimum 3 years of Design verification experience Senior positions will be offered to candidates with suitable years of experience and proven expertise matching the profiles listed above Education Requirements BE/ME/M.Sc. in Electrical, Electronics, VLSI, Microelectronics, or equivalent coursesfrom reputed universities Selected candidates will be part of the GPU HW team which is passionate about developing and delivering the best GPU Cores for all Qualcomm Snapdragon SOC products. Qualcomm GPU is an industry-leading solution which is driving the benchmarks in mobile computing industry and the future of mobile AR/VR. The pre-Si verification team in Bangalore is currently heavily involved in the following UVM/SV based constrained random test bench for functional verification Subsystem level TB for complete GPU workload analysis and compliance Emulation platforms to analyze performance and pipeline bottlenecks Formal tools both for reduced time to bug & property based FV sign-off Power Aware & Gate level simulations to deliver a high-quality GPU implementation Perl/Python scripts for automation in managing regressions, optimize run time, manage database and bug Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Design, implement, and verify FPGA logic using Vivado toolchain. Develop and integrate custom FPGA IP blocks, ensuring functionality and performance requirements are met. Write, optimize, and maintain Verilog-based designs and testbenches for FPGA projects. Perform synthesis, place & route, timing closure, and bitstream generation in Vivado. Validate FPGA IP on hardware platforms, including board bring-up and debug. Collaborate with cross-functional teams (ASIC, SoC, validation) to ensure smooth IP integration into larger systems. Support FPGA prototyping of SoC/ASIC designs, contributing to pre-silicon validation. Document design specifications, validation methodologies, and debug findings. Skills Must have 2-4y exp Hands-on experience with Xilinx Vivado FPGA design flow (synthesis, implementation, bitstream generation). Strong proficiency in Verilog HDL for design and validation. Aptitude for FPGA IP development including design, integration, and verification. Good understanding of digital design fundamentals and FPGA architectures. Familiarity with simulation, debugging, and timing analysis on FPGA platforms. Nice to have Organized and methodical with effective communication skills.

Overview This position is a key member of a team of business technologists responsible for the design and development of products and solutions that further MasterCards goals in digital commerce. This role will work with business partners from across the globe to design digital products and the detailed product and technical road-maps required to support global deployments of eCommerce and Mobile Commerce products. Additionally, this role will lead the transition from a product road-map into detailed release plans and the transition of the plans to technical delivery teams. The position requires extensive experience and demonstrated thought leadership in the development and delivery of products eCommerce and Mobile Commerce. The Role Working with Business Partners, design our technology products and applications to meet MasterCards business objectives. Develop and own the technology road-map for our eCommerce and Mobile Commerce products Coordinate the technical road-mapping process ensuring alignment with business objectives, enterprise architecture plans, and technology delivery Ensure business requirements are of sufficient quality and detail to ensure the road-map can be transitioned to development release plans. Provide thought leadership in eCommerce and Mobile Commerce, an advisor to our business partners. Ensure communications are timely and transparent between business teams and technology teams, across the globe. Single point of contact for new software development request, requests for product evaluation, sizing of new requirements, etc. All About You Must have extensive experience in designing and developing consumer facing eCommerce and Mobile Commerce products and solutions. Effectively deal with difficult situations. Help develop solutions to complex problems. Ability to translate highly complex technical matters into easily digestible and actionable plans. Requires the ability to influence business and technology partners and individual contributors. Must have the ability to foster open communications across various organizational levels. Requires skills to motivate teams to deliver superior results. Requires the skills to provide functional and directional guidance to staff and recommend policy or strategic direction changes to management. Requires the ability to interact across multiple organizational levels and assume a lead role and set direction for large or complex projects. Strong leadership, interpersonal, relationship-building and negotiation skills required with a solid track record for developing internal and external relationships. Provide measurable input into new products, processes, standards or plans in support of the business.

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Role Purpose The purpose of the role is to support process delivery by ensuring daily performance of the Production Specialists, resolve technical escalations and develop technical capability within the Production Specialists. Do Oversee and support process by reviewing daily transactions on performance parameters Review performance dashboard and the scores for the team Support the team in improving performance parameters by providing technical support and process guidance Record, track, and document all queries received, problem-solving steps taken and total successful and unsuccessful resolutions Ensure standard processes and procedures are followed to resolve all client queries Resolve client queries as per the SLAs defined in the contract Develop understanding of process/ product for the team members to facilitate better client interaction and troubleshooting Document and analyze call logs to spot most occurring trends to prevent future problems Identify red flags and escalate serious client issues to Team leader in cases of untimely resolution Ensure all product information and disclosures are given to clients before and after the call/email requests Avoids legal challenges by monitoring compliance with service agreements Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations as per SLA and quality requirements If unable to resolve the issues, timely escalate the issues to TA & SES Provide product support and resolution to clients by performing a question diagnosis while guiding users through step-by-step solutions Troubleshoot all client queries in a user-friendly, courteous and professional manner Offer alternative solutions to clients (where appropriate) with the objective of retaining customers and clients business Organize ideas and effectively communicate oral messages appropriate to listeners and situations Follow up and make scheduled call backs to customers to record feedback and ensure compliance to contract SLAs Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client Mentor and guide Production Specialists on improving technical knowledge Collate trainings to be conducted as triage to bridge the skill gaps identified through interviews with the Production Specialist Develop and conduct trainings (Triages) within products for production specialist as per target Inform client about the triages being conducted Undertake product trainings to stay current with product features, changes and updates Enroll in product specific and any other trainings per client requirements/recommendations Identify and document most common problems and recommend appropriate resolutions to the team Update job knowledge by participating in self learning opportunities and maintaining personal networks Mandatory Skills: Salesforce App Building .Experience: 5-8 Years .

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