4179 Tcl Jobs

You will be joining the SOC Power Modeling team in the AMD Client Computing and Graphics group as an experienced engineer. Your role will involve collaborating with various engineering teams to impact the power & performance of AMD's Client products. - Collaborate with front end RTL, DFT, Synthesis, and Physical design teams to develop power intent (UPF) design at SoC level. - Work with the emulation team to provide power estimates during the pre-silicon design process using Power Artist/PTPX emulation environments and ensure power goals are achieved. - Generate data on design impact from clock and power gating, device type mix, and physical implementation options in coordination with RTL an...

Role Overview: As an experienced Verification/Emulation Engineer at Synopsys, you will play a crucial role in enhancing the efficiency and effectiveness of our emulation models, significantly reducing time-to-market for new technologies. You will be responsible for the bring up of SOC designs with next-generation EP hardware platforms and verifying and deploying emulation models for Zebu and EP platforms. Your expertise in digital design concepts, programming with C++ and HDL languages, and familiarity with verification methodologies will be essential as you debug performance issues, report timing bugs, and collaborate with cross-functional teams to ensure seamless SoC bring-up and software ...

As a Solution Engineering - SoC CAD Flow & EDA Support Engineer, you will be responsible for supporting and enabling SoC design flows. Your work will drive meticulous optimization of power, performance, area, signoff, and silicon quality, collaborating with foundry, EDA, and ecosystem partners at the forefront of 3nm/2nm technodes and multi-die solutions. Responsibilities Enable and support SoC design flows and automation for floorplanning, including creation of power delivery networks and structured clocks to deliver high performance with minimal power and area. Demonstrate proficiency in one or more domains: floorplanning, advanced technology nodes, power delivery networks, or structured c...

Position: Custom Design CAD Lead (SI80FT R 3838) Position Summary We are seeking an experienced Custom Design CAD Lead to drive the development and implementation of advanced CAD methodologies and automation solutions for state-of-the-art Mixed Signal IPs. This role will lead the development of sophisticated tools and flows using SKILL, SVRF, Perl, and Python to enable cutting-edge custom design capabilities for next-generation memory and storage solutions. Key Responsibilities Technical Leadership & Development Lead CAD Tool Development: Drive development of advanced custom design CAD tools and methodologies using SKILL programming, SVRF verification scripts, Perl automation, and Python fra...

Senior Engineer Verification 4-6 years of proven experience in working on SoC verification on CPU/GPU SS/Soc verification with experience in working on system flows, Memory map, Interrupt map, Coherency Etc Strong understanding of verification ENVs and building testbenches. Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.) and Experience in one or more of various verification methodologies – UVM/OVM, formal, low power. Good knowledge and working verification experience in Arm * class CPU Processors. Good experience in handling Power aware verification with complex power ar...

Staff Engineer 10-15 years of proven experience in working on SoC verification on CPU/GPU SS/Soc verification with experience in working on system flows, Memory map, Interrupt map, Coherency Etc Strong understanding of verification ENVs and building testbenches. Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.) and Experience in one or more of various verification methodologies – UVM/OVM, formal, low power. Good knowledge and working verification experience in Arm * class CPU Processors. Good experience in handling Power aware verification with complex power architecture. ...

Role- VLSI Back-end Services Practice Head/ VLSI – Director Engg. Experience- 15+years Location- Bangalore/Hyderabad. JD Create differentiated VLSI Services offerings, capabilities, and talent to exponentially grow VLSI services business. Ability to engage with customer design managers in technical discussions and secure design wins Create strong VLSI technical teams through training/upskilling and focused hiring. Mentor the VLSI team to ensure their skills are continuously advanced & aligned to customer/industry needs. Build strong customer relationships and deliver VLSI services projects. Create differentiated proposals to win new projects. Work within in-house resourcing teams and externa...

- Expertise in ASIC physical design - Expertise in full-chip implementation, bump placement, IP integration, and timing-driven PnR. - Expertise in clock tree synthesis, power/clock gating, scan stitching, and design optimization. - Expertise in floor planning, methodology setup, and signoff processes for large IPs. - Expertise in scripting (TCL, Python, Perl) for design flow automation. - Drive SOC-level floor planning, partitioning, and die size estimation. - Manage hierarchical design flows, including block-level pin placement and HFN implementation. - Lead clock planning strategies at SOC and subsystem levels (Mesh/Tree). - Provide technical mentorship to junior engineers and cross-functi...

Role & responsibilities Must have 2+ years experience on development / customization of 3DEXPERIENCE ENOVIA application Must have good knowledge on Agile/SCRUM methodology Must have knowledge on Engineering Central, Program Central, Change Management, BOM Management Must have knowledge on MQL / TCL, JPO, Triggers, Forms & UI Components customization Must have knowledge on integrations, REST Services Good to have knowledge on Widget development Good to have knowledge on Data Migration

- Expertise in ASIC physical design - Expertise in full-chip implementation, bump placement, IP integration, and timing-driven PnR. - Expertise in clock tree synthesis, power/clock gating, scan stitching, and design optimization. - Expertise in floor planning, methodology setup, and signoff processes for large IPs. - Expertise in scripting (TCL, Python, Perl) for design flow automation. - Drive SOC-level floor planning, partitioning, and die size estimation. - Manage hierarchical design flows, including block-level pin placement and HFN implementation. - Lead clock planning strategies at SOC and subsystem levels (Mesh/Tree). - Provide technical mentorship to junior engineers and cross-functi...

- Expertise in ASIC physical design - Expertise in full-chip implementation, bump placement, IP integration, and timing-driven PnR. - Expertise in clock tree synthesis, power/clock gating, scan stitching, and design optimization. - Expertise in floor planning, methodology setup, and signoff processes for large IPs. - Expertise in scripting (TCL, Python, Perl) for design flow automation. - Drive SOC-level floor planning, partitioning, and die size estimation. - Manage hierarchical design flows, including block-level pin placement and HFN implementation. - Lead clock planning strategies at SOC and subsystem levels (Mesh/Tree). - Provide technical mentorship to junior engineers and cross-functi...

- Expertise in ASIC physical design - Expertise in full-chip implementation, bump placement, IP integration, and timing-driven PnR. - Expertise in clock tree synthesis, power/clock gating, scan stitching, and design optimization. - Expertise in floor planning, methodology setup, and signoff processes for large IPs. - Expertise in scripting (TCL, Python, Perl) for design flow automation. - Drive SOC-level floor planning, partitioning, and die size estimation. - Manage hierarchical design flows, including block-level pin placement and HFN implementation. - Lead clock planning strategies at SOC and subsystem levels (Mesh/Tree). - Provide technical mentorship to junior engineers and cross-functi...

- Expertise in ASIC physical design - Expertise in full-chip implementation, bump placement, IP integration, and timing-driven PnR. - Expertise in clock tree synthesis, power/clock gating, scan stitching, and design optimization. - Expertise in floor planning, methodology setup, and signoff processes for large IPs. - Expertise in scripting (TCL, Python, Perl) for design flow automation. - Drive SOC-level floor planning, partitioning, and die size estimation. - Manage hierarchical design flows, including block-level pin placement and HFN implementation. - Lead clock planning strategies at SOC and subsystem levels (Mesh/Tree). - Provide technical mentorship to junior engineers and cross-functi...

Job Role : DFT Engineer Location : Hyderabad Experience : 3 to 5 years Responsibilities: Spyglass debug and coverage correlation. Scan-stitching runs.. Debug DRC / other scan-related issues ATPG.. debug ATPG issues.. debug coverage holes. MBIST/BISR insertion.. debug insertion issues / verification issues.. Gate-level simulations. Requirements: Should work on scan-stitching; posses good knowledge of scan-stitching related concepts..Should work on ATPG; and is well conversed with the files required to run ATPG.. Knowledge / experience with Tessent ATPG (mentor) is a plus Working experience on Spyglass-DFT Knowledge on automation scripts like TCL/AWK/SED is a plus.. Basics of JTAG & IJTAG.

The Senior Accountant will work closely under the Finance Manager to manage and support the company’s financial operations. The role involves payment coordination, collection tracking, Tally entries, and daily accounting activities , ensuring accuracy, timeliness, and compliance with company policies. This position requires a smart, efficient, and experienced individual capable of working under pressure while maintaining accuracy in financial reporting. Key Responsibilities: 1. Finance & Channel Payment Management Lead and monitor channel finance payment processes with accuracy and timeliness. Coordinate with sales and dealer teams for payment follow-ups, receipts, and settlements. Maintain ...

We are seeking proactive and persuasive Tele calling Executives to engage with potential customers, convert social media leads into business opportunities. The ideal candidate will have excellent communication skills, a customer-centric approach, and a passion for sales. The potential candidate will maintain daily reports and data base and make frequent follow ups. Lead Engagement : Initiate calls to potential customers obtained from social media platforms, converting inquiries into sales opportunities. Follow-Up : Maintain regular follow-up with leads to nurture relationships and move them through the sales funnel. Feedback Collection : Gather customer feedback and insights to improve servi...

Job Summary: The MAC Head – Kerala (B2B Sales) will be responsible for leading and driving the Apple Mac business across Kerala , focusing on dealer network expansion, institutional business development, and consistent revenue growth. The role requires a strong understanding of Apple’s B2B ecosystem, channel sales management, and the ability to achieve category-specific targets through effective planning and execution. Key Responsibilities:1. Sales & Revenue Growth Achieve monthly and annual B2B sales targets for Apple Mac products in Kerala. Drive business through existing dealers and identify new B2B partners across the state. Develop Mac category sales strategies tailored to the Kerala ma...

Job Summary: The BDM Sellout Manager – B2B (Apple Business) is responsible for driving sellout performance, brand compliance, and field excellence across Apple’s premium partner stores in Calicut . This role demands strong leadership, deep field involvement, and strategic sales execution , ensuring that the 25 Apple promoters under supervision deliver exceptional results, customer experience, and brand value at every retail touchpoint. Key Responsibilities:1. Sellout Strategy & Target Achievement Develop and implement area-wise sellout strategies aligned with Apple’s business goals. Achieve monthly and quarterly sellout targets for all Apple product categories (iPhone, Mac, iPad, Watch, Acce...

Job Summary: The Area Business Manager – B2B will be responsible for driving Apple product sales within the assigned territory (Thrissur) through effective dealer management, new business development, and relationship building. The role focuses on maximizing B2B opportunities, expanding the dealer network, and ensuring consistent achievement of sales and profitability targets. Key Responsibilities: 1. Sales & Business Development Achieve monthly, quarterly, and annual B2B sales targets for Apple products. Identify and onboard new B2B partners, dealers, and institutional clients. Develop and execute sales strategies to expand the Apple market presence in the assigned area. Ensure proper produ...

We are seeking an energetic and goal-oriented BDM to spearhead B2B sales operations for mobile phones and related technology products in Palakkad. The ideal candidate will build strong relationships with retail partners, drive product penetration, manage key accounts, and expand business opportunities across the assigned region. Key Responsibilities: Sales Development: Drive B2B sales of mobile phones, accessories, and technology products through dealer and retail channels. Identify, onboard, and activate new retail partners. Achieve monthly, quarterly, and annual sales targets. Channel & Partner Management: Maintain strong relationships with existing retailers, resellers, and channel partne...

Job Summary: The HR Manager will be responsible for driving employee performance, ensuring statutory compliance, and enhancing overall team effectiveness across the organization. This role requires a proactive leader with strong interpersonal and coaching skills to build a motivated, high-performing workforce aligned with company objectives. Key Responsibilities: 1. Performance Coaching & Employee Development Conduct regular performance reviews, identify skill gaps, and implement coaching plans. Design and execute employee development and training programs to enhance productivity. Work closely with department heads to drive a culture of continuous performance improvement. 2. Team Monitoring ...

Lead RTL Design Engineer LNT/LRDE/1553275 LTST-L&T Semiconductor Technologies LimitedBengaluru Posted On 29 Dec 2025 End Date 27 Jun 2026 Required Experience 12 - 17 Years Skills Knowledge & Posting Location RTL DESIGN RTL DEVELOPMENT RTL CODING VERILOG LINT CDC Minimum Qualification BACHELOR OF ELECTRICAL ENGINEERING (BEE) Job Description Purpose: LTSCT’s Chief Development Organization and Global Engineering team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for LTSCT's Automotive, Industrial, Energy and Telecom infra business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low power...

Senior Validatoin Engineer LNT/SVE/1575955 LTST-L&T Semiconductor Technologies LimitedBengaluru Posted On 29 Dec 2025 End Date 27 Jun 2026 Required Experience 7 - 15 Years Skills Knowledge & Posting Location VALIDATION Minimum Qualification BACHELOR OF ENGINEERING (BE) Job Description Senior Validation JD Knowledge of one or more Protocols: PCIe, LPDDR, SPI, USB, AXI, Lin CAN , ETHERNET, MMI DSI/CSI Knowledge of ARM and/or x86 SoC Architecture with internal understanding of complete BOOT Process. Strong experience in C programming language and Assembly Language. Free-RTOS experience Networking / Wifi stack in Linux and/or networking stack in FreeRTOS Strong experience in one or more scriptin...

Job Details: Job Description: You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology. In this position, you will be responsible for leading the design analysis and methodologies of the different types of memory blocks and data path subsystems. Your responsibilities will include but not limited to: 1. Responsible for methodology enablement for memory blocks to meet over 5GHz Freq and low-power digital designs with optimal area. 2. In depth understanding of different memory design concepts ((SRAM/RF/ROM). 3. Expertise in Static timing analysis concepts. 4. Close work with Layout and Floor planning teams. 5. Back-end design imple...

Position: PD CAD Engineer (SI50FT RM 3837) Job Overview We are seeking a PD CAD Engineer with 5+ years of experience in physical design and CAD flow development, with strong hands-on expertise in Synopsys Fusion Compiler–based physical implementation flows. The role involves building, customizing, and supporting robust RTL-toGDSII methodologies, closely collaborating with design to enable predictable PPA closure on advanced technology nodes. This role requires solid execution capability, deep tool knowledge, and a strong understanding of PnR and signoff methodologies, not just tool operation. Key Responsibilities Develop, customize, and maintain end-to-end RTL-to-GDSII physical design CAD fl...