ASIC Digital Design, Staff Engineer

Alternate Job Titles:

• ASIC Digital Design, Staff Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and experienced digital design engineer with a deep-rooted curiosity for advancing technology. With a strong foundation in RTL coding, microarchitecture, and high-speed digital IP, you thrive on tackling complex engineering challenges and delivering robust, scalable solutions. You are comfortable navigating the nuances of cutting-edge SERDES IP development and enjoy collaborating with cross-functional teams to deliver industry-leading results. Your proactive nature keeps you ahead of the curve, and your keen problem-solving abilities allow you to identify and resolve issues swiftly. You communicate effectively, ensuring your ideas are heard and understood, and you take pride in mentoring peers and contributing to a culture of continuous learning. You value diversity, demonstrate adaptability in a fast-paced environment, and bring both creativity and discipline to your work. Your technical acumen is matched by your drive to innovate, automate, and optimize design flows, making you an invaluable asset to any team focused on delivering world-class silicon solutions.

What You’ll Be Doing:

• Analyzing and understanding complex IP specifications, clock architectures, and interface requirements for high-speed SERDES IP.
• Designing, implementing, and optimizing Verilog RTL code to meet stringent performance, area, and power goals.
• Debugging and verifying advanced digital features to ensure functional correctness and compliance with industry standards
• Developing and automating design flows and scripts using Perl, Tcl, or Python to enhance productivity and streamline processes.
• Collaborating with cross-functional teams, including analog, verification, and validation groups, to resolve technical challenges creatively.
• Participating in design reviews, providing technical leadership, and contributing to best practice methodologies for digital IP development.
• Staying current with industry trends and integrating innovative techniques into the design and verification process.

The Impact You Will Have:

• Enable the delivery of next-generation high-speed SERDES IP that powers a diverse range of customer products.
• Drive innovation in digital design methodologies, boosting design efficiency and product quality.
• Ensure Synopsys DesignWare IP remains at the forefront of performance, reliability, and feature support in the global market.
• Facilitate seamless integration of IP into customer SoC designs, accelerating time-to-market for industry leaders.
• Mentor and uplift the technical capabilities of team members, fostering a culture of collaboration and excellence.
• Contribute to Synopsys' reputation as a trusted partner for silicon-proven, high-performance IP solutions.
• Support continuous improvement by identifying and implementing process and technology enhancements.

What You’ll Need:

• Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.
• 6 to 10 years of hands-on experience in high-speed digital IP design, particularly for SERDES or similar interfaces.
• Expertise in microarchitecture, RTL coding (Verilog), and debugging complex digital designs.
• Proficiency with industry-standard EDA tools and design flows for digital implementation and verification.
• Strong scripting skills in Tcl, Perl, or Python for flow automation and process enhancement.
• In-depth understanding of timing analysis, clock domain crossing, and interface protocols.

Who You Are:

• Analytical thinker with excellent problem-solving and debugging skills.
• Proactive, self-motivated, and eager to take initiative in challenging situations.
• Exceptional communicator who thrives in a collaborative, cross-functional team environment.
• Committed to continuous learning, embracing new tools, techniques, and industry trends.
• Adaptable, resilient, and able to manage multiple priorities in a fast-paced setting.
• Values diversity, inclusion, and a culture of mutual respect.

The Team You’ll Be A Part Of:

You will join a world-class team of digital and mixed-signal engineers focused on developing high-speed SERDES IP, a cornerstone of the Synopsys DesignWare portfolio. Our team values innovation, collaboration, and technical excellence. We work closely with specialists across analog, verification, validation, and customer support to deliver robust, scalable IP solutions that meet the highest standards of quality and performance. You’ll have the opportunity to collaborate with experts in the field, contribute to groundbreaking projects, and help shape the future of silicon technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.