STAFF ENG-HIG-HBM-LAYOUT

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Role and Responsibilities

• Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design

• Perform layout verification like LVS/DRC/Antenna, quality check and documentation.

• Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.

• Lead the layout design and development of complex analog, mixed-signal, and digital blocks and full chip level integration

• Ensure timely delivery of high-quality block-level layouts, meeting project milestones and design specifications.

• Perform layout verification including LVS, DRC, and antenna checks, along with thorough quality reviews and documentation.

• Collaborate with global engineering teams to ensure successful execution and integration of layout projects.

• Provide technical guidance and mentorship to junior team members, reviewing sub-block layouts and supporting their development.

• Demonstrate leadership in planning, time estimation, scheduling, and execution across multiple projects.

• Contribute actively to project management and cross-functional coordination.

• Proven experience in IC layout design with a systematic and methodical approach.

• Strong attention to detail and a passion for high-quality design.

• Excellent communication and collaboration skills, especially in a global team environment.

• Ability to manage multiple priorities and deliver results under tight timelines.

Qualification/Requirements

• 8 to 15 years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET )
• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
• Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Good understanding of Analog Layout fundamentals (e.g., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
• Understanding layout effects on the circuit such as speed, capacitance, power and area etc.,
• Ability to understand design constraints and implement high-quality layouts.
• Ability to understand design hierarchy and different architectures for Memory designs.
• Excellent command and problem-solving skills in physical verification of custom layout.
• Multiple Tape out support experience will be an added advantage.
• Experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development.
• Excellent verbal and written communication skills.

• Experience: 8–15 years in analog/custom layout design across advanced CMOS process nodes, including Planar and FinFET technologies.

• Tool Proficiency: Strong expertise in Cadence VLE/VXL and Mentor Graphics Calibre for DRC/LVS verification is essential.

• Technical Expertise: Hands-on experience in layout design of critical analog and mixed-signal blocks such as:

• Temperature Sensors, PLLs, ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, and Differential Amplifiers.

• Fundamentals: Solid understanding of analog layout principles including matching, electromigration, latch-up, coupling, crosstalk, IR-drop, and parasitic effects.

• Design Awareness: Ability to assess and mitigate layout impacts on circuit performance—speed, capacitance, power, and area.

• Memory Architecture: Familiarity with design hierarchies and memory layout architectures is a plus.

• Verification Skills: Strong problem-solving skills in physical verification and debugging of custom layouts.

• Tapeout Experience: Prior involvement in multiple successful tapeouts is highly desirable.

• Project Management: Proven ability to manage multiple layout projects, ensuring quality and timely delivery at all stages.

• Communication: Excellent verbal and written communication skills, with the ability to collaborate effectively across global teams.

Education

BE or MTech in Electronic/VLSI Engineering

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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