Emulation Engineer

Job Summary

Roles And Responsibilities

• Work on emulation bring-up, build flows, and model compilation for large SoC or IP-level designs.
• Develop and maintain emulation test environments using supported emulation platforms (Palladium, Protium, Zebu, Veloce, or EP).
• Perform debugging and analysis of design issues using waveform and log-based tools such as Verdi or SimVision.
• Support integration of firmware/software in emulation to enable early validation and software development.
• Collaborate with RTL design and verification teams to ensure smooth migration of designs from simulation to emulation.
• Optimize performance and throughput of emulation runs for efficiency and faster turnaround.
• Work on hardware/software co-validation, test case development, and emulation-based regression execution.
• Automate emulation workflows and test management using Perl, Python, Makefiles, or shell scripting.
• Debug and validate interfaces and protocols such as PCIe, USB, DDR, SPI, and other high-speed communication standards.
• Provide documentation, reports, and technical support to internal and cross-functional teams.
  

Required Skills And Qualifications

• Hands-on experience with any major emulation platforms Palladium, Zebu, Veloce, Protium, or EP.
• Strong understanding of digital design (RTL) using Verilog/VHDL.
• Proficiency in SystemVerilog, C/C++, and DPI for testbench integration and modeling.
• Familiarity with waveform debug tools (Verdi, SimVision, etc.) and emulation control utilities.
• Working knowledge of SoC interfaces and protocols PCIe, USB, DDR, SPI, etc.
  

Scripting & Automation

• Experience in writing automation scripts using Python, Perl, Shell scripting, or Makefile to streamline flows.
  

Education

• Bachelors or Masters degree in Electronics, Electrical, or Computer Engineering.
• Minimum 4 years of relevant industry experience in design verification or emulation domains.
  

Preferred / Good To Have

• Experience with pre-silicon validation and hardware/software co-verification.
• Exposure to FPGA prototyping or acceleration environments.
• Familiarity with UVM methodology and simulation-to-emulation flow migration.