389 Emulation Jobs

· Materials Management: Responsibilities of fully Computerized & SAP Procurement. Showing of Requisitions/Purchase Order/GRN / Issues/ sales/ Stock Verification/ Physical Inspection, Stacking, · Monitor the Employee activities of various Site Store · Staff requirement & ERP training class in head office and presentation of standard origination procedures and company policies. · Close Monitoring the transaction of Bulk Material (Steel /Cement/Bitumen / Emulation / HSD / FO / moving activities) · Maintaining Minimum & Maximum Level of Critical & Fast Moving Items, Maintaining · Monitoring the all types of material inventory in ERP · Ensure the quality & quantity of material purchase at site. · Creating different reports as required by Management. · Receiving of MIS from the project stores on various aspects. · Collection of Physical verification of all material from sites by monthly. · Internal audit queries rectification and explanations to Management · Taking care as inventory controllers, of Assets, inter site stock and Asset transfer, transfer or disposal of Nonmoving items. Accounting of scrap items for disposal. · Co-ordination with Purchase, Commercial Department and Supplier. · Monitoring the Document(GRN/MIN/STN/GP/ASSETS Under stores /) generating status as per Policy · Preparation of layout of stores for storage of material as per nature · Monitoring the Scrap Policy and its implementation (getting Scrap declaration, raising sale Indent, Delivery Order, Buyer Comparison Statement, etc.) · Inventory-level Fixation · Monitoring of slow / non-moving inventory · Inter-store Transfer · Material Storage · Issue of Returnable Tools · Return to Vendor\ · Project Returns · Heading the Job of Internal Auditor- ISO-9001-2008, 19011-2011. Visiting to Project Site, looking after the follow up of stores process, for more Information Call at 8223041865 (Whats app) and share your resume at career@apcoinfra.com

You should have a B.E./B.Tech/ME/M.Tech degree in Electronics and Communication with 3-8 years of experience in the verification domain. You must possess deep protocol insight in NVMe, DDR4/5, DIMMs, HBM2/3 protocol and hands-on experience in developing complex protocols verification components with System Verilog, Verilog, and OVM/UVM methodology, with knowledge of C/C++ being a plus. Additionally, you should have a good understanding of simulation and/or emulation technologies, with proven triage skills and familiarity with new product deployment challenges across different geographies. Scripting skills are also required for this role. Your responsibilities will include successfully deploying emerging protocol standards solutions for simulation and emulation platforms, along with publishing success stories for each successful deployment. You will also be responsible for periodic protocol spec upgrades and providing the latest product offering training to field AEs for scalability in deployments. Tracking protocol evolution in standards org meetings and sharing insights with marketing, engineering, and application engineering teams will be part of your role. Furthermore, you will be expected to contribute to technical publications in standards conferences like DVCon, DAC, SNUG to promote Synopsys solutions visibility. You will validate the field of use through expert testing for leading-edge solutions before early adopter releases and be an effective reviewer of user APIs and test plans. Ensuring solutions collateral readiness by contributing/reviewing datasheets, feature-specific PDFs, and user guides aligned with the latest release offerings is also a key responsibility. In addition, you will help drive product direction and product roadmap based on customer requirements, market size, and adoption assessment. You will need to set the right priorities based on business requirements. Traveling internationally and domestically may be required for this role.,

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP an added advantage. We’re doing work that matters. Help us solve what others can’t.

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: o Create System and FPGA designs to exercise all the use models targeted for each product mimicking end applications in a customer setting. o Write system and product level validation plans for new and existing silicon products and projects; execute per plan, record and communicate results o FPGA prototyping and emulation. Understanding spec., writing emulation plan and executing per plan. Record and communicate results. o Understand hardware architectures, use models and system level design implementations required to utilize the silicon features. o Be an effective contributor in a cross-functional team-oriented environment. o Write high quality code in Verilog, VHDL and C code for embedded processors. Maintain existing code. o Learn new system designs and validation methodologies. Understand FPGA architectures. o Be conversant with on-chip debug tool Requirements/Qualifications: Excellent verbal and written communication skills in English 5+ Years experience in Design with RTL coding in Verilog and VHDL and Verification of RTL Possess an in-depth understanding of hardware architectures, system level IC design implementation, knowledge of how to create end use scenarios Optimizing code for FPGA architectures Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools Basic knowledge of embedded processors such as ARM Cortex-M3 or RISC and familiarity with AMBA protocols APB, AHB, AXI, ACE Working knowledge on embedded software C/C++ is also a plus Strong technical background in FPGA prototype emulation, and debug Strong technical background in silicon validation, failure analysis and debug Excellent Board level debug capabilities in lab environment : hands-on troubleshooting skills for digital logic and analog circuit on PCB’s using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Idenitfy, Xilinx Chipscope, Altera Signalscope, Lattice Reveal Design with RTL coding in Verilog and VHDL is a must Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools Hands-on systems level design and debug experience with at least two of the following high-speed serial communications protocols: i. PCIe Gen1/2/3 ii. Interlaken (10.3125 Gbps) iii. CPRI (614.4Mbps – 12.672 Gbps) iv. SGMII or QSGMII v. XAUI or HiGig/+/II vi. 10GBASE-R/-KR vii. Serial Rapid IO Travel Time: 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

www.omnidesigntech.com Senior SoC Director / SoC Director Bangalore / Hyderabad About Omni Design Technologies Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, which enable differentiated system-on-chip (SoC), in applications ranging from 5G, wireline and optical communications, LiDAR, radar, automotive networking, AI, image sensors, and the internet-of-things (IoT). Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few MSPS to more than 100 GSPS sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins-Colorado, Bangalore-India, Hyderabad-India, Dublin-Ireland, Boston-Massachusetts. Bangalore Engineering – Digital Circuit Design / Hyderabad / Bangalore SOC Development – Engineering / Full-time / Hybrid Omni Design is working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers. The Manager of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog/RF engineering, FW engineering, verification, Systems Validation team, Operations, SOC Architects, and report to the VP / SVP of ASIC Engineering. Roles and Responsibilities Manage digital team, hire, and retain best talent Lead SOC integration design team to develop and productize next generation mixed-signal RF/communication SOCs Work with cross-functional project teams to define product specifications, system architecture, HW/SW partitioning, and execution plan Implement best SoC development practices and improve design methodology to maximize efficiency and predictability Deliver chip architecture, design, integration, programming model, verification, and manage hand-off to backend Support Silicon and System Validation, support system integration, and production testing Drive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution Qualifications BSEE Required, MSEE Preferred Proven track record of success in high-performance/high-volume semiconductor industry SoC, embedded CPU and bus architectures, networking, and control interfaces Communications / DSP algorithms and power / area efficient implementations Digital IC design, design for low power and high speed, design for test (DFT) System modeling, RTL coding, Lint / CDC checking, simulation, synthesis, power analysis, timing analysis in Cadence / Synopsys design environments Directed and constrained random verification, UVM methodology Embedded systems FPGA emulation, lab debug and chip validation Project planning and execution, and performing design tradeoffs to achieve performance, power, die size, and schedule targets Self-motivated, excellent communication skills, and ability to excel and to provide leadership in a fast-paced environment Senior Management experience preferred Work with architecture, physical design, and design teams to lead the implementation of the digital architecture. Develop and refine specification of the micro-architecture for the digital architecture. Is in tune with industry trends and contributes to consistent roadmap decisions. Experience 15-30+ years of experience in the area of RTL design and verification of silicon At Least 3+ years experience in leading low-power mixed-Signal SOC design 10+ years of experience with FPGA architecture specification and design (Altera or Xilinx) for high-speed serial protocols, including USB-SS, PCIe, SATA/SAS, DisplayPort Experience in leading, specifying, and work with Analog/RF team in developing, verifying, and productizing SERDES, CDR, and PLL/DLL designs Experience with USB 3.0, DisplayPort, PCIe, or SATA based silicon designs preferred Strong background in analog/mixed-signal integrated SOC Development Strong Hardware design knowledge and familiarity with signal integrity Strong foundation in SoC architecture, design, verification and physical implementation Strong analytical problem solving, and attention to details Knowledge of wireless, mobile, and storage domains Expertise in Verilog/System Verilog, C/C++/SystemC, UVM, Scripting languages like Perl/Python, etc. Excellent technical documentation skills Excellent written and verbal communication skills Excellent interpersonal skills, self-motivated, self-starter Experience in startup environment Expectations Put the RTL for the Full chip together. Evaluate the IP we have to license – like PCIe, LPDDR4, JESD 204C PHY Help develop any BIST Work with Verification Team to develop the FC Simulation test suites Develop the RTL for the various state machines and interfaces Run a few of the simulations Help with the FC simulations debug Help close the timing issues if any come up and work with the PD person to resolve any SI issues. Be a mentor and lead a team of Digital design engineers Work with Systems and Test engineering team to help validate the parts and release them to production We are looking for trailblazers ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem. we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring our vision to fruition. If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us. We are a equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com 'Mining The Knowledge Community'

As a Hardware-Assisted Verification Expert at Synopsys, you will play a crucial role in bridging and closing gaps between Emulation IP features and Design IP verification for both Controller and PHY functions. Your deep knowledge of IP interfaces like PCIe and DDR, coupled with experience in platforms such as Zebu, HAPS, and EP, will be essential in driving requirements for Emulation IP and ensuring its correct deployment in verification strategies. Your hands-on approach and collaborative mindset will drive innovation in defining requirements for IP product development in the context of emulation. Your responsibilities will include reporting metrics, driving improvements in Emulation IP, ensuring test plans deliver required function and quality, and staying ahead of evolving standards. You will enhance cross-functional collaboration, change the validation mindset in using Emulation IP for digital designs, and evolve best-in-class methodologies within the organization. Your impact will be felt in improving product quality, driving innovation, and standardizing workflows to increase efficiency and compliance. To excel in this role, you should have 10+ years of relevant experience, a results-driven mindset, exposure to advanced protocols like PCIe and DDR interfaces, and a proven track record in IP product development, particularly in emulation. Your excellent communication skills, adaptability, and comfort in a matrixed, international environment will be key in driving success in this position. Join us at Synopsys to transform the future through continuous technological innovation.,

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. How You Will Contribute Test and Automation Engineer will be responsible for setting up platform-dependent current and next-generation packet software features test setups encompassing the broad spectrum of CIENA's networking products.You will get an opportunity to work on TDM (Time Division Multiplexing) Circuit Emulation (CEM) features with synchronization information through the use of various Transport technologies (packet network). RSP QA/PV team charter is to execute manual testing & automation of new features, validate deployment use-cases of major customers involving both Ciena and third-party devices. Responsibilities Include Work closely with engineers within and across teams to ensure quality coverage for the features. Generate test plans and perform end to end Routing and Switching system testing of new software features. Coordinate activities with Gurgaon and North America test and development teams on need basis. Contribute actively on FS, Test plans, Automation Scripts, Customer Documentation update and review. Participate in group design meetings and internal brainstorming sessions to discuss problems and solutions. Writing and Execution of manual and automation suites and reporting test results with artifacts. Detailed knowledge of Routing and Switching protocols and at ease to ramp up quickly on new technologies and concepts. Expertise on TDM (Time Division Multiplexing) Circuit Emulation (CEM) features with synchronization information. Required Skill Experience with the scripting languages like Python and proven ability to automate. Team oriented, strong inter-personal skills and ability to understand feature needs, expectations and perspective. Experience with networking models and protocols. Position requires proficient troubleshooting and problem-solving skills. Understanding of advanced concepts/methodology and contributes to improving and extending the impact and effectiveness of those concepts in the features. Expertise on TDM (Time Division Multiplexing) Circuit Emulation (CEM) features with synchronization information. Expertise on TDM/CEM/Networking protocol test set equipments. RFC related information to be used in test planning is highly desirable. Required Experience BE / B.Tech. (ECE/CSE) Degree. 7 years of relevant experience in telecommunications, test and automation. Good Experience In Python Is Required. Experience with Ixia/Spirent L2/L3 and TDM/CEM/Timing Test set equipments. Experience of AI tools are desirable. Experience on TDM (Time Division Multiplexing) Circuit Emulation (CEM) features with synchronization information is a must. Must-haves -Location: Full time, based in Gurgaon (the candidate will be expected to spend a significant amount of time on site in the lab) Not ready to apply? Join our Talent Community to get relevant job alerts straight to your inbox. At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination. Ciena is an Equal Opportunity Employer, including disability and protected veteran status. If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Innovation starts from the heart. At Edwards Lifesciences, we’re dedicated to developing ground-breaking technologies with a genuine impact on patients’ lives. At the core of this commitment is our investment in cutting-edge information technology. This supports our innovation and collaboration on a global scale, enabling our diverse teams to optimize both efficiency and success. As part of our IT team, your expertise and commitment will help facilitate our patient-focused mission by developing and enhancing technological solutions. Provide deep technical expertise in offensive security across a wide range of modern enterprise environments, including cloud infrastructure, web applications and enterprise technologies. Execute penetration tests, purple team exercises and red team operations targeting AWS environments, enterprise applications, and other critical systems. Collaborate with stakeholders to assess, exploit, and strengthen the security posture of diverse technology stacks and architectures. How you will make an impact : Execute advanced penetration tests and red team engagements across diverse environments, including cloud, on-premises, and hybrid infrastructures. Design and implement offensive security methodologies to simulate real-world attack scenarios. Identify and exploit vulnerabilities, misconfigurations, and privilege escalation paths in various systems and services. Develop and maintain custom tools and scripts to support exploitation, automation, and reporting. Perform root cause analysis of security issues and deliver actionable remediation guidance. Collaborate with internal teams to enhance security posture through knowledge sharing, tool development, and methodology refinement. What you'll need (Requirements) : Bachelor’s or Master’s degree in Computer Science, Cybersecurity, Engineering, or a related technical field. 7+ years of experience in offensive security, with focus on cloud (AWS, Azure) penetration testing. Relevant certifications preferred (e.g., OSCP, OSEP, CRTO, CRTL, CARTS, ARTE). What else we look for (Preferred) : Deep understanding of cloud platforms (e.g., AWS, Azure) and their core services, along with common security misconfigurations and attack vectors. Proficiency in scripting languages such as Python, Bash, or PowerShell, and familiarity with offensive security tools (e.g., Impacket, Pacu, ROADtools, or similar). Strong knowledge of adversary tactics and techniques, including frameworks like MITRE ATT&CK and other threat emulation methodologies. Excellent analytical and problem-solving skills with a keen attention to detail. Ability to design and execute complex attack chains across cloud, hybrid, and on-premises environments. Capable of planning and executing stealthy operations with a strong focus on operational security (OPSEC). Strong communication skills, including the ability to write clear technical reports and engage effectively with stakeholders. Experience with Active Directory security, red team operations, or threat emulation is a plus.

You are a skilled SOC Verification engineer with over 3 years of experience in the field. Your expertise includes a strong knowledge of ARM architecture, CPU fundamentals, and Cache coherency. You are proficient in programming languages such as C/C++, assembly, and scripting languages. Additionally, you have a good understanding of low-power design and verification methodologies. In this role, you will be responsible for developing CDV UVM verification environments at the system level. You will verify CPU connectivity to IP blocks and develop SoC test plans and test cases. Tracking metrics, including code and functional coverage, will be an essential part of your responsibilities. To qualify for this position, you should hold a Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field. You must have a minimum of 3 years of experience in SoC ASIC/FPGA verification. Proficiency in SystemVerilog (SV) and Universal Verification Methodology (UVM) is required. Experience with simulation, emulation, and formal verification techniques is also necessary. Strong debugging and problem-solving skills will be beneficial in this role. This position is located in Noida, and the ideal candidate should possess a BTECH/MTECH degree in Electrical/Electronics/Computer Science Engineering or an equivalent field.,

Position Overview: Adani Group is seeking an experienced Red Teaming Cybersecurity Expert to design and execute red teaming exercises aimed at testing and enhancing the security posture of Adani Group’s diverse entities. This includes critical infrastructure sectors such as Ports, Airports, Power, and Digital. The Red Teaming Expert will identify vulnerabilities, simulate advanced cyberattacks, and work closely with internal teams to improve detection and defense mechanisms. Key Responsibilities: 1. Strategic Red Teaming and Penetration Testing Execute sophisticated red teaming engagements to simulate real-world attack scenarios. Develop and implement long-term offensive security strategies to proactively identify and address vulnerabilities across diverse environments. Conduct comprehensive penetration testing on internal networks, cloud environments, and applications. Execute social engineering attacks, phishing campaigns, and physical intrusions as part of full-spectrum red team operations. 2. Adversarial Threat Simulation & Attack Path Mapping Develop and refine threat emulation plans, leveraging TTPs (tactics, techniques, and procedures) used by nation-state actors and other adversaries. Model various attack paths from an adversary’s perspective to test the resilience of existing security measures. Simulate attacks against IT, OT (Operational Technology), and ICS (Industrial Control Systems) environments, ensuring critical infrastructure protection. 3. Collaborative Defense & Response Enhancement Collaborate with Blue Teams, incident response teams, and the Security Operations Center (SOC) to enhance detection, response times, and mitigation strategies. Provide detailed feedback on the effectiveness of security controls, detection mechanisms, and incident response processes. Develop and conduct collaborative red-blue team exercises (purple teaming) to continuously improve organizational defense mechanisms. 4. Vulnerability Research & Exploit Development Conduct research on emerging cybersecurity threats and stay current with evolving vulnerabilities, zero-day exploits, and new attack techniques. Develop or customize proof-of-concept exploits to demonstrate the impact of vulnerabilities in real-world scenarios. Perform threat intelligence analysis to determine the most relevant and high-risk attack vectors for Adani’s business environment. 5. Reporting & Risk Communication Produce comprehensive technical reports and executive-level summaries detailing vulnerabilities, successful attack simulations, and recommendations for improvement. Translate complex security vulnerabilities into business risk language for presentation to senior management and business stakeholders. Present red team findings in a clear and concise manner to leadership teams and board members, offering strategic insights for enhancing the overall cybersecurity posture. 6. Training, Mentoring, and Knowledge Sharing Provide mentorship and training to junior red team members and internal security teams, fostering a culture of proactive security and continuous improvement. Conduct workshops and tabletop exercises with business units to raise awareness about red teaming methodologies and the importance of cybersecurity. 7. Tool Development & Automation Develop, customize, or extend red teaming tools, scripts, and automation frameworks to simulate various attack vectors. Continuously assess and introduce new red teaming tools to improve the efficacy and realism of adversary simulations. 8. People Management Foster an environment of learning, excellence, and innovation within the team and across teams. Provide mentorship and guidance to junior team members. Conduct performance reviews and provide constructive feedback. Ensure continuous professional development of team members. Qualifications & Skills: Education: Bachelor’s or master’s degree in computer science, Cybersecurity, Information Security, or a related technical field. Relevant professional certifications in cybersecurity. Experience: 4+ years of experience in cybersecurity, with a minimum of 2+ years in red teaming, offensive security, ethical hacking, or penetration testing. Proven track record of executing large-scale red teaming exercises in complex environments, including experience with critical infrastructure (Ports, Airports, Energy, etc.). Extensive experience in simulating advanced cyberattacks, particularly in industrial environments, OT, and ICS. Certifications: CRTP, OSCP, OSCE, CREST certifications or equivalent in red teaming and penetration testing. Other cybersecurity certifications such as CISSP, CEH, GIAC, GCIH, GPEN are CRTP advantageous. Technical Skills: Expert knowledge of offensive security tools (e.g., Metasploit, Cobalt Strike, Burp Suite, Empire, etc.) and threat simulation frameworks. Strong understanding of TTPs used by cybercriminals and APT groups (MITRE ATT&CK framework knowledge preferred). Deep expertise in network protocols, firewalls, intrusion detection systems, and secure configurations. Proficient in various operating systems (Windows, Linux, macOS) and cloud environments (AWS, Azure, GCP). Knowledge of Operational Technology (OT) and Industrial Control Systems (ICS) security challenges and attack methodologies. Experience with exploit development and custom tool creation for red teaming operations. Soft Skills: Communication: Excellent written and verbal communication skills, with the ability to convey complex technical information to non-technical stakeholders. Problem-Solving: Strong problem-solving skills, strategic thinking, and analytical ability to assess risks and prioritize mitigation. Leadership: Effective leadership and mentoring abilities for team members. Collaboration: Ability to work collaboratively with cross-functional teams and foster a culture of proactive security. Adaptability: Ability to work in high-pressure environments and handle multiple concurrent assignments with minimal oversight. Ethical Mindset: Commitment to ethical hacking principles and maintaining the highest standards of integrity. Continuous Learning: Dedication to staying ahead of cybersecurity threats through ongoing research and professional development. Key Competencies: Adverserial Mindset: Ability to think like an adversary and develop innovative ways to bypass security controls. Collaborative Spirit: Strong emphasis on working closely with blue teams and cross-functional teams. Continuous Learning: Commitment to staying ahead of cybersecurity threats by engaging in ongoing research and professional development.

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and better? Join us – whichever path you take, we’re looking forward to seeing your point of view! Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and growing further. This is your Role Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog. Required Experience: We seek a graduate with at 5-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products. We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance. We've got quite to offer, how about you? We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. #LI-EDA

Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. In this role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for sub-systems and the full chip. You will participate in the design verification and bring-up of the chip and subsystems by writing relevant assertions, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will participate in the lab bring-up of these blocks either in FPGA, emulation, or silicon by potentially writing test scripts, analyzing lab data, proposing experiments, etc. Role You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement complex functional block that enable development of world-class hardware devices. In this role, you will: Design world class hardware and software Communicate and work with team members across multiple disciplines Deliver detailed test plans for verification of the full chip or sub-system by working with design engineers and architects Create and enhance constrained-random verification environments using SystemVerilog and UVM Write tests in C to run out of the CPU Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and to show progress towards tape-out. Participate in test plan and coverage reviews The ideal candidate should have experience with RTL development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. We are looking for a self-driven individual who can work with architects, HW and SW developers and can quickly resolve blocking issues. Key job responsibilities Design Verification of Subsystems such as CPU, NPU, and SOC. Drive Verification Methodology using System Verilog / C++ based test benches. Basic Qualifications Bachelor’s degree or higher in EE, CE, or CS 10+ years or more of practical semiconductor design verification experience including System Verilog, UVM, assertions and coverage driven verification. Experience using multiple verification platforms: UVM test bench, FPGA, emulator, software environments and system testing Experience defining verification methodologies Experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design Experience with writing directed tests Experience identifying bugs in architecture, algorithms, functionality and performance with strong overall debug skills Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing Experience with industry standard tools and scripting languages (Python or Perl) for automation Understanding and knowledge of object oriented programming concepts Preferred Qualifications PhD in Computer Science, Electrical Engineering, or related field Experience with ARM and various DSP ISA Experience with CPU block level testing Experience debug Company - Amazon.com Services LLC Job ID: A3016320

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title And Summary Senior Software Engineer Overview Mastercard is a global technology company in the payments industry. Our mission is to connect and power an inclusive, digital economy that benefits everyone, everywhere by making transactions safe, simple, smart, and accessible. Using secure data and networks, partnerships and passion, our innovations and solutions help individuals, financial institutions, governments, and businesses realize their greatest potential. Our decency quotient, or DQ, drives our culture and everything we do inside and outside of our company. With connections across more than 210 countries and territories, we are building a sustainable world that unlocks priceless possibilities for all. Services within Mastercard is responsible for acquiring, engaging, and retaining customers by managing fraud and risk, enhancing cybersecurity, and improving the digital payments experience. We provide value-added services and leverage expertise, data-driven insights, and execution. About Ethoca At Ethoca, you can join a team of top business and technology innovators who are transforming the industry. We are changing the payments landscape and reinventing the way global merchants and issuers combat fraud and reduce costs. Our services allow customers to focus on what really matters - increasing sales and creating a great customer experience. Our relentless customer focus is what makes us an award-winning company. Role As a Senior Software Engineer in Test / Senior Automation Engineer, you will: Play a crucial part in helping drive Quality initiatives across the teams Adhere to enterprise quality standards, processes and tools Responsible for developing and executing test plans for a single application, independently generating test data and recognizing test environment preparation needs Participate in project-level reviews, walkthroughs and inspections, and conducts test reviews, including test plans, requirements, cases and automation Achieve maximum coverage for test automation Responsible for automation and Continuous Integration (CI). Work closely with development team to identify defects early in the cycle through requirements analysis and code reviews. You Should Apply If Bachelor/Master’s Degree in Computer Science or equivalent work experience with exposure to quality engineering processes 6-8 years of overall experience. Sound knowledge of Java, Spring, JUnit, Eclipse IDE, Rest Assured, Appium, Jbehave/Cucumber frameworks, Databases, APIs (REST/SOAP), Continuous Delivery concepts and tools such as Jenkins/Bamboo, vulnerability tools such as Sonar, Checkmarx/Fortify, etc. Good knowledge of payments domain message flows, architecture, common design patterns, ISO message protocols, simulation/emulation tools highly desirable. Experience in multiple types of coding, software development, and/or using automation frameworks; Hands on experience in writing functional and integrational test cases; Exposure in building and using automation frameworks using technologies: Serenity, Cucumber, Browserstack, Selenium, others Experience testing APIs (REST) Experience in UI testing Well versed with writing complex database queries to validate data Ability to create good acceptance and integration test automation scripts and integrate with Continuous integration (Jenkins) Successfully developed high quality test strategies and text execution, recognized test environment preparation needs Experience in building automation frameworks, acceptance and integration test automation scripts, integrating with other tools. It Would Also Be Great If you have knowledge of working on cloud technology such as Azure, AWS you have knowledge of performance and security testing (e.g. Gatling , JMeter, Blazemeter). Corporate Security Responsibility All activities involving access to Mastercard assets, information, and networks comes with an inherent risk to the organization and, therefore, it is expected that every person working for, or on behalf of, Mastercard is responsible for information security and must: Abide by Mastercard’s security policies and practices; Ensure the confidentiality and integrity of the information being accessed; Report any suspected information security violation or breach, and Complete all periodic mandatory security trainings in accordance with Mastercard’s guidelines.

Emulation engineers design, program, Emulate and test system as per the defined process by following all the processes Job Description: Construct prototypes and confirm designs with solutions/design team Testing the PLC program according to the protocol system on Emulation. Responsible to check the Emulation at critical points in the Automation Solution and create a Emulation Video. HMI/SCADA Screens Development & Programming implementation By using scripting develop new Automation Logic and Concepts Explore Smarter, cheaper technology and solutions for different automotive applications Educational Qualifications and Experience: Bachelor Degree of Engineering in Electrical/Electronics/E&TC Experience : 2+ year experience in the field of warehouse Automation and hands on on Siemens & Rockwell PLC Competencies: Having core knowledge in Siemens (S7-300, S7-1200, & S7-1500) & Rockwell (MicroLogix, Compact Log ix & Control Log ix) automation systems. Ability to program in multiple languages, including ladder logic, FBD, SCL & STL. Ability to read and interpret PLC wiring diagrams, Control Narratives. Knowledge programming languages like C,C++,Jscript,VBA,SQL Basic Knowledge of Database management like MSSQL,MySQL,experience of server client scada HMI/SCADA Screens Development & Programming implementation Allen Bradly,Siemens Good Communication skills,able to work in team and takes ownership

At Cadence, we are dedicated to hiring and nurturing leaders and innovators who are eager to leave a mark on the technology industry. With over 30 years of expertise in computational software, Cadence stands as a pivotal figure in electronic design. Our Intelligent System Design approach helps us provide software, hardware, and IP solutions that bring design ideas to life. Our clientele comprises the most groundbreaking companies globally, creating exceptional electronic products across various sectors such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and healthcare. The Cadence work environment offers a multitude of benefits: - A chance to engage with cutting-edge technology and a culture that fosters creativity, innovation, and impact-making. - Employee-centric policies that prioritize physical and mental well-being, career growth, learning opportunities, and acknowledging achievements based on individual needs. - The "One Cadence One Team" ethos that encourages collaboration within and among teams to ensure customer satisfaction. - A range of learning and development avenues tailored to cater to employees" specific interests and requirements. - Collaborating with a diverse team of enthusiastic, committed, and skilled individuals who consistently go the extra mile for customers, communities, and each other. Job Summary: We seek a professional with over 14 years of experience possessing the following skill set: - Proficiency in RTL design basics utilizing HDLs like VHDL/Verilog/System Verilog. - Comprehensive understanding of AMD (Xilinx) Ultrascale, Versal FPGAs architecture, and experience with Vivado for FPGA place and route. - Competence in defining constraints for FPGAs and conducting Static Timing Analysis. - Familiarity with FPGA prototyping or emulation is advantageous. - Eagerness to learn and explore new technologies, showcasing strong analytical and problem-solving abilities. - Effective written and verbal communication skills, a quick learner, and a team-oriented individual. At Cadence, we are committed to impactful work. Join us in unraveling challenges that others find insurmountable.,

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, we’ve got quite a lot to offer. How about you? We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrow’s idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and better? Join us – whichever path you take, we’re looking forward to seeing your point of view! Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and growing further. This is your Role Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog. Required Experience: We seek a graduate with at 5-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products. We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance. We've got quite to offer, how about you? We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

Help shape the future of mobility. Imagine a world with zero vehicle accidents, zero vehicle emissions, and wireless vehicle connectivity all around us. Every day, we move closer to making that world a reality. Aptiv’s passionate team of engineers and developers creates advanced safety systems, high-performance electrification solutions and data connectivity solutions so that automakers can bring advanced capabilities to more people around the globe. This is how we enable sustainable mobility and help to prevent accidents caused by human error. We’re hiring an Electrical/Electronics Engineer to design and develop our automotive products in the areas of Active Safety and User-Experience. This position is located in TCI. YOUR ROLE Job Responsibilities: Major Accountabilities: Apply expertise in embedded systems to develop simulation models and environments that accurately represent the behavior and performance of automotive electronic control units (ECUs). Collaborate with hardware engineers to integrate simulation models with hardware-in-the-loop (HIL) test benches, enabling comprehensive testing and validation of embedded systems in real-world scenarios. Lead simulation-related activities across the software development life cycle (SDLC), including requirements analysis, design, implementation, testing, and validation. Leverage knowledge of microcontroller architectures to optimize simulation performance and accuracy, taking into account factors such as memory constraints, processing capabilities, and real-time operation requirements. Develop simulation models for specific microcontroller platforms, including Renesas, Aurix, and S32, ensuring compatibility and scalability across different hardware configurations. Utilize testing tools and techniques, such as virtualization, emulation, and trace analysis, to identify and resolve issues related to simulation performance, functionality, and compatibility. YOUR BACKGROUND Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, Robotics, or related field. 5+ years of experience Development of simulation software using C programming and C++ languages, leveraging their capabilities to implement efficient and scalable simulation algorithms and data structures.. Utilize deep understanding of the automotive product development process to develop and maintain simulation tools and models for automotive embedded systems. Collaborate with cross-functional teams to ensure that simulation activities align with project timelines, requirements, and quality standards throughout the development lifecycle. Experience: 5+ to 9 years and above of relevant experience Why join us? · You can grow at Aptiv.Aptiv provides an inclusive work environment where all individuals can grow and develop, regardless of gender, ethnicity or beliefs. · You can have an impact. Safety is a core Aptiv value; we want a safer world for us and our children, one with: Zero fatalities, Zero injuries, Zero accidents. · You have support. We ensure you have the resources and support you need to take care of your family and your physical and mental health with a competitive health insurance package. Your Benefits at Aptiv: · Higher Education Opportunities (UDACITY, UDEMY, COURSERA are available for your continuous growth and development); · Life and accident insurance; · Sodexo cards for food and beverages · Well Being Program that includes regular workshops and networking events; · EAP Employee Assistance; · Access to fitness clubs (T&C apply); · Creche facility for working parents; Apply today, and together let’s change tomorrow! #LI-RK3 Privacy Notice - Active Candidates: https://www.aptiv.com/privacy-notice-active-candidates Aptiv is an equal employment opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex, gender identity, sexual orientation, disability status, protected veteran status or any other characteristic protected by law.

Job Description and Requirements : Education B.E./B.Tech/ME/M.Tech Electronics and Communication Experience 3-8 years’ experience in the verification domain Deep protocol insight in NVMe, DDR4/5, DIMMs, HBM2/3 protocol Hands on experience of developing complex protocols verification components with System Verilog, Verilog and OVM/UVM methodology; C/C++ knowhow is plus Good knowledge of simulation and/or emulation technologies with proven triage skills Well versed with new product deployment challenges at customers across geographies Scripting skills Job responsibilities Successfully deploy emerging protocol standards solutions for simulation and emulation platforms. Publishing success stories on each successful deployment. Periodic protocol spec upgrade and latest product offering training to field AEs for scalability in deployments Tracking protocol evolution in standards org meetings and bringing that insight to marketing, engineering, and application engineering teams Technical publications in standards conferences, DVCon, DAC, SNUG for promoting Synopsys solutions visibility. Validates field of use by expert testing for leading edge solution prior early adopter releases and effective reviewer of user APIs, test plans Ensure solutions collateral readiness by contributing/reviewing datasheets, feature specific pdfs and user guides step locked to latest release offerings Help drive product direction and product roadmap based on customers’ requirements and market size and adoption assessment. Own setting up right priorities based on business requirements Should be able to travel international and domestic

Design Verification Engineer_Full-Time_Bangalore(Hybrid) Hi, Greetings from Best Infosystems Ltd.! We've spotted your impressive profile and have an exciting opportunity tailored to your skills and passions. Job Title: Design Verification Engineer Job Type: Full-Time Location: Bangalore (Hybrid) Experience: 8+ years Job Description: About the role: We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions. Responsibilities: • Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems • Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards • Collaborate with software teams to define and implement configurable test benches • Work with design teams test plans, failure debug, coverage, etc. Qualifications and Preferred Skills: • BS, MS in Electrical Engineering, Computer Engineering or Computer Science • 8+ years and current hands-on experience in block-level/IP-level/SoC-level verification • Proficiency in Verilog, SystemVerilog • Familiarity with industry-standard EDA tools for simulation and debug • Deep experience with UVM-based test benches • Experience with modern programming languages like Python • Knowledge of Arm AMBA protocols such as AXI, APB, and AHB • Understanding of Arm CHI protocol is a plus • Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCs • Experience with formal verification techniques, emulation platforms is a plus • Excellent problem-solving skills and attention to detail • Strong communication and collaboration skills

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NA Minimum 3 Year(s) Of Experience Is Required Educational Qualification : 15 years full time education Summary: As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to address challenges, ensuring the quality of the code, and contributing to the overall success of the projects you are involved in. You will also participate in maintenance and enhancement activities, ensuring that the applications remain robust and efficient. Roles & Responsibilities: - Expected to perform independently and become an SME. - Required active participation/contribution in team discussions. - Contribute in providing solutions to work related problems. - Collaborate with cross-functional teams to gather requirements and provide technical insights. - Conduct code reviews to ensure adherence to best practices and coding standards. Professional & Technical Skills: - Must To Have Skills: Proficiency in Emulation. - Strong understanding of software development life cycle methodologies. - Experience with debugging and troubleshooting complex software issues. - Familiarity with version control systems such as Git. - Ability to write efficient and maintainable code. Additional Information: - The candidate should have minimum 3 years of experience in Emulation. - This position is based at our Bengaluru office. - A 15 years full time education is required., 15 years full time education

Job requisition ID :: 85879 Date: Jul 26, 2025 Location: Pune Designation: Senior Consultant Entity: Deloitte India LLP Y our potential, unleashed. India’s impact on the global economy has increased at an exponential rate and Deloitte presents an opportunity to unleash and realize your potential amongst cutting edge leaders, and organizations shaping the future of the region, and indeed, the world beyond. At Deloitte, your whole self to work, every day. Combine that with our drive to propel with purpose and you have the perfect playground to collaborate, innovate, grow, and make an impact that matters. The Team Deloitte’s Technology & Transformation practice can help you uncover and unlock the value buried deep inside vast amounts of data. Our global network provides strategic guidance and implementation services to help companies manage data from disparate sources and convert it into accurate, actionable information that can support fact-driven decision-making and generate an insight-driven advantage. Our practice addresses the continuum of opportunities in business intelligence & visualization, data management, performance management and next-generation analytics and technologies, including big data, cloud, cognitive and machine learning. Your work profile: As a Analyst/Consultant/Senior Consultant in our T&T Team you’ll build and nurture positive working relationships with teams and clients with the intention to exceed client expectations: - Key Responsibilities: Design and maintain robust, scalable, cross-browser test automation frameworks using Playwright (TypeScript/JavaScript) Develop reusable libraries, utilities, and page object models to streamline test script creation. Lead test automation strategy, code reviews, and mentor junior automation engineers. Good knowledge and experience in designing and developing automated test scripts using Rest Assured for validating APIs and microservices. * Collaborate with product, development, and DevOps teams to integrate tests into **CI/CD pipelines Perform test optimization for parallel execution, reporting, and visual regression (e.g., Playwright Test Trace Viewer). Enable test analytics and maintain dashboards to track automation coverage and quality KPIs. Create and maintain mocks, stubs, and fixtures to enable independent test runs. Required Skills: 5+ years of core automation experience using Playwright in enterprise-grade applications. Strong command of TypeScript/JavaScript and modern automation design patterns. Deep understanding of Playwright's capabilities — including API testing, mobile emulation, parallel execution, and test retries. Experience with Playwright Test Runner or integrating Playwright with tools like Jest, Mocha, or Cucumber. Hands-on experience with test reporting tools like Allure, HTML reports, or custom dashboards. Solid experience with CI/CD tools like Jenkins, GitHub Actions, or Azure DevOps. Preferred Skills: * Familiarity with **Playwright for Python or .NET** (if cross-language work is required). * Experience with **visual testing**, **accessibility checks**, or **performance hooks** via Playwright. * Good understanding of **test architecture in microservices** and **API-first environments**. * Working knowledge of cloud testing platforms like **BrowserStack** or **LambdaTest**. Education: Bachelor’s or Master’s in Computer Science, Information Technology, or a related field. Location and way of working: Base location: Pune Hybrid is our default way of working. Each domain has customized the hybrid approach to their unique needs. How you’ll grow Connect for impact Our exceptional team of professionals across the globe are solving some of the world’s most complex business problems, as well as directly supporting our communities, the planet, and each other. Know more in our Global Impact Report and our India Impact Report. Empower to lead You can be a leader irrespective of your career level. Our colleagues are characterised by their ability to inspire, support, and provide opportunities for people to deliver their best and grow both as professionals and human beings. Know more about Deloitte and our One Young World partnership. Inclusion for all At Deloitte, people are valued and respected for who they are and are trusted to add value to their clients, teams and communities in a way that reflects their own unique capabilities. Know more about everyday steps that you can take to be more inclusive. At Deloitte, we believe in the unique skills, attitude and potential each and every one of us brings to the table to make an impact that matters. Drive your career At Deloitte, you are encouraged to take ownership of your career. We recognise there is no one size fits all career path, and global, cross-business mobility and up / re-skilling are all within the range of possibilities to shape a unique and fulfilling career. Know more about Life at Deloitte. Everyone’s welcome… entrust your happiness to us Our workspaces and initiatives are geared towards your 360-degree happiness. This includes specific needs you may have in terms of accessibility, flexibility, safety and security, and caregiving. Here’s a glimpse of things that are in store for you. Interview tips We want job seekers exploring opportunities at Deloitte to feel prepared, confident and comfortable. To help you with your interview, we suggest that you do your research, know some background about the organisation and the business area you’re applying to. Check out recruiting tips from Deloitte professionals.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Qualcomm is hiring strong DV engineers to verify high performance and low power CPUs in Bangalore. Please forward your profiles if you meet the requirement. Roles and Responsibilities Responsible for power management verification includes Boot, Reset, clock gating, power gating, Voltage/frequency management, limit management and throttling. Work closely with design/verification teams within CPU to develop comprehensive test plan. Use simulation and formal verification methodologies to execute test plans. Write checkers, assertions and develop stimulus. Verify power intent through use of methodologies like UPF. Work closely with system architects, software teams and Soc team to validate system use cases. Work closely with emulation team to enable verification on emulators and FPGA platforms. Debug and triage failures in simulation, emulation and/or Silicon. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. BE/BTech degree in CS/EE with 3+ years’ experience. Experience in power management verification. Implementation of assembly and C language embedded firmware. Experience in C/C++, scripting languages, Verilog/system Verilog. Strong understanding of power management features in CPUs and CPU based Socs. Experience in verification of power management features such as clock gating, power gating, UPF, DVFS/DCVS, reliability, throttling etc. Preferred Requirements Good Understanding of CPU architectures and CPU micro-architectures. In-depth knowledge of digital logic design, micro-processor, debug feature, and DFT architecture and microarchitecture Experience with advanced verification techniques such as formal and assertions is a plus Knowledge and verification experience in DFT and structural debug concepts and methodologies: JTAG, IEEE1500, MBIST, scan dump, memory dump is a plus Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073352

Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this role, you'll report to a Hardware Engineering Manager. This position will require the ability to work some hours that align with the team in the Pacific Daylight Time (PDT) zone on an as needed basis. You Will Establish a good understanding of chip's architecture, intended functionality and IPs Collaborate with verification and emulation teams in the pre-silicon phase, and create post-silicon test plans Perform functional and performance validation to to make sure the chip meets expectations Develop and execute stress test and PVT corner characterization to ensure robustness Effectively debug failures encountered during testing Develop automation for test execution, data post-process and reporting You Have Bachelor's degree in Electrical Engineering or Computer Engineering 3+ years of hands-on experience in silicon validation and bring-up of complex ASIC Demonstrated experience in at least one of the following areas, with a proven ability to apply that knowledge to silicon validation: IC design, verification, emulation, sw/fw development Experience in design or validation of at least one of the following subsystems: DDR, high-speed SerDes, Ethernet, CPU, GPU, NoC Proficiency in at least one of the programming or scripting languages: C/C++, System Verilog, Python Proficiency in lab equipment and debug tools, such as oscilloscope, protocol analyzer, JTAG debugger, etc We Prefer Experience with peripheral interfaces and protocols, such as I2C, SPI, UART, JTAG Familiarity with automotive standards and test methodologies Experience in developing and utilizing automated test scripts and frameworks for validation efficiency. Exposure to pre-silicon verification methodologies and the ability to ability to correlate with post-silicon results Experience in electrical validation and compliance test for IO interfaces The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹3,200,000—₹3,870,000 INR

Job Description In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity. Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. How You Will Contribute And What You Will Learn Test and validate optical network planning tools (e.g., for DWDM, OTN, ROADM, GMPLS, etc.) for accuracy, performance, and reliability. Develop and execute detailed test plans, test cases, and test scripts based on functional and technical specifications. Perform functional, regression, integration, and system testing on new and existing software modules. Simulate and validate real-world network scenarios using the planning tool. Identify, report, and track software defects using bug tracking tools (e.g., JIRA, Bugzilla). Collaborate with developers, network engineers, and product managers to troubleshoot issues and refine tool performance. Provide feedback on usability, interface design, and overall product behavior. Maintain test documentation and contribute to continuous improvement of QA processes. Key Skills And Experience Bachelor’s degree in Telecommunications, Electrical Engineering, Computer Science, or a related field. 0-2 years of experience in telecom/optical network testing or QA. Strong understanding of optical networking concepts such as DWDM, SDH/SONET, OTN, Ethernet, ROADM, and fiber topologies. Hands-on experience with optical network planning/design tools Familiarity with Layer 0/1/2 network topologies and traffic engineering principles. Experience with test management and defect tracking tools (e.g., JIRA, TestRail). Knowledge of scripting languages (Python, Selenium, Rest API) for automation is a plus. Strong analytical and problem-solving skills. Knowledge of network inventory and service provisioning tools. Familiarity with ITU-T, MEF, and IEEE telecom standards. Experience with network simulation/emulation environments. Exposure to agile development and DevOps practices. Understanding of network performance metrics and KPIs. About Us Come create the technology that helps the world act together Nokia is committed to innovation and technology leadership across mobile, fixed and cloud networks. Your career here will have a positive impact on people’s lives and will help us build the capabilities needed for a more productive, sustainable, and inclusive world. We challenge ourselves to create an inclusive way of working where we are open to new ideas, empowered to take risks and fearless to bring our authentic selves to work What we offer Nokia offers continuous learning opportunities, well-being programs to support you mentally and physically, opportunities to join and get supported by employee resource groups, mentoring programs and highly diverse teams with an inclusive culture where people thrive and are empowered. Nokia is committed to inclusion and is an equal opportunity employer Nokia has received the following recognitions for its commitment to inclusion & equality: One of the World’s Most Ethical Companies by Ethisphere Gender-Equality Index by Bloomberg Workplace Pride Global Benchmark At Nokia, we act inclusively and respect the uniqueness of people. Nokia’s employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect. Join us and be part of a company where you will feel included and empowered to succeed.

Job Description Job Summary We are seeking a Principal Verification Engineer to lead the functional verification of complex SoCs and IP blocks for next-generation high-performance computing (HPC), AI acceleration, and data center products. The ideal candidate will have deep experience in SoC/IP functional verification , UVM/SystemVerilog , and coverage-driven methodologies , with a strong focus on ensuring first-pass silicon success. In this leadership role, you will drive end-to-end verification strategy , collaborate cross-functionally with architecture and design teams, and influence product definition through early design engagement. Experience in Virtual Modeling, SystemC, and TLM is a strong plus , enabling advanced verification flows and early software co-development. Key Responsibilities Verification Planning & Execution Own the definition and implementation of IP and SoC-level verification plans , including test strategy, coverage goals, and schedule. Develop UVM/SystemVerilog-based testbenches for complex IP and SoC subsystems, focusing on scalability, reuse, and maintainability. Lead coverage closure activities, including functional, code, and formal coverage, to ensure comprehensive verification. Cross-Functional Collaboration Work closely with RTL designers, architects, firmware/software teams , and post-silicon validation to align on requirements and drive co-verification strategies. Participate in architecture and microarchitecture reviews , providing verification insights and influencing design for testability and verification efficiency. Debug & Root Cause Analysis Perform advanced debug and root cause analysis of complex functional issues, collaborating with cross-disciplinary teams to drive resolutions. Utilize industry-standard tools for waveform analysis, simulation debug, and emulation/prototyping platforms . Methodology & Process Improvement Define and drive best practices in verification methodology , including constrained-random testing, assertion-based verification, and coverage-driven approaches. Contribute to automation and regression flows , optimizing for quality and turnaround time. Technical Leadership & Mentorship Mentor junior verification engineers, guide technical reviews, and contribute to team development and growth. Champion a culture of technical excellence, innovation, and continuous improvement . Qualifications Required Qualifications Education & Experience B.S./M.S. in Electrical Engineering, Computer Engineering, or related discipline. 10+ years of hands-on experience in IP and/or SoC verification with a track record of successful silicon products. Technical Expertise Proven expertise in UVM/SystemVerilog for developing scalable, reusable verification environments. Strong understanding of complex SoC designs , including memory controllers (DDR5, HBM3), PCIe, CXL , and high-speed interfaces. Experience with coverage-driven verification and closure techniques (functional, code, assertion coverage). Solid background in debugging RTL issues , simulation-based testing, and interaction with emulation/FPGA prototyping teams. Verification Tools & Languages Proficient in simulation tools (VCS, Questa, Xcelium), waveform viewers , and scripting languages ( Python, Perl, TCL ) for automation. Familiarity with formal verification tools and techniques is a plus. Additional Information Preferred/Additional Skills Virtual Modeling and System-Level Verification Experience with SystemC and Transaction-Level Modeling (TLM) for creating virtual platforms and enabling early software/hardware co-verification. Knowledge of Virtual Prototype (VP) development for system-level validation and performance modeling. Pre-silicon Software Co-verification Exposure to software-hardware integration , including early firmware/driver bring-up on virtual or emulated environments. Low-Power Verification Familiarity with power-aware verification methodologies (UPF/CPF) and power intent validation. Leadership in Verification Strategy Experience driving complex multi-IP and SoC-level verification efforts, including coordination with global teams. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Job title Principal Verification Engineer – SoC/IP Design & Verification Department Manufacturing Location Hyderabad Remote No Requisition ID 20020170_2025-07-03