Key Responsibilities Develop, integrate, and debug embedded software using C/C++ on custom SoC platforms. Validate multi-IP SoC designs including controller-level and protocol-level validation. Work closely with hardware and software teams to ensure robust hardware/software integration. Perform hands-on lab bring-up and debug using tools like oscilloscopes, logic analyzers, JTAG, Lauterbach, etc. Script automation and regression suites for validation using Python, Shell, or Perl. Work on system-level performance tuning, profiling, and optimization. Understand and implement protocols like AMBA (AXI, AHB, APB), USB, PCIe, and NVMe. Participate in board bring-up, driver development, and integration testing. Required Skills & Experience Bachelors degree in Electronics, Computer Science, or related field. 5+ years of industry experience in embedded systems and/or SoC validation. Proficiency in C/C++ and scripting (Python/Shell/Perl). Solid understanding of AMBA bus protocols AXI, AHB, APB. Experience in SoC validation with multi-IP environments and protocol-level testing. Strong debugging skills and hands-on experience with lab tools. Experience with RTOS, bootloaders, Linux device drivers, and hardware abstraction layers. Good knowledge of ARM architecture and modern memory subsystems. Preferred Qualifications Exposure to security protocols and controller validation (e.g., UFS, NVMe, USB). Familiarity with emulators, waveform-based debug environments. Experience with performance analysis and system-level optimization. Exposure to DRAM validation, system BIOS, and ARM/x86 assembly.
Roles & Responsibilities: Be part of a team to verify or emulate/prototype complex system on a chip designs. Interact with design engineers to identify important verification scenarios. RTL Design / porting of ASIC RTL targeting FPGA prototyping and emulation platforms, such as Synopsys ZEBU, Cadence Palladium or Siemens Veloce Synthesis, PNR and timing analysis of RTL on industry standard prototyping and emulation platforms Qualification, Experience & Skills desired: Bachelor's degree in Electrical/Electronics Engineering with 5+ years of relevant experience, or masters degree in Electrical Engineering Skilled in FPGA design techniques, RTL Design, tools and processes. Minimum 5 years and above experience in digital design/verification, emulation/ FPGA prototyping and system validation. Verilog/SystemVerilog based verification experience at Subsystem and Full chip level. Experienced in transactor-based verification. Verification methodology like UVM/OVM knowhow is a plus. Knowledge of RTL language (e.g., VHDL, Verilog), in-circuit emulation, simulation acceleration and FPGA prototyping. Familiar with emulation/prototyping tools and methodologies. Real experience of mapping complex SOC design into multi-FPGA platforms/emulators and hands on experience with Synopsys ZEBU, Cadence Palladium, Siemens Veloce or HAPS A proven track record with emulation-based verification methodologies including ownership of a suitably complex emulation workflow environment. Well versed in model building for prototyping or emulation. Experience with STA/timing closure, wrapper creation, HDL simulation, synthesis, and memory modelling for prototyping/emulation. Working knowledge of Perl, Python & Shell scripts is a plus Experience with digital systems based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols. Experience with SOC boot flow, writing basic test cases, clocking and platform bring up in Emulators or Silicon desired Interested in and passionate about staying updated with tech trends. Excellent verbal and written communication skills to communicate issues, impact and corrective action.
Role & responsibilities Be part of a team to verify complex system on a chip designs. Interact with design engineers to identify important verification scenarios. Create and enhance constrained-random verification environments using UVM/ SystemVerilog Create complex C/SV tests using reusable test libs. Team player and a mentor who is self-driven, motivated and guides a team of junior engineers Responsible for quality and timeliness of the team output Preferred candidate profile Bachelor's/ master's degree in electrical engineering or computer science, with 5-10 years of relevant experience. Experience with digital system based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols. Experience with System Verilog Assertions with industry standard tools a plus Experience with SOC boot flow, clocking and platform bring up in Emulators or Silicon desired Experience with Low Power Verification and power management flows. Experience with RTL, GLS level simulations Knowledge and Experience working on PCIE/Ethernet and other HSIO desired Experience in UVM/OVM based Methodology Development.
Position: DFT Engineer Experience: 5+ years Location: Bangalore, India Company: Mettlesemi Systems and Technologies Pvt Ltd Job Type: Full-Time We are seeking a skilled Design-for-Test (DFT) Engineer to join our silicon design team for a high-impact engagement with a prestigious global client. The ideal candidate will have strong expertise in SoC-level DFT architecture, ATPG, MBIST, and scan-based methodologies, contributing to the design and validation of high-performance, testable, and reliable silicon. About Us Mettlesemi Systems and Technologies Pvt. Ltd. is a Bangalore-based deep-tech company driving innovation across three key verticals: Custom Silicon Solutions & Embedded Systems Design Secure Hardware Products for Authentication and Cybersecurity Ultra-Low-Latency FPGA Systems for FinTech and Critical Infrastructure Our expertise spans the entire silicon lifecyclefrom RTL design, DFT insertion, and SoC validation to ASIC prototypingpositioning us as a trusted partner to leading global semiconductor clients. This opportunity falls under our Silicon Solutions and Services vertical, with a focus on DFT architecture and implementation for complex SoCs. Key Responsibilities Develop and implement Design-for-Test (DFT) architectures for complex SoC designs. Drive scan insertion, boundary scan, compression, and memory BIST (MBIST) strategies. Generate and analyze ATPG test patterns and optimize for coverage and performance. Collaborate with RTL, synthesis, and physical design teams to ensure DFT rule compliance and timing closure. Participate in DFT verification, debug, and post-silicon bring-up. Develop and maintain scripting automation for DFT flow optimization (Python, Tcl, Perl, or Shell). Interface with ATE teams for pattern validation and production test support. Contribute to continuous improvement of DFT methodologies and workflows. Required Skills & Experience Bachelors or masters degree in electrical, electronics, or computer science engineering. 5+ years of experience in DFT design and implementation for ASIC or SoC projects. Proven expertise in scan insertion, scan compression, MBIST, and boundary scan (JTAG). Hands-on experience with ATPG tools such as Mentor Tessent or equivalent. Strong understanding of DFT verification flows, static timing analysis (STA), and design closure. Proficiency in scripting languages (Python, Perl, Tcl, or Shell). Familiarity with RTL coding (Verilog/SystemVerilog) and synthesis flows. Strong analytical, debugging, and cross-functional collaboration skills. Preferred Qualifications Experience with multi-vendor DFT tools and flows (Synopsys, Cadence, Siemens EDA). Exposure to post-silicon DFT bring-up and failure debug. Knowledge of UVM verification methodology and gate-level simulation. Experience working with ATE (Automatic Test Equipment) and production test flows. Strong problem-solving mindset with a focus on DFT quality and test coverage optimization. Why Join Mettlesemi Work on cutting-edge silicon design and DFT technologies for global semiconductor clients. Opportunity to own end-to-end DFT development across IP and SoC levels. Collaborative, innovation-driven environment focused on technical excellence. End-to-end visibility into silicon product design, validation, and test. Competitive compensation and benefits package. To Apply: Submit your resume and a brief cover note highlighting your DFT experience to careers@mettlesemi.com Subject: Application for DFT Engineer 5+ Years Join a deep-tech company where your work enables better test coverage, faster bring-up, and more reliable silicon. #DFT #SoCDesign #ASICDesign #ATPG #MBIST #ScanCompression #SemiconductorJobs #HardwareEngineering #ChipDesign #VLSIDesign #Mettlesemi #BangaloreJobs #HiringNow #CareersInTech
Position: RTL IP Design Engineer Experience: 5+ years Location: Bangalore, India Company: Mettlesemi Systems and Technologies Pvt Ltd Job Type: Full-Time We are looking for an RTL IP Design Engineer to join our silicon design team for a high-impact engagement with a prestigious global client. The ideal candidate will have deep expertise in digital IP and subsystem design, with a passion for developing high-quality, reusable, and power/performance-optimized IP blocks that form the building blocks of complex SoCs. About Us Mettlesemi Systems and Technologies Pvt. Ltd. is a Bangalore-based deep-tech company driving innovation across three key verticals: 1.Custom Silicon Solutions & Embedded Systems Design 2.Secure Hardware Products for Authentication and Cybersecurity 3.Ultra-Low-Latency FPGA Systems for FinTech and Critical Infrastructure Our expertise spans the entire silicon lifecyclefrom RTL design to SoC validation and ASIC prototypingpositioning us as a trusted partner to leading global semiconductor clients. This opportunity falls under our Silicon Solutions and Services vertical, with a core focus on RTL IP Design and Development. Key Responsibilities Design and develop synthesizable RTL IPs and digital subsystems for SoCs using Verilog/SystemVerilog. Collaborate with architects to define microarchitecture specifications and interface protocols (AMBA, AXI, AHB, APB, etc.). Ensure reusability, scalability, and configurability of IPs for integration across multiple SoC platforms. Conduct functional simulation, debug, and performance analysis to ensure design quality and compliance with specifications. Perform RTL quality checks including Lint, CDC, and RDC; work closely with synthesis and physical design teams for timing closure. Partner with the verification team to define test plans and achieve full functional coverage. Contribute to integration of IPs into SoC environments and support pre-silicon and post-silicon validation activities. Develop and maintain automation scripts (Python/Perl/Tcl) to streamline design workflows. Required Skills & Experience Bachelors or masters degree in electrical engineering, computer science engineering, or a related field. 5+ years of experience in RTL IP and subsystem design, microarchitecture development, and SoC-level integration. Strong proficiency in Verilog/SystemVerilog and digital design fundamentals. Experience with RTL quality flows (Lint, CDC, RDC, synthesis, STA). Solid understanding of clocking, reset, power, and low-power design techniques. Experience designing IPs for AMBA-based interconnects or other standard interfaces. Excellent analytical, debugging, and problem-solving skills. Preferred Qualifications Experience with ARM-based SoCs or custom IP design for ASIC/FPGA implementations. Familiarity with verification methodologies, scripting (Python, Perl, Tcl), and automation frameworks. Exposure to integration and verification of third-party IPs. Why Join Mettlesemi Work on cutting-edge SoC and IP design for global semiconductor clients. Opportunity to own IP blocks that power next-generation silicon platforms. Collaborative, innovation-driven work culture. End-to-end visibility from RTL design to system integration. Competitive compensation and growth opportunities. To Apply: Interested candidates are invited to submit their resume with cover note detailing their relevant experience and interest in the role to careers@mettlesemi.com #RTLDesign #IPDesign #SoCDesign #ASICDesign #SystemVerilog #Verilog #Microarchitecture #HardwareEngineering #SemiconductorJobs #ChipDesign #VLSIDesign #Mettlesemi #BangaloreJobs #HiringNow #CareersInTech #HardwareJobs
PCB Layout Engineer Role Description As a Substrate and PCB Layout Engineer, you will participate in the definition, design, and implementation of substrate and PCB boards for cutting-edge products. You will contribute across all phases of the products design, including placement, routing, constraint table management, and drafting. This role requires a combination of PCB/substrate design, assembly, test, and fabrication knowledge, along with cross-functional collaboration and demonstrable experience in design processes. You will be responsible for delivering high-quality designs that meet performance, manufacturability, and reliability requirements. Key Responsibilities Collaborate with the Electrical Engineering hardware team to provide PCB board design services. Work closely with fabrication vendors to provide design data and meet fabrication requirements. Interface with assembly vendors to ensure assembly design requirements are met. Deliver best-in-class Substrate/PCB designs suitable for high-volume manufacturing. Assist in schematic and PCB component footprint development as required. Utilize the companys PLM system to write and release Engineering Change Orders (ECOs). Basic Qualifications Bachelors degree in electrical engineering or a related field. 7+ years of PCB layout design experience. 7+ years of hands-on experience with Cadence Allegro PCB Design/CIS . 7+ years of experience with Cadence SIP and APD tools. Strong experience with high-speed and impedance-controlled circuits. Experience with compact, dual-side assembly design. 5+ years of part footprint creation for CIS and Allegro. Experience with HDI and ELIC PCB design . Experience with BGA pitch 0.4mm . Knowledge of ETS cored and coreless substrate stackup and layout . 3+ years of developing and documenting engineering processes related to ECAD tools and design activities. Preferred Qualifications Masters degree in electrical engineering or related field. 10+ years of PCB layout design experience. Extensive experience with Cadence APD, SIP, and Allegro PCB Design/CIS. Proven ability to design and manage all aspects of printed board design. Strong collaboration and communication skills across cross-functional teams and external customers. Ability to minimize fabrication, assembly, and test risks through early design interventions. Proficiency in Allegro scripting or Cadence Skill programming. Experience in automating ECAD workflows and design processes. Apply Now: Send your CV to careers@mettlesemi.com
FPGA / RTL Design Engineer Location: Bangalore Experience: 6+ years Role Description As an FPGA/RTL Design Engineer, you will be responsible for developing RTL modules, FPGA-based systems, and testbenches for verification and validation. This role involves complete ownership from design specification to FPGA implementation, timing closure, and board-level bring-up. You will collaborate closely with ASIC, Firmware, and Validation teams to ensure seamless hardwaresoftware integration and high-quality product delivery. You will also be involved in system-level design, low-power architecture verification, and FPGA prototyping to support pre-silicon validation and embedded firmware development. Key Responsibilities Understand system requirements and generate system and RTL design documents. Develop RTL modules and verification testbenches for subsystems and RTL blocks. Implement FPGA design, timing closure, and board-level testing. Deliver test specification documents and define test objectives. Collaborate with cross-functional teams including ASIC, Firmware, and Validation. Lead FPGA lab bring-up and debugging using tools such as JTAG, UART, and logic analyzers. Support hardware-software co-design for pre-silicon validation and firmware integration. Contribute to emulation and FPGA prototyping system design to enhance verification efficiency. Run and debug Conformal Low Power (CLP) checks at various design stages (RTL vs UPF, Gate-level vs UPF). Identify and resolve power intent mismatches, isolation/retention cell errors, and low-power design issues. Collaborate with design, synthesis, and physical design teams for low-power sign-off verification. Basic Qualifications B.Tech. in Electronics, Electrical, or Computer Science Engineering. Minimum 8 years of experience in FPGA/RTL and test-bench/embedded systems architecture. Proven experience in FPGA system design from IP integration to implementation. Strong skills in Verilog RTL design and Verilog/SystemVerilog testbench development. Experience with AMD Vivado, Vitis SDK, and Vitis AI tools. Proficiency in C/C++ for embedded firmware and Python scripting for automation. Experience with Petalinux build flow, U-Boot, Linux driver modifications, and FPGA SoC debugging. Hands-on experience with Conformal Low Power (CLP) and Fusion Compiler. Multi-disciplinary experience including Firmware, Hardware, and ASIC/FPGA design. Preferred Qualifications Knowledge of FPGA chip-to-chip interfacing and AMD FPGA architecture. Familiarity with PCIe Gen4/5/6 technologies. Experience with storage systems, protocols, and NAND flash. Strong understanding of low-power design conceptspower domains, isolation, retention, level shifters, power gating, etc. Proven ability to work as part of a global, cross-functional team. Skills Strong understanding of low-power architecture and power intent verification. Ability to develop a system-level view for complex embedded systems. Excellent analytical, debugging, and problem-solving skills. Strong interpersonal and collaboration skills. Positive "can-do" attitude and self-motivated mindset. Apply Now: Send your CV to careers@mettlesemi.com
Position: FPGA Prototyping HAPS Lead Job Type: Full-Time| Experience: 8+ years | Location: Bangalore, India Company: Mettlesemi Systems and Technologies Pvt Ltd Role Description We are looking for an experienced FPGA Prototyping Lead (HAPS) to drive end-to-end FPGA-based SoC prototyping, system validation, and emulation initiatives for a prestigious global client. The ideal candidate will bring deep expertise in Synopsys HAPS and other leading prototyping platforms, combining strong hands-on technical skills with the ability to architect, lead, and deliver scalable FPGA prototyping solutions for complex SoCs. This is a lead-level technical role for an engineer who thrives at the intersection of design, verification, and hardware realization owning the complete FPGA prototyping lifecycle from RTL to bring-up. About Us Mettlesemi Systems and Technologies Pvt. Ltd. is a Bangalore-based deep-tech company driving innovation across three key verticals: Custom Silicon Solutions & Embedded Systems Design Secure Hardware Products for Authentication and Cybersecurity Ultra-Low-Latency FPGA Systems for FinTech and Critical Infrastructure Our silicon design expertise spans the entire lifecyclefrom RTL IP and SoC design to validation, DFT, and FPGA prototypingpositioning us as a trusted partner to leading global semiconductor clients. This opportunity falls under our Silicon Solutions and Services vertical, with a focus on FPGA-based SoC prototyping using Synopsys HAPS and related platforms. Key Responsibilities Lead FPGA-based prototyping and validation of complex SoC designs using Synopsys HAPS or equivalent platforms (e.g., Cadence Protium, Veloce proFPGA). Architect and implement scalable prototyping solutions, including partitioning, clocking, and interconnect design across multiple FPGAs. Oversee the complete FPGA flowfrom RTL integration, synthesis, and PnR to bitstream generation and bring-up. Drive platform bring-up, debug, and functional validation to achieve target performance and throughput. Collaborate with architecture, design, and verification teams to adapt ASIC RTL for FPGA and enable early software and system validation. Develop and maintain automation scripts (Python, Perl, Tcl, Makefile) to streamline synthesis, mapping, and build flows. Troubleshoot and resolve timing, capacity, and performance bottlenecks in multi-FPGA environments. Define and enhance methodologies, infrastructure, and debug frameworks to improve scalability and turnaround time. Mentor and guide a team of FPGA engineers, promoting best practices and technical rigor. Interface with customers and internal stakeholders to define prototyping strategy, track milestones, and ensure delivery quality. Required Skills & Experience Bachelors or Masters degree in Electrical, Electronics, or Computer Engineering. 8+ years of experience in FPGA-based prototyping, emulation, or SoC validation, with at least 3 years on Synopsys HAPS platforms. Proficiency in FPGA synthesis, place & route, and timing optimization (Xilinx Vivado or equivalent). Hands-on experience in RTL design and adaptation (Verilog/SystemVerilog) for FPGA targets. Strong understanding of computer architecture, ARM subsystems, and AMBA protocols (AXI, AHB, APB). Experience debugging functional, timing, and connectivity issues using FPGA debug tools (e.g., Synopsys Identify, Vivado ILA). Proficiency in scripting languages (Python, Perl, Tcl, Makefile) for build automation. Experience with interface protocols such as USB, Ethernet, PCIe, MIPI, and DDR. Excellent problem-solving, debugging, and leadership skills. Preferred Qualifications Experience with multi-FPGA partitioning and high-speed interconnects in large SoC environments. Familiarity with hybrid emulation, in-circuit emulation (ICE), or software co-validation. Understanding of transactor-based verification and integration with UVM-based testbenches. Exposure to pre-silicon validation, performance tuning, and system-level bring-up. Proven ability to lead cross-functional teams and manage complex deliverables. Why Join Mettlesemi Lead state-of-the-art FPGA prototyping initiatives for global semiconductor clients. Own the architecture, implementation, and delivery of advanced HAPS-based SoC prototypes. Collaborate in a deep-tech environment with visibility into end-to-end silicon development. Opportunity to mentor and grow a high-performance FPGA team. Competitive compensation and strong growth opportunities. Apply Now: Send your CV to careers@mettlesemi.com Subject: Application for FPGA Prototyping HAPS Lead 8+ Years
Mettlesemi Systems and Technologies Pvt. Ltd. Job Title: Emulation Engineer Qualification, Experience & Skills desired: Bachelor's degree in Electronics/Electrical/Computer Engineering with 5+ years of relevant experience in SoC emulation and model building . Strong hands-on experience in SoC emulation flow, model creation, library setup, and environment bring-up. Proven experience in emulation model building , including design partitioning, compilation, and integration of subsystems for full-chip emulation. Proficiency in RTL (Verilog/System Verilog) and synthesis for emulation platforms such as Cadence Palladium, Synopsys ZeBu, or Siemens Veloce. Experience in testbench integration using UVM/OVM and transactor-based environments. Exposure to SoC architecture , AMBA bus protocols (AXI/AHB/APB) , memory interfaces, and clock/reset management in emulation environments. Expertise in debugging emulation failures , waveform analysis, and emulator bring-up support. Working knowledge of automation scripting using Perl, Python, or Shell for model-building and regression automation. Familiarity with firmware-based validation, emulator performance analysis, and SoC boot flow testing. Excellent analytical, problem-solving, and communication skills. Roles & Responsibilities: Build and configure emulation models for complex SoC designs including model partitioning, compilation, and integration. Develop and maintain automation scripts for model build, configuration management, and regression flow. Perform RTL synthesis and emulation environment bring-up , ensuring design correctness and stability. Collaborate with RTL design and verification teams to define emulation test cases and transactor connections. Support pre-silicon validation using emulation-based infrastructure and firmware-driven tests. Debug hardware/software interaction issues using emulation tools and waveform analysis. Manage emulator resources, job scheduling, and performance optimization. Document emulation flows, methodologies, and maintain consistent release processes for emulation builds. Contribute to continuous improvement of model-building automation and emulation validation methodologies. Company Overview: Mettlesemi Systems and Technologies Pvt. Ltd. is a semiconductor design and services company specializing in SoC design, validation, and emulation solutions. We focus on high-speed interface controller testing, system-level validation, and hardware/software co-development across multiple semiconductor domains. Our goal is to enable innovation through efficient design methodologies and advanced emulation technologies. Location: Bangalore, India Interested candidates can share their resume at: careers@mettlesemi.com
Business Development Manager Mettlesemi Vishwaas FIDO2 Authenticators Job Title: Business Development Manager Mettlesemi Vishwaas FIDO2 Authenticators Location: Bengaluru Experience: 35 years | Qualification: Engineering + MBA (Sales & Marketing preferred) About Mettlesemi Mettlesemi Systems and Technologies Pvt. Ltd. is a Bangalore-based technology company innovating at the intersection of electronics design, cybersecurity, and authentication. Our flagship product line, Mettlesemi Vishwaas Authenticators, delivers secure, FIDO2-based passwordless authentication for enterprises where cybersecurity, identity assurance, and data protection are mission-critical. Role Overview We are looking for a dynamic and result-oriented Outbound Sales Professional to drive enterprise sales of the Mettlesemi Vishwaas FIDO2 Authenticator. The ideal candidate will combine technical understanding with strong business acumen to generate opportunities, engage enterprise stakeholders, build strategic alliances, and take the product to market through demos, pilots, and partnerships. Key Responsibilities Sales Development & Lead Generation Identify and connect with potential enterprise clients across BFSI, healthcare, and digital sectors. Build and manage a robust sales pipeline from lead generation to closure. Conduct outbound prospecting via calls, emails, and LinkedIn outreach. Set up meetings with CXOs, IT decision-makers, and security leaders. Convert qualified leads into successful sales opportunities. Enterprise Outreach & Product Demonstration Organize and deliver compelling product demonstrations showcasing the value and enterprise-grade security of the Vishwaas Authenticator. Support enterprise product pilots and trials, enabling adoption. Understand client requirements and identify pain points to propose tailored solutions. Strategic Partnerships & Market Development Develop new business opportunities through alliances and partnerships. Conduct market research to identify trends, opportunities, and potential collaborators. Business Development Manager Mettlesemi Vishwaas FIDO2 Authenticators Work strategically to expand the partner ecosystem and market presence. Collaboration & Internal Alignment Coordinate with technical, product, and marketing teams to deliver customer-centric solutions. Contribute to go-to-market strategy refinement through market feedback and competitive insights. Support proposal writing, presentations, and RFP responses when required. Desired Candidate Profile Education: Engineering degree (ECE/EEE/CSE or equivalent) with an MBA in Sales/Marketing. Experience: 35 years in technology product sales, preferably in cybersecurity, authentication, IoT, or enterprise solutions. Proven ability to generate leads, build relationships, and close deals. Strong communication, presentation, and negotiation skills. Self-motivated, goal-driven, and comfortable engaging with senior stakeholders. Exposure to FIDO2, cybersecurity, or hardware authentication will be an advantage. Why Join Us Be part of a fast-growing technology company shaping the future of secure digital identity and access. Work on a cutting-edge Made in India hardware authentication product trusted by enterprises. Opportunity to work directly with leadership, influencing market strategy and enterprise adoption. How to Apply: Send your CV and a brief note on why youd like to be part of this journey to hr@mettlesemi.com.
Job Title: Signal and Power Integrity (SIPI) Engineer Location: Bangalore Company: Mettlesemi Systems and Technologies Pvt Ltd Employment Type: Full-time Experience Level: Mid to Senior-Level Job Description: Mettlesemi is seeking a skilled and driven Signal and Power Integrity (SIPI) Engineer to support a high-profile client in the semiconductor industry. This is a unique opportunity to contribute at the cutting edge of package and PCB co-design, optimizing high-speed interfaces and power delivery systems. You will work with industry-standard technologies such as PCIe, USB, MIPI, and LPDDR, playing a key role in enhancing system performance through advanced simulation and analysis techniques. Minimum qualifications: Bachelor's or master's degree in Electronics Engineering. 5+ years of experience in Signal and Power Integrity (SI/PI) engineering. Solid understanding of electromagnetics, transmission line theory, and crosstalk Experience with high-speed signal integrity and power delivery network (PDN) analysis. Proficiency in using industry-standard simulation tools (e.g., ADS, PowerDC, PowerSI, Sigrity, Ansys SIwave, HFSS, HSPICE). Preferred qualifications: Hands-on experience with package extraction and time/frequency domain simulations. Familiarity with system-level analysis of DDR, SerDes, and mixed-signal interfaces. Knowledge of decoupling and DC drop simulation techniques. Experience creating design guidelines for package and PCB layout. Ability to develop and automate design workflows using scripting or other automation tools. Prior experience collaborating with cross-functional teams (e.g., Layout, Systems, Design). Demonstrated ability to present technical findings to internal and external stakeholders. Roles & Responsibilities: Perform signal integrity (SI) and power integrity (PI) analysis on advanced package and PCB designs. Extract package models and conduct simulations in both time and frequency domains. Analyse and optimize interfaces such as DDR, SerDes, and high-speed serial protocols. Perform DC drop and decoupling analysis to evaluate PDN performance. Provide design feedback and develop guidelines for package and PCB teams. Collaborate with internal and client teams to define simulation requirements and deliverables. Automate analysis and documentation workflows to improve design efficiency. Create technical reports and present findings to engineering teams and clients. To apply, please email your resume to: hr@mettlesemi.com