At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Software Engineer Location: Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities & Skills The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP, MIPI, NVMe an added advantage. Education And Experience B. Tech /BE/M.Tech / ME with 3 to 6 years of relevant experience. Behavioral Skills Required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Description and Requirements "At BMC trust is not just a word - it's a way of life!" We are an award-winning, equal opportunity, culturally diverse, fun place to be. Giving back to the community drives us to be better every single day. Our work environment allows you to balance your priorities, because we know you will bring your best every day. We will champion your wins and shout them from the rooftops. Your peers will inspire, drive, support you, and make you laugh out loud! We help our customers free up time and space to become an Autonomo us Digital Enterprise that conquers the opportunities ahead - and are relentless in the pursuit of innovation! The IZOT product line includes BMC’s Intelligent Z Optimization & Transformation products, which help the world’s largest companies to monitor and manage their mainframe systems. The modernization of mainframe is the beating heart of our product line, and we achieve this goal by developing products that improve the developer experience, the mainframe integration, the speed of application development, the quality of the code and the applications’ security, while reducing operational costs and risks. We acquired several companies along the way, and we continue to grow, innovate, and perfect our solutions on an ongoing basis. We are looking for Application Security Engineer to take ownership of security testing for enterprise products deployed on mainframe environments. In this role, you will assess application-layer security risks, identify vulnerabilities in product implementations, and lead secure architecture reviews. The ideal candidate brings deep offensive security skills along with familiarity in testing applications running on or integrated with IBM mainframe systems. Primary Roles And Responsibilities Conduct penetration testing and red teaming exercises targeting mainframe environments and the surrounding application ecosystem. Perform code-assisted and black-box penetration testing against enterprise applications/systems interacting with RACF, DB2, CICS, MQ, and related subsystems. Identify risks in authentication, authorization, data handling, and communications within mainframe-integrated products. Create threat models and guide product teams in mitigating high-impact vulnerabilities early in the SDLC. Drive remediation efforts through hands-on collaboration and secure design guidance. Author technical reports and deliver executive summaries tailored to various audiences. Stay current on vulnerabilities, exploits, and testing techniques relevant to legacy enterprise technologies and mainframe ecosystems. Assess common integration patterns (SOA, REST/JSON, MQ) for security risks. To ensure you’re set up for success, you will bring the following skillset & experience: 5+ years of experience in penetration testing, with a specialization in systems/applications integrating with mainframe environments. Deep knowledge of mainframe communication protocols and security mechanisms. Demonstrated experience conducting red team-style assessments or advanced threat emulation on mainframe systems. Proficient in tools such as: Mainframe utilities: REXX, ISPF panels, NetView Security tools: Nmap, Burp Suite, Wireshark, custom scripts Strong scripting and automation skills (Python, REXX, Bash, or similar). Strong communication and leadership skills, with a proven ability to lead technical teams or projects. Experience producing board-level reports and presenting findings to senior stakeholders. Exposure to hybrid environments (mainframe to cloud integrations, modernization efforts). Familiarity with modern enterprise integration methods (REST, SOAP, MQ, FTP) that interface with mainframe services Whilst these are nice to have, our team can help you develop in the following skills: Industry certifications such as OSCP, OSCE, CRTP, GIAC GPEN, GXPN, or CISSP. Background in regulated industries such as banking, insurance, or government, where mainframes are core infrastructure. Knowledge of COBOL, PL/I, or other mainframe-centric programming languages. Experience with compliance standards like PCI-DSS, NIST, or SOX as they apply to mainframes. CA-DNP Our commitment to you! BMC’s culture is built around its people. We have 6000+ brilliant minds working together across the globe. You won’t be known just by your employee number, but for your true authentic self. BMC lets you be YOU! If after reading the above, You’re unsure if you meet the qualifications of this role but are deeply excited about BMC and this team, we still encourage you to apply! We want to attract talents from diverse backgrounds and experience to ensure we face the world together with the best ideas! BMC is committed to equal opportunity employment regardless of race, age, sex, creed, color, religion, citizenship status, sexual orientation, gender, gender expression, gender identity, national origin, disability, marital status, pregnancy, disabled veteran or status as a protected veteran. If you need a reasonable accommodation for any part of the application and hiring process, visit the accommodation request page. < Back to search results BMC Software maintains a strict policy of not requesting any form of payment in exchange for employment opportunities, upholding a fair and ethical hiring process. At BMC we believe in pay transparency and have set the midpoint of the salary band for this role at 2,117,800 INR. Actual salaries depend on a wide range of factors that are considered in making compensation decisions, including but not limited to skill sets; experience and training, licensure, and certifications; and other business and organizational needs. The salary listed is just one component of BMC's employee compensation package. Other rewards may include a variable plan and country specific benefits. We are committed to ensuring that our employees are paid fairly and equitably, and that we are transparent about our compensation practices. ( Returnship@BMC ) Had a break in your career? No worries. This role is eligible for candidates who have taken a break in their career and want to re-enter the workforce. If your expertise matches the above job, visit to https://bmcrecruit.avature.net/returnship know more and how to apply. Show more Show less

Position Senior Security Engineer - IOT Experience Job Description: 6–10 years of relevant experience in system security, embedded systems, and vulnerability assessments. Key Skills Firmware Analysis Tools: Expertise in using firmware analysis tools such as Ghidra, Binwalk, and Radare2 for static and dynamic analysis of firmware images. Embedded Linux Platforms: In-depth knowledge of embedded Linux, Yocto, and OpenWRT platforms for secure firmware and OS testing. Secure Boot & Firmware Update Mechanisms: Proficiency in testing secure boot processes and firmware update mechanisms, ensuring integrity and authenticity. OS Hardening & Security Configurations: Strong understanding of OS hardening techniques and security configurations to mitigate threats and enhance system integrity. Vulnerability Assessment & CVE Analysis: Extensive experience with vulnerability assessment frameworks and CVE analysis, identifying and addressing security vulnerabilities in embedded systems. Debugging & Emulation Tools: Proficient in using debugging tools and emulators such as QEMU to analyze embedded system behavior. SBOM & Secure Update Protocols: Familiarity with SBOM (Software Bill of Materials), patch management, and secure update protocols to ensure safe software deployments. Firmware Reverse Engineering: Expertise in performing reverse engineering of firmware images to detect vulnerabilities and potential exploits. Penetration Testing Frameworks: Experience using penetration testing frameworks like Metasploit, Kali Linux, and custom tools for system vulnerability testing. Custom Test Case Development: Ability to develop and execute custom test cases to simulate real-world attack scenarios and identify potential risks in embedded systems. Leadership & Mentoring: Strong leadership skills with a proven track record of mentoring junior engineers and guiding teams in advanced security testing methodologies. Technical Writing & Reporting: Excellent technical writing skills, including the ability to produce clear, concise, and detailed reports on security findings and risk assessments. Proactive Security Risk Mitigation: Proactive in identifying and mitigating security risks within embedded systems, ensuring the implementation of security best practices. Responsibilities Leadership in Security Testing: Lead system-level Vulnerability Assessment and Penetration Testing (VAPT) for firmware, operating systems, and embedded software, ensuring thorough security evaluations. Test Plan Development & Execution: Develop and implement comprehensive test plans for secure update and patch validation, ensuring security fixes are applied correctly and without introducing new risks. Firmware Static & Dynamic Analysis: Conduct detailed static and dynamic analysis of firmware images using tools like Ghidra, Binwalk, and Radare2 to identify potential vulnerabilities. Secure Boot & Root of Trust Validation: Validate secure boot implementations and hardware root of trust to ensure system integrity and protection from malicious code injection. OS Hardening & Access Control Testing: Test OS hardening configurations and secure access control mechanisms to strengthen system defenses against unauthorized access and exploitation. Vulnerability Identification & Classification: Identify and classify vulnerabilities and misconfigurations in embedded systems, following industry standards such as CVSS for risk assessment and remediation prioritization. Collaboration with Compliance & Engineering: Work closely with compliance and engineering teams to prioritize remediation efforts, ensuring that vulnerabilities are addressed effectively. Custom Attack Simulations: Develop and execute custom test cases to simulate real-world attack scenarios and evaluate the system's resilience against cyber threats. Rollback & Patch Management Testing: Oversee testing of rollback and patch management procedures, ensuring that system updates do not compromise security or functionality. Mentoring & Knowledge Sharing: Mentor junior engineers in security testing methodologies, sharing knowledge on advanced techniques and tools for improving system security testing processes. CVE Monitoring & Testing Updates: Monitor relevant CVE feeds, integrating new vulnerabilities and security patches into testing procedures to ensure up-to-date protection. Reporting & Risk Assessments: Provide detailed technical reports and risk assessments to stakeholders, outlining identified vulnerabilities, potential impact, and recommended mitigations. Regulatory Compliance: Ensure that all testing activities align with industry standards, including RED 18031 compliance, and adhere to relevant regulatory frameworks. Secure Lab Environment Maintenance: Maintain a secure lab environment for all system testing activities, ensuring that testing procedures are conducted in a controlled and isolated setting. Qualifications & Certifications Education: Bachelor's or Master’s degree in Cybersecurity, Embedded Systems, Computer Engineering, or a related field. Certifications (Preferred): OSCP (Offensive Security Certified Professional) OSCE (Offensive Security Certified Expert) GXPN (GIAC Exploit Researcher and Advanced Penetration Tester) Equivalent certifications in ethical hacking, penetration testing, or embedded system security are also highly valued. Industry Standards Familiarity: Familiarity with security frameworks such as ISO/IEC 62443, RED 18031, and IoT security frameworks. Why Join Us? Opportunity to work with cutting-edge automation technologies in a collaborative and innovative environment. Competitive salary and benefits package. Career growth opportunities in a fast-paced and dynamic industry. A strong focus on work-life balance and employee well-being. Location: IN-GJ-Ahmedabad, India-Ognaj (eInfochips) Time Type Full time Job Category Engineering Services Show more Show less

Description Senior Network Engineer Job Description The Senior Network Engineer would be responsible for leading, and managing the team in executing the following work: Supporting network upgrades by replacing legacy telecommunication equipment and time division multiplexing (TDM) era technology Applying networking principles to assess the type of networking equipment needed on-site to support the site’s needs. Router type, router cards, small form-factor pluggable (SFP), and power requirements will be determined utilizing site survey notes, pictures, 3D scans, and correspondence with site surveyor/design leads Design functions will include assessing what networking components are necessary, detailing and drafting designs, developing scope of work for installs, assembling part/equipment bill of material (BOM) requests, and supporting design discussions High level design and detail design for full scale complex utility grid network. Apply telecom principals to make the network solutions offered more resilient, good usage of network protocols and protection scenarios, attentions to details, utmost care of quality of all deliverables. Prepare configuration for MPLS, Switches, Routers, SONET etc. Network analysis of existing grid networks and prepare cutover package solution for channel migration from TDM to packet. Prepare Network block diagram in detail considering new installation (MPLS nodes) as per the scope, removal of old equipment, Fiber plan, channel plan, synchronization plan, circuit audits, network topology drawing, DC calculation, Panel elevation, QoS values etc. Maintain the documentation of full project lifecycle including the design revisions, change management, preliminary, construction till as build, maintain the record of transmittal of these packages with client. Seamless communication with cross functional project stakeholders, team, counterparts. Ensure project milestones are met on time through effective action planning. Qualifications Required Skills / Experience: Degree in Electrical Engineering (EE) or Electronics and Telecommunication Engineering (EXTC) 8-12 years of experience in telecommunication engineering or network engineering. Utility network experience would be an added advantage. Should have handled the upgradation projects for the utilities in design, testing or commissioning activity. Hands-on experience with reputed MPLS devices. Knowledge about implementation of QoS, Label engineering, MPLS services, PTP synchronization, circuit emulation, packet network architecture, resilient protection scenarios. Microsoft Visio, Excel, and Word Experience Strong communication skills, Experience in Teleprotection couplers in the utility grid. Knowledge of different IP Networking protocols for routing, switching. Legacy Telecommunications Technology (time division multiplexing (TDM), Synchronous optical networking (SONET), serial communication) Network Transport Technology (Dense Wavelength Division Multiplexing (DWDM), Microwave, etc.) Modern Networking Technology (Multi-Protocol Label Switching (MPLS) packet networking) – MPLS-TP & MPLS-IP. Desired Skills / Experience Technical Certification by Nokia, Cisco, or other reputable networking certification entity- would be an added advantage. Experience, certifications, or formal education in networking, computing, or electrical engineering Different amplifiers in the telecom network and its integration with transport nodes. Familiar with Firewall usage, different applications in OT networking, Familiarity with an electric utility’s supervisory control and data acquisition (SCADA) or Operational Technology (OT) Job Engineering Primary Location India-Maharashtra-Mumbai Schedule: Full-time Travel: No Req ID: 250769 Job Hire Type Experienced Not Applicable #BMI N/A Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Veloce Hycon empowers System-on-Chip (SoC) developers to achieve first-pass silicon success, streamlining the development process. It offers an outstanding hybrid solution that seamlessly integrates virtual models and user Register Transfer Level (RTL) for comprehensive pre-silicon validation. Users can rapidly boot Linux and Android on the hybrid platform to run benchmarks and critical workloads well before silicon availability and gain valuable insights into software performance and functionality, allowing for early optimization and bug detection. Users can switch from virtual to pure RTL modes on the fly, focusing on specific system components that require more accurate hardware emulation for detailed calibration. Reference platforms are part of the product that let the user get started out of box. This role is based in Hyderabad. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. Responsibilities for this role include: Develop functionally accurate SystemC/TLM software models for CPUs (ARM and RISC-V architectures) and other Hardware devices that can be used to compose Virtual Platforms. Verify the models functionality versus behavior model and/or RTL using SystemC and/or UVM/SystemVerilog and apply unit testing/debug and implement the test plan. Build Virtual Platform for Hardware designs on the System Level. Load/Boot Linux/Mentor Embedded Linux (MEL)/ Android on the Virtual Platform. Simulate and Debug Customer’s Software on the Virtual Platform Write professional Functional Specs and Design Documents. We don’t need hard workers, just super minds! Bachelor, Master, or Ph.D. degree or equivalent experience in Computer or Electrical Engineering with minimum 2-8 years of experience and Very Good with honors degree. Strong experience in C/C++ Programming and in Embedded Linux Development. We need someone with the basic knowledge of digital circuits and digital design/systems and having good background in programming using SystemC is a plus. We are looking for someone who has good experience in using Linux/Unix OS and experience in scripting/scripting languages such as Make/Tcl/Perl. Position requires well developed written and oral communication skills. Also, being able to work with tight deadlines and meet schedules. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the every day and Accelerate transformation . Show more Show less

The Host Networking team is responsible for millions of NICs in the fleet that powers all of Meta’s services and applications as well as the transport software for Meta’s Training and Inference Accelerators. This Software Engineer will be working on NICs and Transport solution addressing growing demands of the distributed fleet of accelerators for our AI workloads. Do you want to work on transport for large scale AI clusters? Do you want to develop innovative solutions to our challenges and ship them into production? This role on our host networking teams is for you! Software Engineer - Host Networking Responsibilities: Design and implement drivers (and/or Firmware) for (network) ethernet adapter functions, Transport stack for RDMA, control functions with the host/accelerators. Build tests and help build an integrated CI/CD pipeline for delivery of software Bringup the stack in simulation and emulation environments Hardware bringup and test in a scaled environment Minimum Qualifications: Proficient in programming in C/C++/Python Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Experience with Linux Kernel, especially drivers and network stack Working knowledge of transport stack particularly RDMA (RoCEv2) Hands on experience with debugging large scale systems Preferred Qualifications: Experience with Qemu, FPGA Emulation environment is a plus About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics. Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta. Show more Show less

Role Description Role Proficiency: Provide leadership to a project with appropriate technical options and well suited design standards for embedded system product development system level validation and performance optimization strategies. Outcomes Design develop and implement system level specifications. Develop highly optimized secured code debugging integrating firmware/ applications and development level testing of complex SW/HW systems. Work directly with IP owners product (HW & SW) architects for design and debugging as per the project needs. Prepare Release Notes and participate in release strategies. Mentor lead and manage Developers I II III – Embedded Software Engineers based on project needs Identify and recommend appropriate tools (SW & HW) for the project. Developing utilizing various debug validation tools and/or methodologies to implement Development and validation plans Create share best practices and lessons learned with the team. Optimises efficiency cost and quality. Influence and improve customer satisfaction Set FAST goals for self/team and also provide feedback to FAST goals of team members Measures Of Outcomes Adherence to embedded design process and standards Quick turnaround on multiple alternative solutions determining the most suitable Number of technical issues uncovered during the execution of the project Number of review feedback post Software Lead II review based on project SLA Number of design and test defects post-delivery based on project SLA Quick turnaround on defect fixing for design and tests based on project SLA Adherence to testing methodologies and compliance process Adherence to project schedule / timelines Deploy Innovation techniques and publish white paper Team management and productivity improvement as per Project SLA. Requirement Outputs Expected: Lead requirement engineering; collaboration with internal and external customers to understand their needs Design Embedded design architecture/LLD and linking to requirements Develop Design the embedded SW and code as per design patterns coding standards templates and checklists. Develop automated tools or scripts for the validation environment. Test Analysis and testing of prototypes validate the designed software document the analysis and test results Document Create documentation for one's own work and contribute to creation of design HLD LLD/architecture for component/system software/ application diagnostics and test results Status Reporting Report status of tasks assigned; comply with project related reporting standards/process Quality Lead design reviews add value take responsibility for the design and overall quality of the embedded software Release Adhere to release management process for circuit simulation design schematics board files Compliance Adhere to embedded software design regulatory and test compliance Estimate Estimate time effort resource dependence for one's own work and for projects' work. Accurately define and document the technical side of the project schedule with estimates and identified risks Interface With Customer Clarify requirements and provide guidance to development team. Present design options to customers and conduct product demos Manage Project Manage delivery of embedded software and manage requirement understanding and effort estimation. Manage Team Set FAST goals and provide feedback. Understand aspirations of team members and provide guidance opportunities etc. Ensure team is engaged in project Manage Defects Perform defect RCA and mitigation. Identify defect trends and take proactive measures to improve quality Manage Knowledge Consume project related documents and specifications. Review the reusable documents created by the team Skill Examples Ability to create Embedded C Program Development for system level. Capability in creating and executing one or more of the following domains: Storage/connectivity/Media/graphics/boot/clusters/infotainment/ADAS Ability to do C++ programming (OOP) Assembly programming skills Ability to handle OS Scheduler Pre-emptive Round robin & Cooperative scheduling related work Ability to handle SW development in area of CAN Diagnostics Vehicle Functions etc. Aptitude in Networking protocols such as CAN LIN etc Ability to select right IoT & IO protocols as per problem statement. Ability to do Unit Testing (Tessy & RTRT) using appropriate Integration Testing Tools Ability to define and execute test cases with techniques (White Box and Black box) Ability in Closed loop LabCar INCA or similar tools Capacity to configure GDT framework. Ability to adhere to software quality standards (MISRA PCLINT QAC). Ability to debug using embedded tools Ability to do automation and configure Simulation Tools. Proactively ask for and offer help Ability to work under pressure determine dependencies risks facilitate planning and handle multiple tasks. Build confidence with customers by meeting deliverables in time with quality. Estimate effort time resources required for developing / debugging features / components Make decisions on appropriate of the Software / Hardware’s. Strong analytical and problem-solving abilities Knowledge Examples Knowledge on product development lifecycle Testing methodology and standards (Water Fall/ Agile) Knowledge in Test Automation scripting languages (e.g. Python Perl TCL) Knowledge with Wired (USB Ethernet PLC SCADA etherCAT Modbus RSxxx & Wireless technologies like NFC Bluetooth Wi-fi Zigbee etc. is a plus Understanding of automation frameworks (e.g. Hudson/Jenkin) Knowledge and knowhow on Diesel and Gasoline Engine Management Systems Knowledge of embedded algorithm integration on platform (Windows Linux and Android) Comprehension of ASPICE & ISO26262 process Knowledge in Pre-Silicon Verification environments for simulation and Emulation/FPGA platform Experience with System Verilog IP/Subsystem and SOC development environment Knowledge of MISRA 2004 and 2012 Coding guidelines (PC-lint LDRA & PRQA) Knowledge of CAN Tools: CANoe CANalyser & CAPL programming Knowledge of GDT framework internals Additional Comments Proficient in Embedded C - Good understanding on embedded systems and experience in complex device drivers - Automotive experience is preferred - Good understanding on SDLC – V model and Agile - Hands on in IBM tools like DOORS, ClearCase etc - Hands on in Architectural design using tools like Enterprise architect (EA) - Good communication and team handling skills - Local candidates preferred Skills Sdlc,V Model,Agile Show more Show less

You will be responsible for developing a deeper understanding of standard bus protocols like (AHB/AHB5/AXI4/ACE/CHI-B, C, D, E etc.) and develop SW Softmodel / RTL IPs / accelerated VIPs using C/C++/ SystemVerilog/SystemC/ UVM, make them perfect for Simulation (Questa) and Emulation (Platform), helping customers to deploy and use them in their Verification Environment. Job Requirements: BE/ME/BTech/MTech in Elctronics/Electrical Engineering/Computer Engineering or related stream with 2+ years of relevant experience. Skills Strong knowledge Design & Verification methodologies of either of these (Times/Untimed SW Models), RTL IP, VIPs, UVM Env. Understanding of verification tools like Simulator, Synthesis etc. Hands on experience on C/C++, System Verilog, UVM, SystemC, RTL Understanding of some of the standard protocol interfaces like AMBA, Automotive, PCIe, USB etc. Excellent written and verbal interpersonal skills Self-motivated and great teammate Show more Show less

Job Summary: - The Verification role will involve many aspects of Functional, Performance verification using most effective methodologies in context of Module/Subsystem/SoC /System Level. A strong ability to map requirements into a traceable verification plan is important. The ideal candidate will partner with local and global SoC and IP developers to drive best practices with a target of ongoing productivity improvement. A “zero-defect” mindset is a key enabler. Responsibilities encompass the development of verification test bench, development of verification components, test case development for simulation, formal verification and emulation, debugging failures and creating simulation cases for various studies. Expectations Include Team leadership with technical guidance and tracking and Verification planning; Verification test bench development, tuning and implementation. Development of verification test bench components such as drivers, monitors, response checkers as well as use most advanced UVM VIPs. Development of direct and constrained-random stimulus using c ,SV. Understands and analyzes RTL code, functional, assertion coverage results. Understands Develop functional coverage. Understands and develops system Verilog assertions. Understands and implements formal verification methods; Strong skills in debug, failure re-creation and root cause analysis. Applicant should have efficient debugging and logic skills. Job Qualifications C and UVM/SV based Test environment, and Understanding of the design/architecture and ability to debug RTL/Gate netlist is MUST Coverage driven Verification for addressing Functional, Performance requirement of the SoC, regression management Microcontroller architecture, ARM Cores, Interconnect (NIC, FlexNoC), Cache Coherency, and Bus Protocols like AHB/AMBA,AXI, ACE Following Skills Will Have Additional Value Memory controllers (Flash, SRAM,DDR3/4/LPDDR) Protocols like PCIe, MIPI, GPU (Graphics processing), Ethernet, Serial / Quad flash Formal verification methodologies and Apps, AVIP, PinMuxing Verification, Randomization Low Power intent verification using UPF o Exposure to pre silicon validation/emulation (Veloce, Zebu)/FPGA Prototyping would be a plus. More information about NXP in India... Show more Show less

Basic Information Country: India State: Maharashtra City: Pune Date Published: 22-May-2025 Job ID: 44823 Travel: You may occasionally be required to travel for business Looking for details about our benefits? You can learn more about them by clicking HERE Description and Requirements Hybrid: #LI-Hybrid "At BMC trust is not just a word - it's a way of life!" We are an award-winning, equal opportunity, culturally diverse, fun place to be. Giving back to the community drives us to be better every single day. Our work environment allows you to balance your priorities, because we know you will bring your best every day. We will champion your wins and shout them from the rooftops. Your peers will inspire, drive, support you, and make you laugh out loud! We help our customers free up time and space to become an Autonomous Digital Enterprise that conquers the opportunities ahead - and are relentless in the pursuit of innovation! The IZOT product line includes BMC’s Intelligent Z Optimization & Transformation products, which help the world’s largest companies to monitor and manage their mainframe systems. The modernization of mainframe is the beating heart of our product line, and we achieve this goal by developing products that improve the developer experience, the mainframe integration, the speed of application development, the quality of the code and the applications’ security, while reducing operational costs and risks. We acquired several companies along the way, and we continue to grow, innovate, and perfect our solutions on an ongoing basis. We are looking for Application Security Engineer to take ownership of security testing for enterprise products deployed on mainframe environments. In this role, you will assess application-layer security risks, identify vulnerabilities in product implementations, and lead secure architecture reviews. The ideal candidate brings deep offensive security skills along with familiarity in testing applications running on or integrated with IBM mainframe systems. Primary Roles and Responsibilities: Conduct penetration testing and red teaming exercises targeting mainframe environments and the surrounding application ecosystem. Perform code-assisted and black-box penetration testing against enterprise applications/systems interacting with RACF, DB2, CICS, MQ, and related subsystems. Identify risks in authentication, authorization, data handling, and communications within mainframe-integrated products. Create threat models and guide product teams in mitigating high-impact vulnerabilities early in the SDLC. Drive remediation efforts through hands-on collaboration and secure design guidance. Author technical reports and deliver executive summaries tailored to various audiences. Stay current on vulnerabilities, exploits, and testing techniques relevant to legacy enterprise technologies and mainframe ecosystems. Assess common integration patterns (SOA, REST/JSON, MQ) for security risks. To ensure you’re set up for success, you will bring the following skillset & experience: 5+ years of experience in penetration testing, with a specialization in systems/applications integrating with mainframe environments. Deep knowledge of mainframe communication protocols and security mechanisms. Demonstrated experience conducting red team-style assessments or advanced threat emulation on mainframe systems. Proficient in tools such as: Mainframe utilities: REXX, ISPF panels, NetView Security tools: Nmap, Burp Suite, Wireshark, custom scripts Strong scripting and automation skills (Python, REXX, Bash, or similar). Strong communication and leadership skills, with a proven ability to lead technical teams or projects. Experience producing board-level reports and presenting findings to senior stakeholders. Exposure to hybrid environments (mainframe to cloud integrations, modernization efforts). Familiarity with modern enterprise integration methods (REST, SOAP, MQ, FTP) that interface with mainframe services Whilst these are nice to have, our team can help you develop in the following skills: Industry certifications such as OSCP, OSCE, CRTP, GIAC GPEN, GXPN, or CISSP. Background in regulated industries such as banking, insurance, or government, where mainframes are core infrastructure. Knowledge of COBOL, PL/I, or other mainframe-centric programming languages. Experience with compliance standards like PCI-DSS, NIST, or SOX as they apply to mainframes. CA-DNP Our commitment to you! BMC’s culture is built around its people. We have 6000+ brilliant minds working together across the globe. You won’t be known just by your employee number, but for your true authentic self. BMC lets you be YOU! If after reading the above, You’re unsure if you meet the qualifications of this role but are deeply excited about BMC and this team, we still encourage you to apply! We want to attract talents from diverse backgrounds and experience to ensure we face the world together with the best ideas! BMC is committed to equal opportunity employment regardless of race, age, sex, creed, color, religion, citizenship status, sexual orientation, gender, gender expression, gender identity, national origin, disability, marital status, pregnancy, disabled veteran or status as a protected veteran. If you need a reasonable accommodation for any part of the application and hiring process, visit the accommodation request page.

Basic Information Country: India State: Maharashtra City: Pune Date Published: 22-May-2025 Job ID: 44824 Travel: up to 10% Secondary locations: IND Bangalore - Prestige Summit Looking for details about our benefits? You can learn more about them by clicking HERE Description and Requirements Hybrid: #LI-Hybrid "At BMC trust is not just a word - it's a way of life!" We are an award-winning, equal opportunity, culturally diverse, fun place to be. Giving back to the community drives us to be better every single day. Our work environment allows you to balance your priorities, because we know you will bring your best every day. We will champion your wins and shout them from the rooftops. Your peers will inspire, drive, support you, and make you laugh out loud! We help our customers free up time and space to become an Autonomous Digital Enterprise that conquers the opportunities ahead - and are relentless in the pursuit of innovation! The IZOT product line includes BMC’s Intelligent Z Optimization & Transformation products, which help the world’s largest companies to monitor and manage their mainframe systems. The modernization of mainframe is the beating heart of our product line, and we achieve this goal by developing products that improve the developer experience, the mainframe integration, the speed of application development, the quality of the code and the applications’ security, while reducing operational costs and risks. We acquired several companies along the way, and we continue to grow, innovate, and perfect our solutions on an ongoing basis. We are looking for a Senior Penetration Tester to take ownership of security testing for enterprise products deployed on mainframe environments. In this role, you will assess application-layer security risks, identify vulnerabilities in product implementations, and lead secure architecture reviews. The ideal candidate brings deep offensive security skills along with familiarity in testing applications running on or integrated with IBM mainframe systems. Here is how, through this exciting role, YOU will contribute to BMC's and your own success: Primary Roles and Responsibilities: Lead security assessments of applications and solutions deployed on IBM z/OS-based environments. Conduct penetration testing and red teaming exercises targeting mainframe environments and the surrounding application ecosystem. Perform code-assisted and black-box penetration testing against enterprise applications/systems interacting with RACF, DB2, CICS, MQ, and related subsystems. Identify risks in authentication, authorization, data handling, and communications within mainframe-integrated products. Create threat models and guide product teams in mitigating high-impact vulnerabilities early in the SDLC. Drive remediation efforts through hands-on collaboration and secure design guidance. Author technical reports and deliver executive summaries tailored to various audiences. Stay current on vulnerabilities, exploits, and testing techniques relevant to legacy enterprise technologies and mainframe ecosystems.. Assess common integration patterns (SOA, REST/JSON, MQ) for security risks. To ensure you’re set up for success, you will bring the following skillset & experience: 8+ years of experience in penetration testing, with a specialization in systems/applications integrating with mainframe environments. Deep knowledge of mainframe communication protocols and security mechanisms. Demonstrated experience conducting red team-style assessments or advanced threat emulation on mainframe systems. Proficient in tools such as: Mainframe utilities: REXX, ISPF panels, NetView Security tools: Nmap, Burp Suite, Wireshark, custom scripts Strong scripting and automation skills (Python, REXX, Bash, or similar). Strong communication and leadership skills, with a proven ability to lead technical teams or projects. Experience producing board-level reports and presenting findings to senior stakeholders. Exposure to hybrid environments (mainframe to cloud integrations, modernization efforts). Familiarity with modern enterprise integration methods (REST, SOAP, MQ, FTP) that interface with mainframe services Whilst these are nice to have, our team can help you develop in the following skills: Industry certifications such as OSCP, OSCE, CRTP, GIAC GPEN, GXPN, or CISSP. Background in regulated industries such as banking, insurance, or government, where mainframes are core infrastructure. Knowledge of COBOL, PL/I, or other mainframe-centric programming languages. Experience with compliance standards like PCI-DSS, NIST, or SOX as they apply to mainframes. CA-DNP Our commitment to you! BMC’s culture is built around its people. We have 6000+ brilliant minds working together across the globe. You won’t be known just by your employee number, but for your true authentic self. BMC lets you be YOU! If after reading the above, You’re unsure if you meet the qualifications of this role but are deeply excited about BMC and this team, we still encourage you to apply! We want to attract talents from diverse backgrounds and experience to ensure we face the world together with the best ideas! BMC is committed to equal opportunity employment regardless of race, age, sex, creed, color, religion, citizenship status, sexual orientation, gender, gender expression, gender identity, national origin, disability, marital status, pregnancy, disabled veteran or status as a protected veteran. If you need a reasonable accommodation for any part of the application and hiring process, visit the accommodation request page.

Indian Institute of Technology Hyderabad Kandi - 502 284, Telangana, India Date: 15.04.2025 Applications are invited from the eligible candidates for the below positions from eligible candidates purely on ad hoc basis in the project 1. Name of post Senior Project Associate Engineer 2. Job Description Software/hardware design expert with B. Tech or M. Tech with an experience of 2-3 year’s. The tasks performed are development of design and algorithms. Also, development of system-level-simulation tools and development of RTL on FPGA boards and embedded software. 3. No. of post 02 4. Essential B tech / BE/ M tech /MCA/MSC/BSC ME / MS Master’s Bachelor’s degree Qualification Electrical /Electronic engineering, Computer engineering or Equivalent practical experience 5. Skills  Exp Level 2 to 3 Years /Experience  Domian Knowledge on RTL Design, implementation, and integrations for Required FPGA Designs.  Knowledge with RTL coding using Verilog/System Verilog.  Experience with protocols like AXI4-stream and AXI4.  Strong debugging capabilities at RTL simulation and FPGA Emulation. 6. Consolidated Rs. 100,000 to 121,000 Pay 7. Anticipated start 01st June 2025 date 8. Tenure of Contract period of 11 months. However, candidate can be reengaged for employment subsequent terms based on his/her performance and requirement of the Department/Institute. 9. Mode of Test and interview selection 10. Selection 1 Interested applicant should apply online through the online google form link . Procedure /Mode of application https://docs.google.com/forms/d/1wBOZ2dFh25vh2de5uue881LvX5VTDcEHuon9 66ApcUQ/edit 2.The candidate will be shortlisted based on the eligibility criteria, academic record, and relevant experience and selected based on the performance is the Witten interview. 3 Date and time of interview: this will be intimated to shortlisted candidates via email. 4 IIT Hyderabad reserves the right to alter the number of vacancies or keep it open till the deserving the right to close the recruitment procedure with out selecting anybody, if none of the candidates are found suitable . 6. Candidates with prior experience in relevant areas will be given preference 11. Tentative date Date & Time will be informed through mail to shortlisted candidates of interview 12. Contact Candidate may contact: (Email:Srinivas.kvn@5g.iith.ac.in) carrers@5g.iith.ac.in

Basic Information Country: India State: Maharashtra City: Pune Date Published: 21-May-2025 Job ID: 44817 Travel: up to 10% Looking for details about our benefits? You can learn more about them by clicking HERE Description and Requirements Hybrid: #LI-Hybrid "At BMC trust is not just a word - it's a way of life!" We are an award-winning, equal opportunity, culturally diverse, fun place to be. Giving back to the community drives us to be better every single day. Our work environment allows you to balance your priorities, because we know you will bring your best every day. We will champion your wins and shout them from the rooftops. Your peers will inspire, drive, support you, and make you laugh out loud! We help our customers free up time and space to become an Autonomous Digital Enterprise that conquers the opportunities ahead - and are relentless in the pursuit of innovation! The IZOT product line includes BMC’s Intelligent Z Optimization & Transformation products, which help the world’s largest companies to monitor and manage their mainframe systems. The modernization of mainframe is the beating heart of our product line, and we achieve this goal by developing products that improve the developer experience, the mainframe integration, the speed of application development, the quality of the code and the applications’ security, while reducing operational costs and risks. We acquired several companies along the way, and we continue to grow, innovate, and perfect our solutions on an ongoing basis. The IZOT product line includes BMC’s Intelligent Z Optimization & Transformation products, which help the world’s largest companies to monitor and manage their mainframe systems. The modernization of mainframe is the beating heart of our product line, and we achieve this goal by developing products that improve the developer experience, the mainframe integration, the speed of application development, the quality of the code and the applications’ security, while reducing operational costs and risks. We acquired several companies along the way, and we continue to grow, innovate, and perfect our solutions on an ongoing basis. We are seeking an experienced, strategic, and hands-on Manager - Product Security to lead a growing team of penetration testers supporting BMC’s IZOT product line. This team focuses on offensive security assessments across mainframe-based solutions and modern application ecosystems. In this leadership role, you will manage a team of skilled professionals performing deep security testing, red teaming, vulnerability analysis, and secure architecture reviews. You’ll be responsible for setting strategic goals, driving security initiatives, and ensuring secure-by-design practices are embedded across product development lifecycles. This position requires a solid blend of technical expertise in offensive security, deep understanding of mainframe and modern application architectures, and strong leadership to influence and drive results across cross-functional teams. To ensure you’re set up for success, you will bring the following skillset & experience: Bachelor's or master's degree in computer science, Information Security, or related field. 8+ years in cybersecurity roles, with 3+ years in technical leadership or management capacity. Proven experience leading or performing penetration testing on both mainframe and modern platforms. Demonstrated experience conducting red team-style assessments or advanced threat emulation on mainframe and modern systems. Proficient in tools such as: Mainframe utilities: REXX, ISPF, JCL Security tools: Nmap, Burp Suite, Wireshark, custom scripts Proficient in scripting and automation skills (Python, REXX, Bash, or similar). Experience delivering technical and executive-level security reports. Strong communication and leadership skills, with a proven ability to lead technical teams or projects. Experience producing board-level reports and presenting findings to senior stakeholders. Exposure to hybrid environments (mainframe to cloud integrations, modernization efforts). Familiarity with modern enterprise integration methods (REST, SOAP, MQ, FTP) that interface with mainframe services. CA-DNP Our commitment to you! BMC’s culture is built around its people. We have 6000+ brilliant minds working together across the globe. You won’t be known just by your employee number, but for your true authentic self. BMC lets you be YOU! If after reading the above, You’re unsure if you meet the qualifications of this role but are deeply excited about BMC and this team, we still encourage you to apply! We want to attract talents from diverse backgrounds and experience to ensure we face the world together with the best ideas! BMC is committed to equal opportunity employment regardless of race, age, sex, creed, color, religion, citizenship status, sexual orientation, gender, gender expression, gender identity, national origin, disability, marital status, pregnancy, disabled veteran or status as a protected veteran. If you need a reasonable accommodation for any part of the application and hiring process, visit the accommodation request page.

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products. Role & Responsibilities As a SoC Verification Engineer , you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for: Developing verification test plans based on design specifications. Creating and executing test cases across multiple platforms, including RTL simulation, FPGA prototyping, and Palladium emulation. Performing Gate-Level Simulations (GLS) and debugging complex SoC designs. Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies. Contributing to the development of advanced verification environments, including UVM, PSS testbenches. Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness. Why Join Us? At Sandisk , you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions . Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products. Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions. Qualifications Required : BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology History of building and improving UVM based verification methodology Knowledge on Chiplet Protocols - UCIe Skills Develop and execute verification plans Proficiency with C, Verilog, System Verilog and UVM based verification Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - AXI, AHB, APB and bus interconnects Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Knowledge in various interfaces – PCIe, DP, UART, I2C, I2S, SPI, USB, SD Experience working on processor-based SoC -- ARC/ARM/RISC.. Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Interest in ASICs, SoCs, flash memory, semiconductor components Strong team player who can collaborate with colleagues Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Show more Show less

L&T Technology Services is #hiring for Lead Emulation Engineer in Hyderabad - Permanent!! JD: Position - Lead Emulation Engineer Experience - 7+ Years of Experience Location: Hyderabad Job Type - Permanent Qualification - BE/B Tech Exp : 6 to 15 yrs Emulation debug (state experience required) FPGA and Emulation model creation and bring-up experience RTL sanitization (HDL coding and/or design verification and debug) validating hardware features for at least 3 or more projects in a pre-silicon environment. debugging failures using waveform viewers, log files and microcode trace dumps. debugging software using debuggers and trace files. Knowledge of x86 and/or ARM SoC Architecture Knowledge of current industry GFX Architectures Familiar with one or more of the following: Veloce, Zebu and/or Palladium emulation platforms and prior experience in debugging/executionof emulation models Knowledge of one or more protocols; SPI, DDR, SATA, USB, AXI, PCI, PCIe, MIPI, WLAN or I2C

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience required 5+ Years. Emulation experience on any available platforms (Palladium, Veloce or Zebu) including bring-up, VIP interfacing, build flow, debug, performance/throughput measurement Good understanding of the SOC designs and verification aspects Experience with Verilog, System Verilog, UVM, SVA Knowledge of communication/interface protocols would be a plus: PCIe, USB3/4, LPDDR5/4 , QUP, eMMC, SD, UFS Knowledge of the processor RISCV, ARM Knowledge of GLS and GLE flows would be a plus Proficient in writing scripts using any languages (Perl, TCL, bash, Python) Experience with waveform debug tools like Verdi Strong communication skills and ability to work as a team with multiple stakeholders Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3072057 Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Validation Engineer Location: Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities & Skills: (Design Verification Engineer) The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP an added advantage. Qualifications Minimal qualification requires B. Tech or M. Tech/B.E./M.E. with 3-6 years of experience in relevant experience. Behavioral Skills Required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Great! Here's a tailored job portal post for your Network Administrator requirement, based on your specifications: We're Hiring: Network Administrator About Us: Anmol Technologies is a dynamic and growing organization committed to delivering top-tier IT and networking solutions. We’re looking to expand our team with a skilled Network Administrator who is passionate about building, maintaining, and optimizing networks. What We’re Looking For: An experienced Network Administrator with strong hands-on knowledge in: Cisco network devices GNS3 , EVE-NG , and similar network simulation/emulation platforms PNETLab or equivalent tools Key Responsibilities: Configure, maintain, and troubleshoot network infrastructure Simulate and test networks using tools like GNS3, EVE-NG, and PNETLab Monitor system performance and ensure network security and availability Collaborate with IT teams on network planning and upgrades Maintain documentation of network configurations and procedures Requirements: Proven experience in network administration (2+ years preferred) Strong knowledge of Cisco technologies (CCNA/CCNP is a plus) Hands-on experience with GNS3, EVE-NG, and/or PNETLab Good problem-solving and communication skills Ability to work independently and as part of a team Why Join Us? Opportunity to work with cutting-edge network tools Supportive and collaborative work environment Continuous learning and certification support How to Apply: Send your resume to a ccounts@trlabs.net or apply via send your resume 9786103989 Job Type: Full-time Pay: ₹15,000.00 - ₹20,000.00 per month Schedule: Day shift Rotational shift Work Location: In person Speak with the employer +91 9786103989

We have a new demand for a GFXIP Emulation Methodology Lead for our client AMD, located in Bangalore . This is a high-priority requirement, and we are looking for candidates who can join immediately or within 15 days . Key Responsibilities: Exposure to Emulation model build and sanity bring-up Proven Emulation Testbench bring-up experience with C++ and SystemVerilog BFM models Expertise in porting C++/SystemVerilog Simulation Testbenches to Emulation Hands-on experience with SystemVerilog, C++ based testbenches BFM coding using C++ or SystemVerilog Strong Python scripting skills Exposure to GPU emulation model build and sanity bring-up Good understanding of GPU architecture Strong functional verification expertise Qualifications: B.Tech with 12+ years or M.Tech with 10+ years in Electronics and Communication Engineering (ECE) or VLSI

Responsibilities & Achievements: Reduced post-silicon bug escapes through early software-driven validation in emulation environments. (Accelerated Verification) Cut SoC bring-up time by 50% by architecting a unified simulation-to-emulation testbench with reusable transactors. Spearheaded the Accelerated verification plan for a next-gen ADAS SoC including use cases like Start Up, BOOTROM, Complex data path, Negative tests Enabled 80% reuse of verification components across simulation, emulation, and prototype platforms through modular UVM design. Successfully led a AV verification team of engineers across DV, emulation Key Skills Accelerated Verification: Synopsys ZeBu, Siemens Veloce Verification Methodologies: UVM, System Verilog, Acceleratable UVM, C based V&V Reuse & Bridging: Simulation-to-Emulation Flow, Coverage Continuity, Transactor Development is desirable.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: THE ROLE: The person will be part of AMD's CPU Performance Validation team. This team is part of AMD's global CPU Performance teams and plays a critical role in next generation AMD CPU design. Involves having deep understanding of existing AMD X86 CPU architecture and microarchitecture ranging from CPU pipeline stages to various complex features and structures, debugging performance issues of RTL, giving feedback to design team for latest gen CPU in pre-silicon and emulation environment. We highly encourage people with a creative bent of mind and with a natural ability to dive into the details. This team is a perfect place for people who can understand the present and envision the future. If you find yourself to be a person who wants to go that extra mile to refine an existing process and also understands the opportunities to make it better, if you are the one who has innovative ideas in your brain waiting to find a proper stage to come out, we can offer you the perfect ground for that. THE PERSON: Should have excellent inter-personal, communication skills and ability to work in a fast-paced exciting environment. Continuous learning has always been the moto in this ever changing industry. An ideal person for this role should be a self-learner and always ready to upgrade his/her skills to stay abreast with the technology. The team looks for superstars but also believes in nurturing you into one. Collaboration is the key to success. Ideal candidate should learn at a great pace, deliver what is expected and also share your learning in the team to help the overall growth. It’s always We before Me in the team KEY RESPONSIBILITIES: Responsible for building infrastructure for performance verification and verify performance of X86 processor. Writing specific targeted tests to measure the performance of the processor Involves having a deep understanding of processor micro-architecture and triaging performance issues in RTL and simulator Skillset Debug triage of failures from simulation and emulation environment for CORE or sub level regressions. Writing automatized triages in Perl/Ruby and creating tools using perl/ruby or AMD verification methodology (primarily in C++) to enhance the functional debug and triage process. On a need basis, work on Post-Si bug recreation PREFERRED EXPERIENCE: Experience: 3-10 years' experience in processor/ASIC performance correlation. Experience in micro-architecture testing for modern high-performance processors. Experience in writing tests and building infrastructure that tests performance of modern processors. Experience in application performance analysis Programming/Scripting Skills C, C++, Perl, Python. Solid background and understanding of Digital Design, RTL design , improving model performance and Processor Architecture Strong troubleshooting, analytical and debug skills. Prior experience in performance correlation of Processor subsystems is a plus. Excellent knowledge of computer architecture with relevant research and project work or industry experience Strong programming skills (C/C++ and assembly) Basic knowledge of Verilog ACADEMIC CREDENTIALS: Bachelors/Masters in Computer Science/Electrical/Electronics Engineering with relevant course and research work LOCATION: Bangalore #LI-RR1 #LI-HYBRID Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Role & responsibilities - Develop PLC and HMI programs; test and validate PLC and HMI software to ensure commissioning readiness. - Create visualization screens (e.g., Weintek, AutomationDirect). - Prepare both technical and non-technical documentation according to project deliverables. - Provide technical support to the commissioning team in North America. - Contribute to standardization and continuous improvement initiatives. - Travel to North America for short periods. - A non-traveling profile is also available. Preferred candidate profile Controls Engineer / Automation Engineer with below Must-Have Skills. In-depth knowledge of Rockwell PLC and HMI programming. Experience in commissioning automotive assembly processes like BIW weld cells or conveyor assembly lines. Good knowledge of the PLCrobot interface for various applications, such as spot welding, arc welding, dispensing, projection welding, and material handling. Additional skills required: Knowledge of VFD and Servo drives. Knowledge of Industrial networks preferably Ethernet I/P. Knowledge of Industrial safety standards and programming of safety PLCs and Safety relays. Knowledge of machine vision systems of Cognex, Keyence, Matrox, etc. Should be able to read electrical/mechanical drawings and layouts. Good knowledge of pneumatic valves and circuits. Knowledge of offline robot programming (Fanuc/KUKA) is an advantage. Basic Knowledge of programming skills such as XML, C#, J Script, VBA, Python, etc. is an advantage.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SE NIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Engineer) THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and verification asks Ability to come with detailed testplan based on the Arch specs Good understanding and exposure to SoC design and architecture 6+ years of Design Verification experience with strong Verilog, System Verilog, C and UVM/OVM knowledge Candidate should be able to develop Testbench. Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects. Developing functional coverage & assertions. Own the DV sign-off and ensure a bug free design Work with the post-silicon team on debug support and to help root-cause any failures Have worked on wireless protocol design verification Bringing up Testbench/SoC verification environment. Good understanding of SoC RESET/CLOCK flow Exposure to DEBUG concepts such as JTAG etc Comfortable with VCS/Verdi and excellent debug skills Logical in thinking and ability to gel well within a team Good communication skills PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP level ASIC verification Proficient in debugging RTL code using simulation tools Experienced with Verilog, System Verilog, C, and C++ Worked on any High Speed Interface like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification Developing UVM based verification frameworks and testbenches, processes and flows Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Scripting language experience: Perl, Python, Makefile, shell preferred. #LI-SR4 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Requirements We are seeking a highly skilled SystemC Hardware Modeling and System Architecture Engineers to join our dynamic team. The ideal candidate will have extensive experience in system-level modeling, performance analysis, and architecture design using SystemC/TLM . You will play a crucial role in defining and optimizing next-generation hardware architectures, enabling early software development, and defining hardware-software co-design methodologies. Develop and maintain SystemC IP library for reuse across multiple projects. Ensure modularity, scalability, and maintainability of SystemC IP components. Optimize and standardize SystemC-based IP models for integration into larger SoC platforms. Develop and maintain SystemC-based transaction-level models (TLM) for SoC (System-on-Chip) architectures. Conduct performance analysis, power modeling, and system optimization to guide architecture decisions. Define and implement hardware/software co-simulation environments for early-stage software development. Work closely with RTL design teams to ensure alignment between system models and final hardware implementations. Collaborate with software, firmware, and verification teams to enable pre-silicon verification / validation and bring-up. Develop high-level system models to evaluate trade-offs in memory hierarchy, interconnects, and processing elements. Support the integration of virtual prototypes into larger simulation frameworks. Optimize simulation performance to support large-scale system-level validation. Bachelor’s, or Master’s in Electrical Engineering, Computer Engineering, or a related field . 5+ years of experience in C++ , SystemC/TLM2.0 modeling for hardware architectures. Strong knowledge of computer architecture, SoC design, and hardware-software interaction . Proficiency in C++ programming and SystemC modeling techniques . Experience with performance modeling, cache coherency, and memory subsystem analysis . Familiarity with hardware simulation tools , virtual platforms, and hybrid emulation environments. Hands-on experience with embedded systems, firmware, and device driver development . Strong debugging and profiling skills for hardware/software interaction. Preferred Qualifications: Familiarity with hardware functions, peripherals, Bus Fabrics, RISC-V, and SoC design . Knowledge of RTL design, and high-level synthesis (HLS) . Background in system performance benchmarking and optimization . Proficiency in Python, scripting, and automation for simulation frameworks. Work Experience Required Skills and Experience Bachelor’s, or Master’s in Electrical Engineering, Computer Engineering, or a related field . 1-2 years of experience in C++ , SystemC/TLM2.0 modeling for hardware architectures. Strong knowledge of computer architecture, SoC design, and hardware-software interaction . Proficiency in C++ programming and SystemC modeling techniques . Experience with performance modeling, cache coherency, and memory subsystem analysis . Familiarity with hardware simulation tools , virtual platforms, and hybrid emulation environments. Hands-on experience with embedded systems, firmware, and device driver development . Strong debugging and profiling skills for hardware/software interaction

Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Frontend Implementation, CDC/RDC Responsibilities: Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDC. Perform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and FW teams and develop reset groups and the corresponding reset sequence for RDC. Perform RTL Lint and work with the Designers to create waivers. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC,). Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. 8+ years of experience in static verification tools Experience with Lint, Clock Domain & Reset Domain crossing. Knowledge of SOC Integration (Clocking, Reset, PLL, etc) Knowledge of front-end ASIC flows Experience with RTL design using SystemVerilog or other HDL. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. 5+ years of experience in static verification tools Experience with communicating across functional internal teams and vendors. Experience with Lint, Clock Domain & Reset Domain crossing Experience with SOC CDC signoff Knowledge of SOC Integration (Clocking, Reset, PLL, etc) Knowledge of front-end ASIC flows Experience with RTL design using SystemVerilog or other HDL. Experience with communicating across functional internal teams and vendors. Preferred Qualifications: Experience with SOC Design Integration and Front-End Implementation Knowledge of Timing/physical libraries, SRAM Memories. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools. Experience with Netlist-CDC Analysis and improving MTBF Experience with developing structural rule based checks for RTL & Netlist Scripting and programming experience using Perl/Python, TCL, and Make Experience with SOC Design Integration and Front-End Implementation. Knowledge of Timing/physical libraries, SRAM Memories. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools. Experience with Netlist-CDC Analysis and improving MTBF Experience with developing structural rule based checks for RTL & Netlist Scripting and programming experience using Perl/Python, TCL, and Make. About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics. Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.