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Hyderabad, Telangana, India

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Company Description Aragen Life Sciences is a trusted R&D and manufacturing partner in the global life sciences industry. Whether working with large pharma, biotech, agrochemical, or animal health companies, Aragen provides global resources and proven capabilities at every stage of the biopharma lifecycle. Their innovative mindset, enabling technologies, and partnership approach drive success in transforming hope into health for millions worldwide. Role Description This is a full-time on-site role for an Associate Scientist - peptide at Aragen Life Sciences in Hyderabad. The Associate Scientist will be responsible for conducting peptide research, performing experiments, analyzing data, and contributing to the development of peptide-based solutions. The role involves collaborating with cross-functional teams and supporting ongoing projects in the lab. Qualifications Experience in peptide research and analysis Hands-on experience with peptide synthesis and purification techniques Knowledge of analytical methods for peptide characterization Ability to work effectively in a team environment Strong problem-solving and critical thinking skills Experience with HPLC, mass spectrometry, and other relevant analytical techniques Master's or Ph.D. in Chemistry, Biochemistry, or related field Connect Me on kishore.pilaka.c@aragen.com Show more Show less

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0.0 - 10.0 years

0 Lacs

Bengaluru, Karnataka

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Site Name: India - Karnataka - Bengaluru Posted Date: May 26 2025 GDC Sourcing Manager Responsibilities: The GDC Sourcing Manager will be responsible for the delivery of the critical Source to Contract service for one or multiple regions across Indirect Categories such as IT, Marketing, Professional & Corporate Services. This role will collaborate with the procurement category and local market teams (LOC) to deliver sourcing, negotiation, contract execution, and supplier lifecycle management services to the global procurement organization. This service is a cornerstone of the future procurement operating model and will enable the function to industrialize its core operation, driving best practice, providing practical knowledge for development of best-in-class category strategies, consistency of execution, and continual improvement. The role is also accountable for the transition to, and ongoing delivery of, the future ready procurement operation model, for assigned geographies, as it relates to the GDC. As such the role is pivotal to the successful execution of the procurement future ready transformation Strategy execution o Execute sourcing strategies for spend categories in scope of responsibility aligned with the requirements of stakeholders and business partnering with Global Category team. o Deliver benefits identified in strategies, local, regional and global, through effective and collaborative strategy execution, aligned to assurance of supply (risk management), quality, service, cost and innovation. o To ensure GSK’s Procurement policies, procedures, processes, systems and methodologies are utilized in a compliant manner in the area of responsibility. Benefit delivery o Support category leads in the creation and delivery of effective savings targets agreed with key stakeholders and Finance in accordance with the agreed Savings Methodology. o Deliver benefit identified in strategies, local, regional and global, through effective and collaborative strategy execution, aligned to assurance of supply (risk management), quality, service, cost and innovation. o Deliver savings and other set KPIs critical to global procurement plans as aligned with key stakeholders and Finance in accordance with the Savings Methodology and global budgets. Business partnering & stakeholder management in GSK o Collaborate with key stakeholders to deploy strategies globally/regionally, facilitated by robust implementation and transition plans. o Demonstrated success in collaboration with a wide range of senior leaders across [business areas] and supplier. o Resolve escalations, including from senior business stakeholders, timely and tactfully. o Understand and efficiently navigate organizational complexity to deliver set goals. We are looking for a Sourcing Manager and if you have these skills, we would like to speak to you. o 9-10 years of relevant experience o This role should have strong demonstrated procurement expertise in commercial and contract negotiations, strategic sourcing, Indirect category management, cost model synthesis and supplier relationship management for delivering multi-country, high spend complex engagements. o Demonstrated experience in navigating through organizational complexity, collaborating simultaneously with multiple teams, influencing without authority, handling escalations and associated business impact. o Demonstrated experience in understanding and utilising complex business processes in all GSK supplier transactions, including all risk/regulatory/compliance. o Strong experience in using tools like Ariba or other equivalent sourcing execution technology. Why GSK? Our values and expectations are at the heart of everything we do and form an important part of our culture. These include Patient focus, Transparency, Respect, Integrity along with Courage, Accountability, Development, and Teamwork. As GSK focuses on our values and expectations and a culture of innovation, performance and trust, the successful candidate will demonstrate the following capabilities. Inclusion at GSK: As an employer committed to Inclusion, we encourage you to reach out if you need any adjustments during the recruitment process. Please contact our Recruitment Team at IN.recruitment-adjustments@gsk.com to discuss your needs. #LI-GSK Why GSK? Uniting science, technology and talent to get ahead of disease together. GSK is a global biopharma company with a special purpose – to unite science, technology and talent to get ahead of disease together – so we can positively impact the health of billions of people and deliver stronger, more sustainable shareholder returns – as an organisation where people can thrive. We prevent and treat disease with vaccines, specialty and general medicines. We focus on the science of the immune system and the use of new platform and data technologies, investing in four core therapeutic areas (infectious diseases, HIV, respiratory/ immunology and oncology). Our success absolutely depends on our people. While getting ahead of disease together is about our ambition for patients and shareholders, it’s also about making GSK a place where people can thrive. We want GSK to be a place where people feel inspired, encouraged and challenged to be the best they can be. A place where they can be themselves – feeling welcome, valued, and included. Where they can keep growing and look after their wellbeing. So, if you share our ambition, join us at this exciting moment in our journey to get Ahead Together. Important notice to Employment businesses/ Agencies GSK does not accept referrals from employment businesses and/or employment agencies in respect of the vacancies posted on this site. All employment businesses/agencies are required to contact GSK's commercial and general procurement/human resources department to obtain prior written authorization before referring any candidates to GSK. The obtaining of prior written authorization is a condition precedent to any agreement (verbal or written) between the employment business/ agency and GSK. In the absence of such written authorization being obtained any actions undertaken by the employment business/agency shall be deemed to have been performed without the consent or contractual agreement of GSK. GSK shall therefore not be liable for any fees arising from such actions or any fees arising from any referrals by employment businesses/agencies in respect of the vacancies posted on this site. It has come to our attention that the names of GlaxoSmithKline or GSK or our group companies are being used in connection with bogus job advertisements or through unsolicited emails asking candidates to make some payments for recruitment opportunities and interview. Please be advised that such advertisements and emails are not connected with the GlaxoSmithKline group in any way. GlaxoSmithKline does not charge any fee whatsoever for recruitment process. Please do not make payments to any individuals / entities in connection with recruitment with any GlaxoSmithKline (or GSK) group company at any worldwide location. Even if they claim that the money is refundable. If you come across unsolicited email from email addresses not ending in gsk.com or job advertisements which state that you should contact an email address that does not end in “gsk.com”, you should disregard the same and inform us by emailing askus@gsk.com, so that we can confirm to you if the job is genuine.

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8.0 - 12.0 years

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Karnataka

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Location Karnataka Bengaluru Experience Range 8 - 12 Years Job Description PD: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM Must have participated in all stages of the design (floor planning, placement, CTS, routing, physical verification, IREM) Well versed with the timing closure (STA), timing closure methodologies Good Understanding of DRC, LVS,ERC and PERC rule files for lower tech node layout verification Experience in lower tech node (<7nm) Good automation skills in PERL, TCL and EDA tool-specific scripting Able to take complete ownership for Block/sub-system for complete execution cycle Out of box thinking to meet tighter PPA requirements Qualification: BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows, Fusion compiler based RTL2GDS flow is desired Experience – 11+

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7.0 - 12.0 years

35 - 65 Lacs

Hyderabad, Bengaluru

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Greetings from Quest Global Please find the details and kindly send me your Profile . RTL Design 10-15 Years Location : Bangalore/Hyderabad 1. Should have worked on ASIC/SOC projects using 22nm or smaller technology node 2. Expertise in automated RTL Integration using any of the industry standard tool/EDA flow 3. Expertise in SDC and UPF constraints development and checking 4. Expertise in Timing violation debug/fix at netlist level 5. Good knowledge on AHB/AXI/APB/PIPE interface 6. Expertise in Lint, CDC and VCLP, Synthesis, LEC 7. Very Strong in Python and TCL scripting • Nice to have skills: 8. Exposure to PCIe/Ucie 9. Experience in Leading small rtl design team • Location: Bangalore and Hyderabad • Notice period: max 45 days Please forward your updated profile to chakradhar.marupuru@quest-global.com below details Current CTC : Expected CTC: Notice Period : Best Regards Chakradhar M , Email:chakradhar.marupuru@quest-global.com | www.quest-global.com. Assistant Manager Quest Global Whatsapp No : 99869 21214 , Mob: +601 736 16576 Quest Global, Penang – Mayang. Unit 1.13-17 GBS@Mayang , Lengkok Mayang Pasir, Bayan Baru 11950,Penang, Malaysia

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4.0 years

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Hyderabad, Telangana, India

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Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 8+ years Hardware Engineering experience or related work experience. 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075847 Show more Show less

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4.0 years

0 Lacs

Hyderabad, Telangana, India

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Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 8+ years Hardware Engineering experience or related work experience. 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075848 Show more Show less

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2.0 years

0 Lacs

Hyderabad, Telangana, India

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Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties And Responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 3+ years Hardware Engineering experience or related work experience. 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075846 Show more Show less

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3.0 years

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Bengaluru, Karnataka, India

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Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications. Preferred Qualifications Master's or Bachelor's degree in Electronics or Electrical Engineering or equivalent. At least 3+ years of experience working on multiple designs. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075499 Show more Show less

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Navi Mumbai, Maharashtra, India

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Job Overview JOB DESCRIPTION As a Peptides Production Executive, you will be responsible for learning and assisting in the production of peptides according to established protocols and quality standards. This position is designed to provide hands-on training in peptide synthesis, purification, and related processes. Key Responsibilities Understand and follow standard operating procedures (SOPs) for peptide synthesis. Assist in the preparation of reagents, solutions, and equipment for peptide production. Execute peptide synthesis under the guidance of experienced personnel Learn and perform purification techniques such as HPLC, chromatography, and filtration. Assist in maintaining accurate records of production and testing activities. Follow Good Manufacturing Practices (GMP) and safety guidelines. Learn to operate and maintain peptide production equipment. Report equipment malfunctions or abnormalities promptly. Maintain accurate and detailed records of all production activities. Compile data and assist in preparing production reports. Communicate effectively with team members and supervisors. Contribute to the identification and implementation of process improvements. Provide feedback on procedures to enhance efficiency and quality Attend training sessions to enhance knowledge and skills. Actively participate in professional development opportunities. Preferred Candidate Profile Basic understanding of peptide synthesis principles is a plus. Strong attention to detail and commitment to quality. Ability to work in a team-oriented environment. Good communication and interpersonal skills. Willingness to learn and adapt to new processes. Experience: Minimum 2 yrs in peptides manufacturing Qualifications Masters/Bachelors degree in Chemistry or a related field. About Us In the three decades of its existence, Piramal Group has pursued a twin strategy of both organic and inorganic growth. Driven by its core values, Piramal Group steadfastly pursues inclusive growth, while adhering to ethical and values-driven practices. Equal employment opportunity Piramal Group is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, ethnicity, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetics, or other applicable legally protected characteristics. We base our employment decisions on merit considering qualifications, skills, performance, and achievements. We endeavor to ensure that all applicants and employees receive equal opportunity in personnel matters, including recruitment, selection, training, placement, promotion, demotion, compensation and benefits, transfers, terminations, and working conditions, including reasonable accommodation for qualified individuals with disabilities as well as individuals with needs related to their religious observance or practice. About The Team Piramal Pharma Solutions (PPS) is a Contract Development and Manufacturing Organization (CDMO) offering end-to-end development and manufacturing solutions across the drug life cycle. We serve our customers through a globally integrated network of facilities in North America, Europe, and Asia. This enables us to offer a comprehensive range of services including drug discovery solutions, process & pharmaceutical development services, clinical trial supplies, commercial supply of APIs, and finished dosage forms. We also offer specialized services such as the development and manufacture of highly potent APIs, antibody-drug conjugations, sterile fill/finish, peptide products & services, and potent solid oral drug products. PPS also offers development and manufacturing services for biologics including vaccines, gene therapies, and monoclonal antibodies, made possible through Piramal Pharma Limited’s investment in Yapan Bio Private Limited. Our track record as a trusted service provider with experience across varied technologies makes us a partner of choice for innovators and generic companies worldwide. Show more Show less

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3.0 years

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Bengaluru, Karnataka, India

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As a core member of the PHY Design team, your responsibilities will span across various aspects for the ASIC frontend flow, which includes RTL development, RTL integration, maintain the timing constraint, Synthesis, Static timing analysis (STA), timing closure, power optimization, and physical verification for both of block and Chip top level You will mainly work on PHY RTL development and also be responsible the verification debug and participating in silicon bring up with the validation team. Job Requirement BSEE and at least 3 years of prior RTL develop experience required. MSEE and at-lest 1 years of prior RTL experience strongly preferred. Prior experience RTL design of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC/IP tapeouts. Strong ability on RTL debug , and logic development. Knowledge of the IP/SoC level timing closure flow and methodology. Strong command of synthesis, STA, design for test, and design methodologies Ability to handle multiple projects/tasks successfully Experience in IP/ASIC timing constraints generation and timing closure. Strong background in Constraint analysis and debug, using industry standard tools. Deep understanding and experience in timing closure of various test modes such as scan shift, scan capture, atspeed and Bist testing. Team player with a passion to innovate and can-do attitude. Self-starter and highly motivated. Desired Skills Knowledge of DDR/GDDR DRAM protocol; high-speed PHYs Experience designing or integrating IP Experience in high speed and low power digital design using advanced deep micron process. Experience with highly configurable designs We’re doing work that matters. Help us solve what others can’t. Show more Show less

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12.0 - 20.0 years

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Bengaluru, Karnataka, India

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About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Custom and Compute Solutions Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. What You Can Expect Define the sub system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification writeup Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers Implement a specification using RTL coding techniques and best practices Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc.) Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff. Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug Help develop and/or evaluate design and verification methodologies and participate in improving existing ones Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning Provide mentorship to the more junior team member What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 12 -20 years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10-18 years of experience. Experience in creating architectural, micro-architectural, and register specifications. Verilog/System Verilog RTL coding with System Verilog assertions Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up) Expertise in high speed protocols (Ethernet). Should have worked on Full Chip Integration of Complex SoC design. Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs ,Switches , Machine Learning SoCs etc. owning full chip, subsystem and block level architecture and design Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning accelerators Experience with scripting in Perl/Python/Shell Additional Compensation And Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Show more Show less

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10.0 years

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Pune, Maharashtra, India

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Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for. Responsibilities & Skills Lattice is seeking candidates for the position of Staff Software Development Engineer in FPGA place and route. This is a full-time position located in Pune, India. Summary The successful candidate will join a team designing and developing Lattice FPGA software tools. The candidate will contribute to delivering software solution for Lattice FPGA development with emphasis on Lattice synthesis tool. The candidate is expected to be an expert in FPGA synthesis core engine with knowledge on how to achieve optimal solution for a given architecture and be able to support next generation FPGA with best result in Fmax, Area, Runtime as well as memory utilization The candidate will team up with other synthesis developers and develop synthesis engine for various FPGA products. The responsibility also includes customer support, new software feature support as well as QoR improvement. The candidate is expected to maintain existing software products and interact with other teams to facilitate a value-added solution too. Accountabilities Develop logic synthesis tool for Lattice FPGA products. Synthesize logic designs from Verilog/VHDL RTL to structural netlist. Improve synthesis engine QoR. Create test designs with test benches to verify implementation and ensure high quality. Qualifications BS/MS/PhD in Electrical Engineering or Computer Science or Computer Engineering. Proficient with C/C++, Verilog/VHDL, logic design, Tcl and shell scripts. Strong background and experience in data structures and algorithms. Experience of logic design and EDA software is a must. Experience of logic optimization and technology mapping development is required. Experience of FPGA tool development is preferred. Strong written and verbal communication skills, and collaboration skill. Experience of multi-processing development is a plus. Solid understanding in FPGA architectures is a plus. 10+ years of experience in logic synthesis development in FPGA or ASIC domains Show more Show less

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5.0 - 15.0 years

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Noida, Uttar Pradesh, India

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches. Must be able to obtain and maintain a Department of Defense classified clearance Prior 5-15 years of professional experience in SoC/ASIC Digital Design with focus on Design for Test (DFT) Should possess intimate knowledge of DFT insertion flows Basic scan chain insertion using synthesis or other software tools Experience in compression scan insertion, LBIST and other scan technologies Intimate knowledge of memory build-in self-test (MBIST) Expertise in Automatic Test Pattern Generation (ATPG) to achieve design test coverage goals Debug and Analysis of failures to improve fault coverage Verification of ATPG testbenches and debugging root cause of simulation mis-compares Working knowledge of JTAG 1149.1/6, IEEE1500 and IEEE1687 Knowledge of timing analysis and equivalency checks would be added bonus Ability to work in collaborative team environment Prior experience with Cadence tools and flows is highly desirable Should be able to finish DFT tasks independently Strong problem-solving skills. Exhibit discipline, thoroughness, and methodical approach in solving problems Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers Self-driven and committed individual who can work in a fast-paced project environment We’re doing work that matters. Help us solve what others can’t. Show more Show less

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0 years

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Noida, Uttar Pradesh, India

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position: Sr Principal Software Engineer Grade: T5 Location: Noida Job Responsibilities The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications BE/BTech/ME/MTech- Computer Science or others Experience: 11-15 Yrs Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We’re doing work that matters. Help us solve what others can’t. Show more Show less

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0 years

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Nashik, Maharashtra, India

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Job Summary: We are seeking a talented and innovative Generative AI Developer to design, develop, and deploy AI-powered applications using state-of-the-art generative models. You will work with large language models (LLMs), diffusion models, and other GenAI techniques to build intelligent solutions across various domains such as content generation, chatbots, code generation, image/video synthesis, and automation tools. Key Responsibilities: Design and develop applications using Generative AI technologies (e.g., OpenAI, Hugging Face, Stability AI). Fine-tune, prompt-engineer, or integrate large language models (LLMs) and generative models for custom use cases. Collaborate with cross-functional teams (engineering, product, data science) to define requirements and deliver AI solutions. Build APIs, user interfaces, or backend systems to enable seamless interaction with AI models. Continuously evaluate, test, and improve model performance, safety, and reliability. Stay updated on the latest GenAI research, tools, and best practices. Required Skills: Strong programming skills in Python (preferred), with experience using TensorFlow , PyTorch , or other ML frameworks. Experience working with transformer models , diffusion models , or foundation models (e.g., GPT, LLaMA, DALL·E, Stable Diffusion). Familiarity with prompt engineering , API integration , and fine-tuning models. Knowledge of cloud platforms (AWS, GCP, Azure) and deployment pipelines. Experience with data preprocessing, model evaluation, and performance tuning. Preferred Qualifications: Bachelor’s or Master’s degree in Computer Science, AI, Data Science, or related fields. Experience in natural language processing (NLP), computer vision, or multimodal AI systems. Knowledge of Responsible AI principles and safety best practices. Soft Skills: Creative thinking and a passion for cutting-edge AI technologies. Strong problem-solving and analytical skills. Ability to work independently as well as part of a collaborative team. Effective communication and documentation skills. Show more Show less

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14.0 years

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Bengaluru, Karnataka, India

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The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and contribute to the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do : Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 14+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 14+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

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5.0 years

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Bengaluru, Karnataka, India

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Description Amazon Devices is an inventive research and development company that designs and develops high-profile devices like the Kindle family of products, Fire Tablets, Alexa, Fire TV, Health Wellness, Amazon Echo & Astro products. This is an exciting opportunity to join Amazon in developing its next generation SOC’s for the machine learning enabled consumer products. We are looking for exceptional engineers and engineering leaders to join our SOC development team and help develop the next generation of chips based on a revolutionary architecture. The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers. Work hard. Have Fun. Make history. Key job responsibilities In this role, you work in a team developing SoCs to be deployed in a range of Amazon devices. You will integrate industry standard and custom hardware IP and subsystems into SoCs to accelerate applications in machine learning, computer vision and robotics. You will work closely with System Architects, SoC architects, IP developers and physical design teams to develop SoCs that meets the power, performance and area goals for Amazon devices. You will help define the processes, methods and tools for design and implementation of large complex SoCs. Develop chip level and subsystem level netlists integrating IPs and new design. Work with Chip Architects to understand architecture and high-level product requirements. Convert Chip Spec into RTL using internal IPs and external IPs. Review Architecture and Design of custom IPs for integration into SOC’s. Design & Develop RTL for Interfaces, Power Management, Clocking, Reset, Test & Debug. Develop and implement methodologies for I/O, DFT, Debug, Clocking and Power Management. Provide technical leadership through lead by example, mentorship and strong team work. Basic Qualifications BS degree or higher in EE or CE or CS 5+ years or more of practical semiconductor design experience including full-chip and subsystem RTL integration. Experience in micro-architecture definition from architecture guideline and model analysis. Experience in RTL coding (Verilog/System Verilog) and debug, as well as performance/power/area analysis and trade-offs Experience in closing full-chip and subsystem timing working with synthesis and static timing analysis teams. Experience with DFT tools for scan and BIST insertion Excellent verbal and written communication skills, collaboration and teamwork skills as well as ability to contribute to diverse and inclusive teams. Preferred Qualifications MS or PhD degree in Computer Engineering/Electrical Engineering or related field. Design experience in Datapath, flow control, Arbitration, FIFO, DMA , IOMMU, SOC bus architectures, Arteris NOC interconnect, ARM’s AXI/AHB bus architecture & Protocols, Serial interfaces such as PCIe, QSPI, I2C,UART, EMMC, USB. LPDDR controller & Phy IP integration, embedded memory (SRAM, OTP etc;.) Other IP integration such as ADC, PLL, DLL, PVT sensors, GPIO & Debug (Coresight). In-depth knowledge of in one or more areas such as CPU, DSP, or programmable accelerators. SOC bring-up and post silicon validation experience Experience with early RTL power analysis. Experience with gate level testing and multi clock design practices. Successful tape outs of complex, high-volume SoCs in advanced design nodes Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Company - ADCI - BLR 14 SEZ Job ID: A2914332 Show more Show less

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12.0 years

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Hyderabad, Telangana, India

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Job Description Summary This position is responsible for designing highly complex modules, critical components or a whole application/product in its entirety. Has the vision to integrate it across multiple systems. This position works independently and is seen as a technical leader. The position is responsible for driving the design and development efforts related to architecture, scalability, availability and performance in alignment with the product/application roadmap. Job Description Roles and Responsibilities In This Role, You Will Be responsible for providing technical leadership and defining, developing, and evolving software in a fast paced and agile development environment using the latest software development m and infrastructure Provide guidance to developers with either planning and execution and/or design architecture using agile methodologies such as SCRUM Work with Product Line Leaders (PLLs) to understand product requirements & vision Drive increased efficiency across the teams, eliminating duplication, leveraging product and technology reuse Capture system level requirements by brainstorming with CTO, Sr. Architects, Data Scientists, Businesses & Product Managers Leads impact assessment and decision related to technology choices, design /architectural considerations and implementation strategy. Subject matter expert in processes and methodologies with ability to adapt and improvise in various situations. Expert in navigating through ambiguity and prioritizing conflicting asks. Expert level skills in design, architecture and development, with an ability to take a deep dive in the implementation aspects if the situation demands. Leads the architecture and design efforts across the product / multiple product versions and is an expert in architecting custom solutions off the base product. Expert in core data structures as well as algorithms and has the ability to implement them using language of choice when necessary – as a value offering. Education Qualification For Roles Outside USA 12+ year's experience relevant to software development, validation, architecting in industry space. Hands on with application software development in both monolithic and microservice architecture. Basic knowledge of UI/UX tools and development process. Experience in Grid or Energy software business (AEMS / ADMS / Energy Markets / SCADA / GIS) Desired CharacteristicsTechnical Expertise Strong expertise in JAVA and Python, Maven and Spring boot framework Strong experience with Kubernetes and microservices architectures Strong knowledge of Object-Oriented Analysis and Design, Software Design Patterns and Java coding principles . Experience in architecting and designing scalable, distributed systems architecture software products Experience in different architectural styles like SOA , Micro services and Distributed systems architecture. Experience with Data streaming technologies such as Apache Kafka Experience in Enterprise integration patterns with frameworks like Apache Camel, Talend, MuleSoft etc. Define the technical roadmap for the product and define the Design and architectural goals for the team. Excellent communication and interpersonal skills, with the ability to collaborate effectively with stakeholders at all levels. Experience in managing and influencing senior stakeholders to drive strategic decision-making. Demonstrated ability to develop and execute strategic plans Strategic Vision: Ability to see the bigger picture and align application portfolio strategies with the organization's long-term goals. Innovation: Passion for exploring and adopting innovative technologies to enhance the application landscape. Leadership Excellence: Proven ability to lead and inspire teams, fostering a culture of collaboration and continuous improvement. Strong knowledge of end-to-end SDLC & infrastructure architecture Flexible and adaptable; open to change and modification of innovation strategies agile manner. Facilitates and coaches software engineering team sessions on requirements estimation and alternative approaches to team sizing and estimation. Leads a community of practice around estimation to share best practices among teams Knowledgeable about developments in UX in various contexts, businesses, and industries. Quantifies effectiveness of design choices by gathering data. Drives accountability and adoption. Publishes guidance and documentation to promote adoption of design. Proposes design solutions based on research and synthesis; creates general design principles that capture the vision and critical concerns for a program. Demonstrates mastery of the intricacies of interactions and dynamics in Agile teams. Demonstrates advanced understanding of Lean Six Sigma principles (e.g., Black belt certified). Guides new teams to adopt Agile, troubleshoots adoption efforts, and guide continuous improvement. Provides training on Lean / Agile. Drives elimination of inefficiencies in coding process. Teaches XP practices to others. Actively embraces new methods and practices that increase efficiency and effectiveness. Business Acumen Evaluates technology to drive features and roadmaps. Maps technology trends to internal vision. Differentiates buzzwords from value proposition. Embraces technology trends that drive excellence beyond traditional practices (e.g., Test automation in lieu of traditional QA practices). Balances value propositions for competing stakeholders. Recommends a well-researched recommendation of buy vs. build solution. Conveys the value proposition for the company by assessing financial risks and gains of decisions and return on investment (ROI). Manages the process of building and maintaining a successful alliance. Understands and successfully applies common analytical techniques, including ROI, SWOT, and Gap analyses. Able to clearly articulate the business drivers relevant to a given initiative. Leadership Influences through others; builds direct and "behind the scenes" support for ideas. Pre-emptively sees downstream consequences and effectively tailors influencing strategy to support a positive outcome. Uses experts or other third parties to influence. Able to verbalize what is behind decisions and downstream implications. Continuously reflecting on success and failures to improve performance and decision-making. Understands when change is needed. Participates in technical strategy planning. Proactively identifies and removes project obstacles or barriers on behalf of the team. Able to navigate accountability in a matrixed organization. Communicates and demonstrates a shared sense of purpose. Learns from failure. Personal Attributes Able to effectively direct and mentor others in critical thinking skills. Proactively engages with cross-functional teams to resolve issues and design solutions using critical thinking and analysis skills and best practices. Finds important patterns in seemingly unrelated information. Influences and energizes other toward the common vision and goal. Maintains excitement for a process and drives to new directions of meeting the goal even when odds and setbacks render one path impassable. Innovates and integrates new processes and/or technology to significantly add value to GE. Identifies how the cost of change weighs against the benefits and advises accordingly. Proactively learns new solutions and processes to address seemingly unanswerable problems. Note Note To comply with US immigration and other legal requirements, it is necessary to specify the minimum number of years' experience required for any role based within the USA. For roles outside of the USA, to ensure compliance with applicable legislation, the JDs should focus on the substantive level of experience required for the role and a minimum number of years should NOT be used. This Job Description is intended to provide a high level guide to the role. However, it is not intended to amend or otherwise restrict/expand the duties required from each individual employee as set out in their respective employment contract and/or as otherwise agreed between an employee and their manager. Additional Information Relocation Assistance Provided: Yes Show more Show less

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3.0 years

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Lucknow, Uttar Pradesh, India

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About the Role This isn’t a regular assistant job. This is your gateway into India’s deep-tech revolution. You’ll work directly with a serial entrepreneur, innovator, and industrialists. You’ll help manage multiple high-stakes AI and tech ventures, from med-tech to electronics to education platforms. If you’ve got sharp instincts, killer follow-through, a hunger to learn, and the maturity to handle confidential matters — we’re offering you a front-row seat in the founder’s cockpit . Key Responsibilities Calendar & Workflow Management : Manage meetings, internal priorities, investor discussions, and tech reviews Startup Ops Coordination : Collaborate across ventures with respective teams Communication Handling : Draft emails, pitch decks, WhatsApp messages, LinkedIn posts, MoUs, and internal docs Stakeholder Engagement : Coordinate with tech partners, government agencies, incubators, media houses, investors Information Synthesis : Prepare briefing notes before key meetings, organize ideas from voice notes, track follow-ups Confidential Project Assistance : Be the founder’s eyes and ears across sensitive discussions and innovation strategy Documentation : Maintain founder docs, NDAs, contracts, pitch decks, startup reports Ideal Candidate Profile 1–3 years of experience in operations, executive assistance, client servicing, or startup environments Impeccable written and spoken communication (English + Hindi) Hands-on with tools like Google Workspace, WhatsApp Web, Notion, Trello, Excel, Zoom Emotionally intelligent, resilient, resourceful, and loyal Comfortable working across multiple fast-paced startups and tech verticals Can handle ambiguity and prioritize like a pro What’s In It for You Daily exposure to strategic founder-level decision-making Mentorship in tech, innovation, pitch building, startup ops, and government collaborations Opportunity to grow into Chief of Staff / Strategic Ops Manager within a year Performance-based bonuses, travel opportunities, and growth incentives A chance to shape India’s next wave of AI-native startups Educational Background Degree is optional — we value sharpness, loyalty, and ambition more than certificates Preferred: Background in business, operations, mass communication, psychology, or liberal arts Our Mission At SentientCore Systems , we’re building India’s leading AI-driven platforms across healthcare, electronics, and education. Our ventures aim to create deep-tech products with global impact. This role gives you direct access to that innovation engine. Show more Show less

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6.0 years

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Bangalore Urban, Karnataka, India

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Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply! About The Role We are looking for an experienced Principal Physical Design Engineer (CAD) to join our small but growing Processor Design group, advancing the art of high performance implementation and physical design. deal candidates will develop and maintain physical design flows for high performance designs. What You’ll Achieve Develop and support innovative physical design methodology and custom CAD Work closely with implementation and physical design (PD) team Debugging flow issues Running multiple test designs through flow on latest technologies to determine impact on technology changes to area, power and timing Automating new flow practices for general use in the design community About You M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in physical design CAD flow including synthesis, place & route, and floor planning Preferred - power distribution, static timing analysis and physical design verification Experience in hierarchical P&R and flow development. Experience with all aspects of PD including floorplanning, power-distribution, pad ring construction, placement, CTS, and routing. Understand hierarchical P&R issues including top-level floorplanning, pin-assignment, clock-distribution, critical-signal handling, hierarchical abstractions (black-box, ILM, etc.) Strong TCL/Perl/Makefile scripting knowledge. Experience in developing complex algorithms, managing, and regressing P&R flows. Familiar with chip-finishing issues (metal-fill, spare-cells, DFM rules, boundary-cells, etc.) for the latest generations of process technologies. Good communication and problem-solving skills What We’ll Offer At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits Highlights Include Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law. Show more Show less

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6.0 years

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Pune/Pimpri-Chinchwad Area

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Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply! About The Role We are looking for an experienced Principal Physical Design Engineer (CAD) to join our small but growing Processor Design group, advancing the art of high performance implementation and physical design. deal candidates will develop and maintain physical design flows for high performance designs. What You’ll Achieve Develop and support innovative physical design methodology and custom CAD Work closely with implementation and physical design (PD) team Debugging flow issues Running multiple test designs through flow on latest technologies to determine impact on technology changes to area, power and timing Automating new flow practices for general use in the design community About You M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in physical design CAD flow including synthesis, place & route, and floor planning Preferred - power distribution, static timing analysis and physical design verification Experience in hierarchical P&R and flow development. Experience with all aspects of PD including floorplanning, power-distribution, pad ring construction, placement, CTS, and routing. Understand hierarchical P&R issues including top-level floorplanning, pin-assignment, clock-distribution, critical-signal handling, hierarchical abstractions (black-box, ILM, etc.) Strong TCL/Perl/Makefile scripting knowledge. Experience in developing complex algorithms, managing, and regressing P&R flows. Familiar with chip-finishing issues (metal-fill, spare-cells, DFM rules, boundary-cells, etc.) for the latest generations of process technologies. Good communication and problem-solving skills What We’ll Offer At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits Highlights Include Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law. Show more Show less

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10.0 years

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Mumbai, Maharashtra, India

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About BNP Paribas India Solutions Established in 2005, BNP Paribas India Solutions is a wholly owned subsidiary of BNP Paribas SA, European Union’s leading bank with an international reach. With delivery centers located in Bengaluru, Chennai and Mumbai, we are a 24x7 global delivery center. India Solutions services three business lines: Corporate and Institutional Banking, Investment Solutions and Retail Banking for BNP Paribas across the Group. Driving innovation and growth, we are harnessing the potential of over 10000 employees, to provide support and develop best-in-class solutions. About BNP Paribas Group BNP Paribas is the European Union’s leading bank and key player in international banking. It operates in 65 countries and has nearly 185,000 employees, including more than 145,000 in Europe. The Group has key positions in its three main fields of activity: Commercial, Personal Banking & Services for the Group’s commercial & personal banking and several specialised businesses including BNP Paribas Personal Finance and Arval; Investment & Protection Services for savings, investment, and protection solutions; and Corporate & Institutional Banking, focused on corporate and institutional clients. Based on its strong diversified and integrated model, the Group helps all its clients (individuals, community associations, entrepreneurs, SMEs, corporates and institutional clients) to realize their projects through solutions spanning financing, investment, savings and protection insurance. In Europe, BNP Paribas has four domestic markets: Belgium, France, Italy, and Luxembourg. The Group is rolling out its integrated commercial & personal banking model across several Mediterranean countries, Turkey, and Eastern Europe. As a key player in international banking, the Group has leading platforms and business lines in Europe, a strong presence in the Americas as well as a solid and fast-growing business in Asia-Pacific. BNP Paribas has implemented a Corporate Social Responsibility approach in all its activities, enabling it to contribute to the construction of a sustainable future, while ensuring the Group's performance and stability Commitment to Diversity and Inclusion At BNP Paribas, we passionately embrace diversity and are committed to fostering an inclusive workplace where all employees are valued, respected and can bring their authentic selves to work. We prohibit Discrimination and Harassment of any kind and our policies promote equal employment opportunity for all employees and applicants, irrespective of, but not limited to their gender, gender identity, sex, sexual orientation, ethnicity, race, colour, national origin, age, religion, social status, mental or physical disabilities, veteran status etc. As a global Bank, we truly believe that inclusion and diversity of our teams is key to our success in serving our clients and the communities we operate in. Job Title Head of RISK ORM (Business / Functions) Date Department: RISK Location: Mumbai Business Line / Function RISK ORM Grade Reports to: (if applicable) VP3/Director (Local) CRO ISPL. Number Of Direct Reports 2 direct, 30+ member team Directorship / Registration No Position Purpose Located within the RISK Function of BNP Paribas (“BNPP”), the role of the Head of RISK ORM is to ensure that the components of the operational risk management framework are implemented and operating effectively within ISPL, and to provide RISK ORM management and Business senior management with relevant, synthetic, transparent, exhaustive and consistent information and a front-to-back view of operational risk across ISPL activities. To achieve this objective, this 2nd line of defense (“LOD2”) role works closely with RISK ORM Regional and Central teams and with ISPL management and stakeholders. RISK ORM ISPL mandate is to independently challenge and supervise the operational risk management framework of ISPL activities as described in level 2 procedure – Organizational framework and governance for Operational Risk Management & Permanent Control Framework. This includes control framework adequacy checks, independent challenge, proximity with the business and contribution to the sign-off process on key decisions. Due to the global and regional models applied by the BNP Paribas (“BNPP”) activities outsourced to ISPL, the role covers as well the contribution to reviews, control testing, analysis and reports carried out under the supervision of the RISK ORM Regional and Central teams. In addition, the Head of RISK ORM ISPL is responsible to ensure that the services outsourced to the RISK ORM ISPL from RSIK ORM APAC/other regions are provided with the required level of quality and within the timelines prescribed. In this context, the Head of RISK ORM ISPL, is member of the RISK ORM APAC Executive Committee and RISK ORM CIB Executive Committee, Central. The incumbent reports hierarchically to the Chief Risk Officer ISPL and with functional Regional Reporting. Key Responsibilities As the 2nd line of defense, the Head of RISK ORM has the following general responsibilities for the operational risk processes and themes within the scope of RISK ORM (including fraud, third-party risk management): ensuring consistent application of the BNPP group and Group RISK ORM methodological framework and procedures, and adapting locally as required; assist and advise the 1st Line of Defence (“LoD1”) in ISPL in this respect, in liaison with relevant RISK ORM APAC and Central teams; independent challenge of the identification and assessment of the operational risk profile (actual, potential or emerging) and of the risk mitigation framework, coming from the operating entities: either during a regular exercise, such as the review of the RCSA (Risk & Control Self-Assessment), or by participating to the decision making process (such as a validation process, granting of exemptions or the definition of a remediation plan); ensuring effective implementation of risk mitigation strategies, framework & actions with LoD1, through implementation of relevant indicators, follow up of action plans and independent challenge of controls; contribution to further raising operational risk awareness, disseminating operational risk culture and training on the risk mitigation framework; development of a strong partnership with and support LoD1 key stakeholders in ISPL on operational risk matters; independent assessment and alert highlighted to management and key stakeholders as required, on the level of risk and on the risk mitigation framework status; contribute to the opinion to be expressed by the RISK ORM teams in relation to New Activities Approval Committees (“NAC”) and Transaction Approval Committees (“TAC”) and involving activities to be outsourced to ISPL; implement and contribute to the operational risk governance bodies, such as the ISPL Internal Control Committees (and other operational risk forums); prepare and submit the relevant operational risk reports under RISK ORM ISPL direct responsibility, and contribute the 2nd level of defence opinion on the operational risk reports produced by ISPL 1st line of defence (semi-annual report on controls; annual operational risk and control report, …); act as a local correspondent for transversal themes under the responsibility of RISK ORM, such as third party risk management, and anti-fraud topics; coordinate with the relevant RISK ORM ICT and data protection officers in the Territory / Regional or Central; contribute to RISK ORM APAC & global initiatives (e.g. projects). Operate BNPP fraud alert management and investigation framework for the part assigned to the LoD2 (incl. suspected, attempted frauds), in liaison with the RISK ORM APAC Anti-fraud team; In addition, the Head of RISK ORM ISPL ensures assistance to his/her peers working in other independent LoD2 roles, including compliance, legal, finance, and tax risk management, whenever expertise on its themes or processes is required or requested. In relation to the services provided by RISK ORM ISPL to RISK ORM APAC or to other Regions, the Head of RISK ORM ISPL should ensure that they are in line with the SLA in place, the quality is satisfactory and the deadlines met. Contribute to the RISK ORM deliverables as per the Beneficiary requirements and ensure appropriate documentation across RCSA, LOD2 controls on LOD1, transversal topics, projects and initiatives. Review KPI’s as per the defined terms adhering to the SLA requirements with periodic stakeholder meetings and mutualize activities across defined activities. Stakeholder, Team and People Management Prioritize in the continuous improvement of the team's functioning, homogenizing and disseminating good practices; Managing the team's budget; Ensuring transversality and sharing of expertise and knowledge within the team; Hands on and remain updated on Group policies and procedures and therefore share expertise on high stake-concerns and/or dealing with complex issues; Representing the team, when appropriate, within cross-functional Group projects Key stakeholder management with Business, OPC, Regional and Central RISK ORM management. Drive positive Team culture aligned to BNP Paribas value system. Timely recruitment, new joiners training and define objectives aligned to RISK ORM mission statements. Continuous improvement, skill development, promote high performance value system and feedback culture and teams development aligned to Group strategy. Conflict management with the team and stakeholders considering the overall strategy, priorities. Competencies (Technical / Behavioural) Background In-depth banking products and processes knowledge Sensitivity and/or experience in operational risk Implementation of Risk governance or its equivalent environment good analytical skills, solid critical mind, capacity to synthesize / Simplify Soft Skills Strong Analytical skills & synthesis ability Strong interpersonal skills (communication, negotiation, influencing skills, teamwork) including collaborative mindset Excellent project management skills, resource management, planning and anticipation Excellent verbal and written communication skills English: fluent speaking, reading and writing (proficient) Specific Qualifications Required Tertiary-level qualification essential with CA/CPA qualifications desirable. At least 10 years of relevant experience in risk management, control function, preferably with relevant exposure to consulting or audit background. Prior experience or practical understanding in previous roles may include but not limited to Front/Middle/Back Office, Operations or Functional role(s). Knowledge and experience in financial services, including end-to-end process flows and associate risks and controls. Robust knowledge of banking products in the area of Corporate & Institutional Banking is an advantage. Show more Show less

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Bengaluru, Karnataka, India

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We Are: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. You Are: You are a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology. With over five years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges. You are proficient in scripting languages like Tcl, Unix, and Perl, and possess an in-depth knowledge of Synopsys implementation tools. Your strong communication abilities enable you to engage effectively with both customers and internal teams, ensuring precise and attentive fulfillment of their needs. Driven, self-starting, and highly collaborative, you excel in environments where you can advocate for customers and represent the product. Additionally, your ability to translate technical insights into actionable requirements for R&D teams plays a crucial role in driving innovation and strengthening Synopsys solution capabilities. What You’ll Be Doing: Providing technical support and expertise to global customers using Synopsys Implementation products. Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow. Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement. Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies. Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues. Rolling out new product methodologies by providing training and technical support to customers. The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction. Driving innovation by addressing design challenges and improving product performance based on customer feedback. Collaborating with R&D teams to advance future technologies and product features. Promoting Synopsys tools to grow market presence and adoption. Ensuring seamless EDA transitions to optimize customer outcomes. Strengthening Synopsys' reputation as a leader in silicon design and verification. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field. Expertise in Implementation Methodologies and Synopsys Tool Fusion Compiler. Knowledge of STA, Low Power Flows, Design Planning, and scripting languages like TCL/Python. Thorough understanding of RTL to GDS flows and methodologies. Excellent verbal and written communication skills. Experience in customer-facing roles is a plus. Deep domain knowledge in Synthesis, Place & Route, and timing analysis, with multiple chip tape-outs at 7nm or lower nodes. Who You Are: An effective communicator with strong interpersonal skills. A proactive self-starter who takes initiative and drives projects to completion. A collaborative team player who values teamwork and collective success. Detail-oriented and committed to delivering high-quality solutions. Adaptable and eager to learn new technologies and methodologies. The Team You’ll Be A Part Of: You will be part of a dedicated team of application engineers focused on providing top-notch technical support and solutions to our customers. The team's core purpose is to ensure customer success and satisfaction by leveraging Synopsys' cutting-edge technologies and products. You will collaborate closely with other engineers, sales teams, and product development teams to achieve our collective goals and drive innovation in the industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

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18.0 years

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Greater Hyderabad Area

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Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in AI Accelerators DNN Accelerators co-processors Interconnect Fabric Cache Coherency D2D C2C SoC Director Bangalore We are a AI semiconductor startup company headquartered in Ann Arbor, Michigan, with branches in , Taiwan and Bangalore, India. We develop highly scalable and innovative AI accelerator chips that offer high performance, low energy, and customer ease of implementation for embedded Edge AI vision-based applications and real-time data processing. Company has working HW & SW for customer sampling, with production designs in the pipeline, and a system architecture designed a future of neuromorphic computing. We are backed by excellent VC funding and is currently in a stage of rapid growth. While our tech is one of a kind we would not be able to make these advancements without our team. Our collaborative culture is one of the keys to our success. Who You Are You are an open and honest communicator who values your team You are innovative, enjoy bringing new ideas to the table and are receptive to ideas and feedback from others You’re passionate about advancing the state of the world through new technology You enjoy the ambiguity and pace of a startup environment The role This leadership role will be responsible for the global VLSI efforts at and India Site Management. It is a highly visible role reporting to Senior Director with ownership of all pre/post Si activities, leading interface with external EDA, IP, Design Service partners, managing the India site operations and a global VLSI team. What you will be doing: Ownership of pre-Si Design of the next-gen AI accelerator at driving deliverables with Design and IP Service providers, CAD tools, IPs, DFT/PD/Packaging and Test. Work closely with internal Architecture, SW, Emulation, and system board designers on product definition, microarchitecture, and design implementation. Build and manage the VLSI team of front-end design and verification engineers across India and Taiwan. Establish best practices for development, testing, reviews, and documentation. Participate in strategic discussions for product features and roadmap. What we expect to see: BS/MS in Electrical/Electronic Engineering with 18+ years of experience in VLSI, SOC design, several Si tape-out/production. Hands-on experience in front-end design, VLSI flows, and working experience for all aspects of Si tape-out, post-Si validation. Self-driven, organized with strong leadership and communication skills. Experience in building and managing teams with the ability to motivate and lead in a startup environment. Proven track record in several successful productizations. What we would be happy to see: Knowledge of AI, specifically Deep Neural Networks Application-specific accelerators or co-processors Startup experience Site Leadership experience Reports to: Site Lead Work location: Bangalore, India Hours: Full time Employment Opportunity and Benefits of Employment: We are committed to creating and fostering a diverse and inclusive workplace environment for all of our employees. We are an equal opportunity employer. Contact: Uday Mulya Technologies Email: muday_bhaskar@yahoo.com Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

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India

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Type: Part-Time, Remote Perks: US organisation, handsome compensation Compensation: Starting at $12 to $25/hour (~Rs. 1400+ per hour) if you work an average of 3 hours a day - that could be upwards of Rs 1L per month if you choose to work average 8 hours a day - that could be upwards of Rs 2.2L per month Expected (minimum) Commitment: 10 hours/week Role Overview: A well-funded AI research company is looking for candidates with strong biology knowledge, particularly at the high school and pre-medical levels. You'll solve biology problems and work with various data formats (text, images, diagrams) while explaining solutions clearly and efficiently. What does day-to-day look like: You would spend time-solving a variety of advanced high school biology problems, including those at the advanced biology level, and creating detailed explanations. You’ll also be working with multi-modal data, integrating text with images, diagrams, and other visual aids. Here are a couple of examples of the types of problems you might encounter: Analyze and explain the process of protein synthesis, providing both textual explanations and annotated diagrams. Solve a problem involving Mendelian genetics and Punnett squares, accompanied by visual representations of genetic crosses. Address challenging problems involving cell biology, physiology, genetics, and ecology, typical of the Engineering Entrance Exams or pre-medical college-level questions, utilizing a combination of textual and visual explanations. Note: A strong foundation in high school biology is required, but no other specialized domain experience is needed. Requirements: Strong high school/college-level biology skills. Excellent problem-solving abilities. Excellent written and verbal communication skills. Preferred: Bachelor’s degree in Biology or related field (or equivalent experience). Familiarity with standardized tests at the pre-medical level. Benefits: Collaborate with globally renowned experts and build a network tailored to your career aspirations. Experience the flexibility of remote work while breaking away from traditional office setups. Receive industry-standard salaries in USD. Contribute to innovative projects pushing the boundaries of technology, keeping you at the forefront of advancements. Complete an online biology assessment! Join us in revolutionizing AI and biology! ✅ Follow for more AI Jobs + Entrepreneurship Ayyush Sharma (Chhotapreneur) Growth, Strategy & Revenue Operations | A+ track record in scaling startups. Growth @ Outlier AI Show more Show less

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Exploring Synthesis Jobs in India

Synthesis is a crucial skill in various industries, including pharmaceuticals, chemistry, and technology. In India, the demand for professionals with expertise in synthesis is on the rise. Job seekers looking to pursue a career in synthesis can find numerous opportunities across different cities in the country.

Top Hiring Locations in India

  1. Mumbai
  2. Bangalore
  3. Hyderabad
  4. Pune
  5. Chennai

These cities are known for their thriving industries where synthesis professionals are in high demand.

Average Salary Range

The average salary range for synthesis professionals in India varies based on experience and location. Entry-level positions may start at around INR 3-4 lakhs per annum, while experienced professionals can earn upwards of INR 10-15 lakhs per annum.

Career Path

In the field of synthesis, a typical career path may involve starting as a Junior Synthesis Chemist or Research Associate, then progressing to roles such as Senior Synthesis Scientist, Team Lead, and eventually reaching positions like Research Manager or Director of Synthesis. Continual upskilling and gaining relevant experience are key to advancing in this career path.

Related Skills

Apart from expertise in synthesis, professionals in this field are often expected to have knowledge and skills in organic chemistry, analytical techniques, project management, and problem-solving abilities. Proficiency in data analysis tools and software can also be beneficial.

Interview Questions

  • What is the importance of synthesis in pharmaceutical research? (basic)
  • Can you explain the difference between chemical synthesis and biosynthesis? (medium)
  • How do you ensure the scalability of a synthesis process? (advanced)
  • Describe a challenging synthesis project you worked on and how you overcame obstacles. (medium)
  • What safety measures do you follow when working with hazardous chemicals in a synthesis lab? (basic)
  • How do you stay updated with the latest trends and developments in synthesis techniques? (medium)
  • Can you discuss a time when your synthesis process failed and how you troubleshooted it? (advanced)
  • Explain the role of characterization techniques in synthesis. (medium)
  • What are the key factors to consider when optimizing a synthesis reaction? (advanced)
  • How do you prioritize tasks and manage time effectively in a synthesis project? (basic)
  • Discuss a successful collaboration experience you had with a multidisciplinary team in a synthesis project. (medium)
  • What are the ethical considerations in synthesis research? (basic)
  • How do you ensure the reproducibility of synthesis results? (advanced)
  • Can you explain the concept of retrosynthetic analysis and its importance in synthesis planning? (medium)
  • What role does automation play in modern synthesis laboratories? (medium)
  • How do you handle unexpected results or deviations from the expected outcomes in a synthesis experiment? (advanced)
  • Describe a complex synthesis method you are proficient in and how you mastered it. (medium)
  • What software tools do you use for data analysis and visualization in synthesis projects? (basic)
  • How do you assess the purity of synthesized compounds? (medium)
  • Discuss a recent breakthrough in synthesis research that caught your attention. (advanced)
  • What are the challenges of scaling up a synthesis process from lab-scale to industrial-scale? (medium)
  • Can you explain the concept of green chemistry and its relevance in synthesis practices? (medium)
  • How do you ensure compliance with regulatory standards in synthesis research? (basic)
  • What are the key parameters to consider when designing a synthesis route for a target compound? (advanced)
  • How do you approach troubleshooting in a synthesis experiment when results are not as expected? (medium)

Closing Remark

As you prepare for interviews and explore opportunities in the synthesis job market in India, remember to showcase your expertise, problem-solving skills, and passion for innovation. With the right skills and attitude, you can excel in this dynamic and rewarding field. Best of luck in your job search!

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