2263 Synthesis Jobs - Page 35

Bangalore, India • Full Time Meta Infrastructure Hardware The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing efforts with capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains. ASIC Engineer, Implementation Responsibilities Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them Perform Power Estimation at RTL and Gate Level and identify power reduction opportunities Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures Perform RTL Lint and work with the Designers to create waivers Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDC Perform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and FW teams and develop reset groups and the corresponding reset sequence for RDC Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks Develop Power Intent Specification in UPF for the multi-Vdd designs Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power) Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback Minimum Qualifications Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 2+ years of experience in Design Integration and Front-End Implementation Experience with Register-Transfer Level (RTL) Synthesis and design optimization for Power, Performance, Area Knowledge of front-end and back-end ASIC tools. Experience with RTL design using SystemVerilog or other Hardware Description Language (HDL) Experience managing multiple design releases and working with cross functional teams to support and debug timing, area, power issues Experience with Electronic Design Automation (EDA) tools and scripting languages (Python, TCL) used to build tools and flows for complex environments. Experience with communicating across functional internal teams and vendors Preferred Qualifications Knowledge of Clock Domain Crossing, Reset Domain Crossing, Logic Error Correction (LEC) Synthesis Background, Timing Constraints Development, Floorplanning and Static Timing Analysis (STA) Experience Knowledge of Register-Transfer Level (RTL) coding using Verilog/System Verilog. Knowledge of Timing/physical libraries, Static Random Access Memory (SRAM) Experience with Power, Performance, Area Analysis and techniques for reducing power Knowledge of Low power design. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools Scripting and programming experience using Perl/Python, TCL, and Make About Meta Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics. Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures.

Job description Some careers have more impact than others. If you’re looking for a career where you can make a real impression, join HSBC and discover how valued you’ll be. HSBC is one of the largest banking and financial services organizations in the world, with operations in 62 countries and territories. We aim to be where the growth is, enabling businesses to thrive and economies to prosper, and, ultimately, helping people to fulfil their hopes and realize their ambitions. We are currently seeking an experienced professional to join our team in the role of Company Secretarial Assistant Principal responsibilities Contributing to the development and implementation of corporate governance best practice, corporate governance frameworks and best practices in accordance with Group and relevant industry standards. Reliable and timely arrangements made for board and committee meetings, including booking meeting rooms and facilities, preparing agendas, preparing skeleton minutes, tracking actions, drafting the annual planner, circulating papers in a timely manner and, where appropriate, (and in all cases using the templates and platforms promoted by CG&S). Collate, draft and/or review the papers to the board of directors and committees and communicate appropriate recommendations for action. Following appropriate processes and procedures and understanding statutory and regulatory obligations and support the CG&S onshore team in fulfilling the required obligations. Manage governance framework to support all relevant entity management activities as per the local laws and regulations governing the entities. Maintenance of accurate and complete statutory records on the Group Internal Corporate Database and timely filing of statutory returns with relevant regulatory/government authorities/ bodies. Accurate and timely cosec input to annual reporting documents including statutory accounts of HSBC Group companies also supporting the process for the annual review of board/committee terms of reference, effectiveness and other policies of the Group, including the SAF. Collaborate with cross functional teams across onshore and offshore stakeholders to ensure due discharge of all required compliance obligations. Suggesting improved processes to increase efficiency of processes, control costs and avoid operational losses within the Department. To assist with the on-boarding, induction and conflict of interest reviews of directors and other relevant individuals to HSBC and contribute to the development of strategic and operational objectives of CG&S function. Requirements Company Secretarial qualification with minimum relevant of 6 years experience. Strong understanding and experience of maintaining entity records and statutory registers (electronic registers experience valuable but not essential) Experience in international governance/compliance preferred. Understanding of the theory and tools of governance. Outstanding written/verbal communication and presentation skills. Be change oriented and able to cope with pressure and tight deadlines. Strong analytical capability with the ability to synthesis complex data. Able to understand and consolidate diverse and complex business information and identify / mitigate risk issues. Ability to look at the bigger picture, produce high quality work, as well as have a keen eye for detail. Accountability, responsibility and willingness to go beyond core responsibilities in times of necessity. You’ll achieve more at HSBC HSBC is an equal opportunity employer committed to building a culture where all employees are valued, respected and opinions count. We take pride in providing a workplace that fosters continuous professional development, flexible working and, opportunities to grow within an inclusive and diverse environment. We encourage applications from all suitably qualified persons irrespective of, but not limited to, their gender or genetic information, sexual orientation, ethnicity, religion, social status, medical care leave requirements, political affiliation, people with disabilities, color, national origin, veteran status, etc., We consider all applications based on merit and suitability to the role.” Personal data held by the Bank relating to employment applications will be used in accordance with our Privacy Statement, which is available on our website. ***Issued By HSBC Electronic Data Processing (India) Private LTD***

Job description Some careers have more impact than others. If you’re looking for a career where you can make a real impression, join HSBC and discover how valued you’ll be. HSBC is one of the largest banking and financial services organizations in the world, with operations in 62 countries and territories. We aim to be where the growth is, enabling businesses to thrive and economies to prosper, and, ultimately, helping people to fulfil their hopes and realise their ambitions. We are currently seeking an experienced professional to join our team in the role of Company Secretarial Assistant. Principal responsibilities Contributing to the development and implementation of corporate governance best practice, corporate governance frameworks and best practices in accordance with Group and relevant industry standards. Reliable and timely arrangements made for board and committee meetings, including booking meeting rooms and facilities, preparing agendas, preparing skeleton minutes, tracking actions, drafting the annual planner, circulating papers in a timely manner (and in all cases using the templates and platforms promoted by Corporate governance and secretariat. Collate, draft and/or review the papers to the board of directors and committees and communicate appropriate recommendations for action. Following appropriate processes and procedures and understanding statutory and regulatory obligations and support the CG&S onshore team in fulfilling the required obligations. Manage governance framework to support all relevant entity management activities as per the local laws and regulations governing the entities. Maintenance of accurate and complete statutory records on the Group Internal Corporate Database and timely filing of statutory returns with relevant regulatory/government authorities/ bodies. Collaborate with cross functional teams across onshore and offshore stakeholders to ensure due discharge of all required compliance obligations. Assist with the on-boarding, induction and conflict of interest reviews of directors and other relevant individuals to HSBC. To respond to requests for CG&S owned information and assist in CG&S centralized ad hoc projects. To contribute to the development of strategic and operational objectives of CG&S function. Proven ability of innovativeness and challenging the status quo to ensure processes and ways of working remain fit for purpose in a dynamic and ever-changing business and regulatory environment. Requirements Company Secretarial qualification with relevant of 4 years experience Strong understanding and experience of maintaining entity records and statutory registers (electronic registers experience valuable but not essential) Experience in international governance/compliance preferred. Understanding of the theory and tools of governance. Outstanding written/verbal communication and presentation skills. Be change oriented and able to cope with pressure and tight deadlines. Strong analytical capability with the ability to synthesis complex data. Able to understand and consolidate diverse and complex business information and identify / mitigate risk issues. Ability to look at the bigger picture, produce high quality work, as well as have a keen eye for detail. Accountability, responsibility and willingness to go beyond core responsibilities in times of necessity. You’ll achieve more at HSBC HSBC is an equal opportunity employer committed to building a culture where all employees are valued, respected and opinions count. We take pride in providing a workplace that fosters continuous professional development, flexible working and, opportunities to grow within an inclusive and diverse environment. We encourage applications from all suitably qualified persons irrespective of, but not limited to, their gender or genetic information, sexual orientation, ethnicity, religion, social status, medical care leave requirements, political affiliation, people with disabilities, color, national origin, veteran status, etc., We consider all applications based on merit and suitability to the role.” Personal data held by the Bank relating to employment applications will be used in accordance with our Privacy Statement, which is available on our website. ***Issued By HSBC Electronic Data Processing (India) Private LTD***

Amrita Vishwa Vidyapeetham, Chennai Campus, is inviting applications from qualified candidates for the post of Lab Technical Assistant For Details Contact : hrase.chn@ch.amrita.edu Job Title Lab Technical Assistant Location Chennai, Tamil Nadu Required Number 1 Qualification B.Sc./M.Sc. in Physics/Chemistry/Material Science/Biotechnology/Applied Sciences, Nanoscience, or Multidisciplinary Sciences. B.Tech./M.Tech. in nanotechnology/materials science or related disciplines Job description Desirable Skills: Experience in materials synthesis Familiarity with Electrospinning, Spray Pyrolysis, Dip Coating, and Spin Coating techniques Hands-on experience with lab equipment and basic instrument maintenance Lab safety compliance and inventory management Interest in supporting interdisciplinary research activities Job category Non-Teaching Last date to apply July 31, 2025

Date: 3 Jul 2025 Location: Bangalore, KA, IN, 560099 Custom Field 1: Dedicated Centre JOB DESCRIPTION Designation: Associate Scientist Job Location: Bangalore Department: DDS About Syngene Incorporated in 1993, Syngene International Ltd. is an innovation-focused global discovery, development and manufacturing organization providing integrated scientific services to the pharmaceutical, biotechnology, nutrition, animal health, consumer goods and specialty chemical industries around the world. Syngene’ s clientele includes world leaders such as Bristol-Myers Squibb, Baxter, Amgen, GSK, Merck KGaA and Herbalife. Its innovative culture is driven by the passion of its 4240- strong team of scientists who work with clients from around the world to solve their scientific problems, improve R&D productivity, speed up time to market and lower the cost of innovation. Key Responsibilities: Perform synthetic chemistry reactions, reaction workups, purification of the compounds by column chromatography, crystallization, re-crystallization techniques, preparative TLC and operating lab equipmentEnsure that the samples generated during synthesis are given for analysis and record subsequent results obtained and update the supervisor / group leader on the progress of synthesis and ensure samples are packed appropriately for shipmentRecord the observations of experiment/reaction, results, utilization of resources and other activities related to the reaction in the laboratory or e-notebook following guidelines and in timely manner and ensure that the same is handled safely and confidentially.Ensure that the instrument / equipment’s are calibrated, undergone preventive maintenance, and are kept clean before use and in case of any breakdown, report to maintenance immediatelyEnsure that they know the MSDS of the chemicals they are handling and aware of emergency response procedures in case of accidental spillage, leakage or fire and ensure proper waste segregation as per EHS normsAttend all mandatory trainings and update training records as and when trainings are completedAlways ensure confidentialityPrepare SOPs/IOPs/EOPs/OCPs when any new lab activity is identified or existing one requires updatingAny other lab responsibilities as indicated by the EHSQ team member/ supervisor / group leader.Understanding and demonstrating responsibility for safety of self & colleagues by following all safety protocols provided by SyngeneAdherence to all environment, health, and safety (EHS) policies & standards always in the workplaceWearing all PPE as required.Adherence to all procedures related to Syngene’ s data integrity policiesCompliance to Syngene’ s quality standards at all times.For running independent project(s) in the areas of immuno-oncologyFor driving the assigned project with full commitment,To champion the biology of project, establish all assays, models required to drive the project and work in collaboration with team members within the domain, across different domains and across departmentTo take active participation in running experiments, compiling the data in required format and prepare study reportsTo train and mentor other scientists in a timely mannerTo work in a collaborative fashion with research scientists from various disciplines Educational Qualification: MSc (Chemical Sciences). Experience: 5 - 8 Years Required Skills: Should be familiar with concepts of chemical synthesisFamiliar with operations of relevant apparatus - instrument / equipment.Good Knowledge of analytical techniques and analytical data interpretation.Good communication skills Behavioral Skills: Good communication skills, good presentation skills, hardworking, sincere and a team player. Must demonstrate integrity and take accountability of their work Equal Opportunity Employer: It is the policy of Syngene to provide equal employment opportunity (EEO) to all persons regardless of age, color, national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status about public assistance, veteran status, or any other characteristic protected by applicable legislation or local law. In addition, Syngene will provide reasonable accommodations for qualified individuals with disabilities.

Job Description: We are seeking an exceptionally skilled AI Voice Agent Developer to join our core team. In this role, you will architect, build, and optimize AI-powered voice agents that integrate advanced language models, voice synthesis, and speech recognition technologies. You will be instrumental in shaping the future of conversational AI and driving innovation in customer interactions. Key Responsibilities: Design and develop AI-powered voice agents from concept to production, ensuring robust, scalable, and user-friendly solutions. Integrate large language models (such as ChatGPT, Gemini, Claude) to enable intelligent, context-aware conversations. Implement and optimize speech-to-text technologies (e.g., Deepgram or similar platforms) for accurate and efficient voice input processing. Build and customize voice synthesis solutions using platforms like ElevenLabs or equivalent tools to deliver natural, expressive output. Seamlessly connect LLMs, TTS, and speech-to-text systems into cohesive, functional voice agents. Continuously optimize system performance and costs by evaluating and leveraging the best available technologies and infrastructure. Collaborate with cross-functional teams to deliver high-impact features and ensure exceptional user experiences. Required Qualifications: Proven experience in building and deploying AI-powered voice agents. Hands-on expertise with voice synthesis platforms (e.g., ElevenLabs, Google TTS, Amazon Polly). Deep proficiency in speech-to-text technologies (e.g., Deepgram, Google Speech-to-Text, Amazon Transcribe). Strong understanding of large language models and their integration into conversational systems. Demonstrated ability to integrate LLMs, TTS, and speech-to-text systems into end-to-end solutions. Programming skills in relevant languages (Python, JavaScript, Node.js, etc.) and experience with cloud platforms (AWS, Google Cloud, Azure) A mindset for cost-effective optimization—constantly seeking the best tools and practices to maximize efficiency and affordability. Preferred Qualifications: Experience with conversational AI platforms (Google Dialogflow, Amazon Lex, Microsoft Azure Bot Service, Twilio Autopilot). Familiarity with CRM and service management integrations (e.g., Salesforce, ServiceTitan). Track record of working in fast-paced, innovative environments. Why Join Us? Work at the forefront of AI and voice technology. Flexible, remote-first culture. Opportunity to shape the future of automated customer engagement. Collaborative and supportive team led by industry veterans. How to Apply : Interested candidates are invited to submit their resume and a brief cover letter highlighting relevant experience and achievements to our careers portal. This posting is crafted to attract high-caliber AI voice integration engineers with cross-platform expertise and a passion for building the next generation of conversational AI

Role Overview: We are looking for a highly skilled Generative AI Developer to join our AI innovation team. You’ll be responsible for designing, building, and fine-tuning generative AI systems using large language models (LLMs) and voice technologies. Your work will directly power autonomous AI agents across domains like telecalling, customer service, HR, and operations. This role demands deep expertise in NLP, LLMs, voice synthesis , and prompt engineering , along with a strong product mindset for building scalable automation systems. Key Responsibilities: Develop and fine-tune LLM-based agents using platforms like OpenAI, Anthropic, or open-source models (LLaMA, Mistral, etc.) Build voice-first agents using speech synthesis (TTS) and voice recognition (ASR) APIs to simulate human-like conversations. Design and test prompt stacks , custom memory tools, and persona systems to guide model behavior. Integrate models with automation tools, CRMs, messaging platforms (e.g., WhatsApp, Meta APIs), and business workflows. Continuously optimize latency, accuracy, token efficiency, and memory capabilities of deployed agents. Work with product and design teams to shape user-centric AI behavior. Explore and prototype new use cases for generative AI in sales, HR, customer support, and backend ops. Must-Have Skills: Proven experience with LLM APIs (OpenAI, Claude, Cohere, etc.) and/or open-source frameworks (LangChain, LlamaIndex, Haystack). Strong Python development skills and comfort with vector databases (Pinecone, FAISS, Weaviate). Experience with TTS (e.g., ElevenLabs, Google TTS) and ASR (e.g., Whisper, Deepgram). Expertise in prompt engineering and conversational agent design. Understanding of RAG (Retrieval-Augmented Generation) pipelines. Ability to work with RESTful APIs, webhooks, and no-code tools like Make or Zapier (optional but useful). Nice-to-Have Skills: Experience with real-time audio processing and custom voice training (fine-tuning voices). Exposure to tools like Hume, Play.ht, Voicery , or AI character tools . Familiarity with user data privacy and compliance (e.g., PDP Bill, GDPR). Hands-on experience building agents for industries like real estate, HR, or customer support . Who You Are: You think in systems and build like a hacker. You’re fascinated by conversational AI and believe in the power of automation. You love to experiment, ship fast, and iterate with data. Perks & Benefits: Work with cutting-edge LLMs and tools. Flexible remote setup. Rapid growth opportunities in a fast-scaling AI startup. Access to premium tools, API credits, and AI resources

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture, or equivalent practical experience. 4 years of experience in RTL coding. Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC). Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. Experience implementing Camera ISP image processing blocks, Video processing blocks, Machine Learning IPs, or other multimedia IPs such as Display or Video Codecs. Experience with ASIC design methodologies for clock domain checks and reset checks. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The gChips team develops custom silicon solutions that provide differentiated user experiences in Google Hardware products and optimize performance and power for the aimed use cases. This includes SoCs (systems on a chip) and other mixed signal, logic, and sensor ICs (integrated circuits) for our product portfolio. Working with the product teams and other teams throughout Google, gChips maps out the silicon requirements looking ahead two to four years. In addition, it ensures the Hardware Product Area is up-to-date on the latest chip technologies and CPU, IO and memory standards. In this role, you will be part of a team that designs interconnect IP for Pixel System on a Chip (SoCs). You will collaborate with members of architecture, software, verification, power, timing, synthesis etc. to specify and deliver quality Register-Transfer Level (RTL). You will solve technical problems with micro-architecture, RTL, low power design methodology and evaluate design options with performance, power and area. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Collaborate with architects and develop microarchitecture. Perform Verilog/SystemVerilog RTL coding, functional/performance simulation debug and Lint/CDC/FV/UPF checks. Develop RTL implementations that meet engaged power, performance and area goals. Participate in synthesis, timing/power closure and support pre-silicon and post-silicon bring-up. Travel to other sites across the world to collaborate with global teams. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

We are seeking highly motivated and talented VLSI Engineers with 2-4 years of industry experience to join our intensive Campus Training Program. This program is designed to provide in-depth, hands-on training in various aspects of VLSI design, verification, and implementation, specifically tailored to align with our current projects and future technological advancements. Upon successful completion of the training, candidates will transition into key roles within our VLSI design teams. This is an excellent opportunity for engineers looking to deepen their expertise, specialize in cutting-edge VLSI methodologies, and contribute to the development of next-generation semiconductor products. Responsibilities during the Training Program: * Actively participate in structured training modules covering advanced VLSI concepts, methodologies, and tools. * Engage in hands-on lab sessions and practical exercises to apply learned concepts. * Collaborate with trainers and mentors on assigned projects and case studies. * Complete individual and group assignments, demonstrating understanding and proficiency in VLSI sub-domains. * Participate in technical discussions, design reviews, and knowledge-sharing sessions. * Learn and adhere to industry best practices, design flows, and quality standards. * Continuously seek to improve technical skills and knowledge through self-study and provided resources. * Document progress, learning outcomes, and project work thoroughly. Key Areas of Training (may include, but are not limited to): * Digital IC Design: Advanced RTL design, low-power design techniques, clock domain crossing (CDC). * Verification: Advanced UVM/SystemVerilog methodologies, functional coverage, formal verification. * Physical Design: Floorplanning, placement, routing, clock tree synthesis (CTS), static timing analysis (STA), power integrity (PI) analysis. * Design for Testability (DFT): Scan insertion, ATPG, boundary scan. * Analog/Mixed-Signal Design (if applicable): Device physics, circuit simulation, layout considerations. * Front-End Tools: Synthesis, Linting, STA. * Back-End Tools: Place and Route, DRC/LVS. * Scripting: Perl, Python, TCL for automation. * EDA Tools: Exposure to industry-standard EDA tools from Cadence, Synopsys, Mentor Graphics (specific tools will be taught based on company needs). Required Qualifications: * Bachelor's or Master's degree in Electronics and Communication Engineering (ECE), Electrical Engineering (EE), or a related field. * 2-4 years of professional experience in VLSI design, verification, or physical design. * Strong fundamental understanding of digital electronics, circuit theory, and semiconductor physics. * Proficiency in at least one hardware description language (HDL) such as Verilog or VHDL. * Familiarity with the VLSI design flow (front-end to back-end). * Experience with scripting languages (e.g., Python, Perl, TCL) is highly desirable. * Excellent problem-solving and analytical skills. * Strong communication and interpersonal skills. * Ability to learn quickly and adapt to new technologies and methodologies. * Self-motivated with a strong desire to build a long-term career in VLSI. Preferred Qualifications (Assets): * Prior experience with specific EDA tools (Cadence Virtuoso, Synopsys DC/ICC/VCS, Mentor Graphics Calibre, etc.). * Experience with UVM methodology for verification. * Understanding of low-power design techniques. * Familiarity with formal verification concepts. * Exposure to advanced technology nodes.

Amrita Vishwa Vidyapeetham, Chennai Campus, is inviting applications from qualified candidates for the post of Lab Technical Assistant For Details Contact : hrase.chn@ch.amrita.edu Job Title Lab Technical Assistant Location Chennai, Tamil Nadu Required Number 1 Qualification B.Sc./M.Sc. in Physics/Chemistry/Material Science/Biotechnology/Applied Sciences, Nanoscience, or Multidisciplinary Sciences. B.Tech./M.Tech. in nanotechnology/materials science or related disciplines Job description Desirable Skills: Experience in materials synthesis Familiarity with Electrospinning, Spray Pyrolysis, Dip Coating, and Spin Coating techniques Hands-on experience with lab equipment and basic instrument maintenance Lab safety compliance and inventory management Interest in supporting interdisciplinary research activities Job category Non-Teaching Last date to apply July 31, 2025

Principal Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 15 years or MSEE/CE + 12 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 18-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

BD & provide technical support. Handle Multistep Synthesis. Peptides Synthesis using Solid Phase Peptide Synthesis. Design & synthesis of small molecules in API. Handling synthesis of organic chemical reactions.Knowledge on Instrumentation is a must. Annual bonus Provident fund Health insurance

Drive the next wave of generative and multimodal intelligence that powers our autonomous drywall-finishing robots. As a core member of the AI Research team, you'll turn cutting-edge vision-language and diffusion advances into robust, real-time systems that see, reason, and act on dynamic construction sites. Key Responsibilities Research & innovate diffusion-based generative models for photorealistic wall-surface simulation, defect synthesis, and domain adaptation Architect and train Vision-Language Models (VLMs) and Vision-Language Alignment (VLA) objectives that connect textual work orders, CAD plans, and sensor data to pixel-level understanding Lead development of auto-annotation pipelines (active learning, self-training, synthetic data) that scale to millions of frames and point-clouds with minimal human effort Optimize and compress models (INT8, LoRA, distillation) for deployment on Jetson-class edge devices under ROS 2 Own the full lifecycle—problem definition, literature review, prototyping, offline/online evaluation, and production hand-off to perception & controls teams Publish internal tech reports and external conference papers; mentor interns and junior engineers Qualifications & Skills 3+ years in deep-learning R\&D or Ph.D./M.S. in CS, EE, Robotics or related field with strong publication record Demonstrated expertise in diffusion models (DDPM, LDM, ControlNet) and multimodal transformers / VLMs (CLIP, BLIP-2, LLaVA, Flamingo) Proven success building large-scale data-centric AI workflows—active learning, pseudo-labeling, weak supervision Advanced proficiency in Python, PyTorch (or JAX), experiment tracking, and scalable training (PyTorch Lightning, DeepSpeed, Ray) Familiarity with edge-AI runtimes (TensorRT, ONNX Runtime), and CUDA / C++ performance tuning Strong mathematical foundation (probability, information theory, optimization) and ability to translate theory into production code Bonus: experience with synthetic data generation in Isaac Sim, or robotics perception stacks (ROS2, Nav2, MoveIt 2, Open3D) Why join us? Own breakthrough tech from idea to autonomous robot on active job-sites—your work leaves the lab fast Collaborate cross-functionally with perception, controls, and product teams & publish at top venues with company support Shape an industry by replacing dangerous, repetitive construction labor with intelligent robots Competitive salary + equity, hardware budget, flexible hybrid work, and a culture that prizes deep work and rapid iteration Requirements Vision-Language Models Vision-Language Alignment R\&D Ph.D./M.S. in CS, EE, Robotics TensorRT, ONNX Runtime CUDA / C++

Job Description Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. As a Staff IC Design Engineer at Renesas India, you will play a crucial role in the design and development of advanced integrated circuits that power our innovative MCU products. You will leverage your expertise in IC design to lead complex projects, mentor junior engineers, and drive the evolution of our design methodologies and processes. Responsibilities Lead the RTL design of subsystems in MCU SoCs, ensuring they meet performance, power, and area specifications Support SoC integration and delivery of subsystem views to Back-end and Design verification team Own Quality Checks and support Functional Verification of the owned blocks Collaborate with cross-functional teams, including system architects and software engineers, to define specifications and ensure seamless integration Preferred Experience Micro Architecture Design, High Level Digital Design, RTL coding. Experience in owning complex IPs or Subsystem designs in ASIC Good understanding and experience in using RTL QC tools such as Spyglass CDC/RDC Qualifications Required and Preferred Qualifications Required Bachelor's degree in Electronics and communication, Electrical Engineering, Computer Engineering, or a similar technical field and with a proven track record of delivering high-quality designs BSEE a minimum of 8 years of digital design with a proven track record of delivering high-quality designs Expertise in RTL design using Verilog/VHDL and familiarity with analog/mixed-signal design concepts Strong understanding of digital design principles and methodologies, timing analysis, and verification methodologies Experience with industry-standard EDA tools for synthesis, simulation, and static timing analysis Scripting experience in Shell, Perl, Python and TCL is a plus Preferred Experience with low-power design techniques and methodologies Familiarity with SoC design and integration Familiarity with synthesis and timing constraints Additional Information Soft Skills and Cultural Fit Strong communication skills to articulate design concepts and collaborate with multi-disciplinary teams Proactive attitude with a commitment to continuous learning and professional development A collaborative mindset with the ability to thrive in a fast-paced, dynamic environment Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Job Description Seeking a highly motivated and innovative Senior digital design engineer with knowledge of ASIC development flow. As a Senior Staff IC Design Engineer at Renesas India, you will play a crucial role in the design and development of advanced integrated circuits that power our innovative MCU products. You will leverage your expertise in IC design to lead complex projects, mentor junior engineers, and drive the evolution of our design methodologies and processes. Responsibilities Lead the RTL synthesis and constraints generation/validation for MCU SoCs, ensuring they meet performance, power, and area specifications Develop and implement innovative implementation methodologies and tools to enhance productivity and design quality Be the bridge between Backend and Frontend teams to reconcile on hand-off and timing issues Conduct thorough design reviews and provide constructive feedback to peers and junior engineers Collaborate with cross-functional teams to not only resolve collateral issues but also to improve the overall PPA Support Low Power Implementation Support formality checks Preferred Experience Experience in owning RTL synthesis and constraints for complex IPs/SS/SoC Experience in owning or supporting STA at full-chip level Exposure to latest methodologies in constraints generation, promotion/demotion and validation Familiarity with Low Power Implementation flows Qualifications Required and Preferred Qualifications Required Bachelor's degree in Electronics and communication, Electrical Engineering, Computer Engineering, or a similar technical field and with a proven track record of delivering high-quality designs BSEE degree and 12+ years of experience in IC design, or MSEE (or PhD) with 9+ years of experience and with a proven track record of delivering high-quality designs Experience with industry-standard EDA tools for synthesis, constraints validation and static timing analysis Strong understanding of digital design principles and methodologies, timing analysis, and verification methodologies Ability to mentor and guide junior engineers in IC design best practices and methodologies Scripting experience in Shell, Perl, Python and TCL is a plus Good communication skills for interacting between different design groups cross functional groups are required Preferred Experience with low-power design techniques and methodologies Familiarity with SoC design and integration Some level of understanding of DFT flows and steps Exposure to Automotive SoC designs Additional Information Soft Skills and Cultural Fit Exceptional problem-solving skills with the ability to analyse complex design challenges Proactive attitude with a commitment to continuous learning and professional development A collaborative mindset with the ability to thrive in a fast-paced, dynamic environment Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

University: Delft University of Technology (TU Delft) Country: Netherlands Deadline: 2025-07-31 Fields: Chemistry, Materials Science, Chemical Engineering, Mechanical Engineering, Biomedical Engineering Delft University of Technology (TU Delft) invites applications for two PhD positions in the field of Soft Matter Imaging and Mechanics. The successful candidates will join a multidisciplinary team to develop advanced methods for imaging and sensing dynamic phenomena in soft and bioinspired materials. The research will involve close collaboration with experts in chemistry, mechanics, and biomedical sciences to create innovative sensory chemistry for the study of highly dynamic and compliant materials. Available Positions – Position 1: Requires experience in organic synthesis and physical chemistry. An affinity for physics and engineering is an advantage. – Position 2: Requires experience in mechanics of materials. An affinity for machine learning is beneficial. Requirements – Master’s degree in Chemistry, Chemical Engineering, Materials Science, or related disciplines. – Strong command of organic synthesis and photophysical characterization techniques. – Demonstrated ability to work collaboratively within multidisciplinary teams. – When applying, please specify clearly which PhD position you are interested in. Application Procedure Interested candidates should apply no later than 31 July 2025. Please submit your application via the provided TU Delft application portal, including the following documents: – Curriculum Vitae (CV) – Transcript of grades/courses – Cover letter For Further Information, Please Contact – Dr. Georgy Filonenko (G.A.Filonenko@tudelft.nl) – Dr. Sid Kumar (Sid.Kumar@tudelft.nl) More details and application link: https://careers.tudelft.nl/job/Delft-PhD-Position-Researcher-in-Soft-Matter-Imaging-and-Mechanics-2628-CD/824362502/ Get the latest openings in your field and preferred country—straight to your email inbox. Sign up now for 14 days free: https://phdfinder.com/position-alert-service/ We’re an independent team helping students find opportunities. Found this opportunity helpful? Support us with a coffee! Also See PhD and Postdoctoral Positions in Remote Sensing of the Arctic Postdoctoral Position in Wearable Optical Sensing Technology PhD and Postdoctoral Opportunities in Experimental & Computational Mechanics of… PhD Position in Geodesy and Satellite Radar Interferometry (InSAR) Postdoctoral Researcher in Sustainable Medium Manganese Steels Development

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Required technical and professional expertise . 6 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

GenAI Automation Engineering & Automation Build and deploy automation solutions using LLMs and GenAI platforms (e.g., OpenAI, Hugging Face, Azure OpenAI). Develop APIs, microservices, and integration layers to embed GenAI into enterprise systems. Fine-tune and optimize models for tasks like summarization, document generation, code synthesis, and conversational AI. Monitor model performance, manage drift, and implement feedback loops for continuous improvement. Ensure compliance with data governance, security, and responsible AI standards. Required Qualifications Bachelors or Masters degree in Computer Science, Engineering, or related field. 5years of experience in software engineering, with 2+ years in AI/ML or automation. Proven experience leading technical teams or projects in AI/ML or automation domains. Strong proficiency in Python, cloud platforms (AWS, Azure, GCP), and ML frameworks (PyTorch, TensorFlow). Deep understanding of LLMs, NLP, and GenAI model lifecycle. Excellent communication and stakeholder management skills. Preferred Qualifications Experience with RPA tools (e.g., UiPath, Automation Anywhere). Knowledge of MLOps, prompt engineering, and model fine-tuning. Familiarity with enterprise architecture and scalable AI deployment strategies. Contributions to open-source AI projects or technical publications.

All Positions Speech Architect Noida | 5-8 years Apply Now Welcome to BUSINESSNEXT, where we believe in maximizing your true potential while doing something purposeful. Our commitment to innovation and forward-thinking is reflected in everything we do, and we're looking for like-minded individuals to join our team. If you're looking for a rewarding career in a company that values your creativity, we invite you to explore this opportunity. The Opportunity We are looking for smart & creative candidates who want to Learn and Grow, and to Innovate because they love the challenge of solving business problems. BusinessNext is looking for bright and motivated Data Engineers to play a key role in building the next generation Enterprise Big Data Platform. Within this realm of cutting-edge technology, you'll play a pivotal role in shaping the future of digital innovation on a global scale. Objectives Aligned To This Role As a Speech Architect, you will lead the development of cutting-edge speech recognition and processing systems, focusing on complex tasks such as speaker diarization, automatic speech recognition (ASR), Sentiment/Emotion recognition and transcription. You will guide a team of engineers and collaborate closely with other departments to deliver high-impact solutions. What would you do? Leadership: Lead and mentor a team of speech engineers, providing technical guidance and ensuring the successful delivery of projects. System Design: Architect and design end-to-end speech processing pipelines, from data acquisition to model deployment. Ensure systems are scalable, efficient, and maintainable. Advanced Modeling: Develop and implement advanced machine learning models for speech recognition, speaker diarization, and related tasks. Utilize state-of-the-art techniques such as deep learning, transfer learning, and ensemble methods. Research and Development: Conduct research to explore new methodologies and tools in the field of speech processing. Publish findings and present at industry conferences. Performance Optimization: Continuously monitor and optimize system performance, focusing on accuracy, latency, and resource utilization. Collaboration: Work closely with product management, data science, and software engineering teams to define project requirements and deliver innovative solutions. Customer Interaction: Engage with customers to understand their needs and provide tailored speech solutions. Assist in troubleshooting and optimizing deployed systems. Documentation and Standards: Establish and enforce best practices for code quality, documentation, and model management within the team. Required Skills Excellent knowledge in Python / Java programming. In-depth knowledge of speech processing frameworks like, Wave2vec, Kaldi, HTK, DeepSpeech and Whisper. Experience with NLP, STT, Speech to Speech LLMs and frameworks like Nvidia NEMO, PyAnnote. Proficiency in Python and machine learning libraries such as TensorFlow, PyTorch, or Keras. Experience with large-scale ASR systems, speaker recognition, and diarization algorithms. Strong understanding of neural networks, sequence-to-sequence models, transformers and attention mechanisms. Familiarity with NLP techniques and their integration with speech systems. Expertise in deploying models on cloud platforms and optimizing for real-time applications. Good To Have Experience with low-latency streaming ASR systems. Knowledge of speech synthesis, STT (Speech-to-Text) and TTS (Text-to-Speech) systems. Experience in multilingual and low-resource speech processing. Educational Qualifications Bachelor’s, Master’s or Ph.D. in Computer Science, Electrical Engineering, or a related field. Good understanding of current technology trends along with ultra-scalable systems Proficient in effectively communicating with internal stakeholders across various domains, including technology and business. Meet The Team Connect with the team that loves the challenge of solving business problems, just like you! Ravi Kumar SVP Product Group Why BusinessNext? WIIFM, you ask? 😊 Well, lots of real, get-your-hands-dirty gigs, building cool products for the BFSI industry that is rapidly digitizing. Expect a challenging work experience that you’re unlikely to get in a Services Company. Come, #Unlimit your true Potential today to be #UpForTomorrow We exist for growth and development: We’re a company that is built on a Coaching Culture, committed to supporting employees to reach their full potential, helping them achieve their professional goals while contributing to the Moonshot. We thrive on clear, lucid Objectives & Key Results (OKRs). A trusting, transparent relationship where an Individual’s OKRs, lock into the department’s which, in turn, lock into the Company’s! We thrive by being proactive: Our Brand tagline "Up For Tomorrow" implies being proactive and forward-thinking, and our Culture Philosophy of "Unlimit" speaks of having no limits on what one can achieve. You can expect a culture that will constantly encourage you to take initiative and be proactive in your career, taking charge of your own professional development. Caring for People is our Business, and a Values-led Culture is our Profit. We just happen to use tech in the process. We’re a bunch of friends with Benefits: Coaching Sessions, Training and development opportunities, flexible working hours, and remote work options are just some of the perks of this Culture. Designed around you the employee so you can take advantage of opportunities to grow and develop and be ready for the future. Some quick facts Ours is an inspiring Garage-to-Unicorn Product story that has been scripted by gifted technologists who’re just like you. We are among the fastest growing SaaS companies in India, especially in the BFSI industry, with a global footprint, serving over 1 million+ users across 50+ countries Our clientele is based out in Asia Pac, USA, Middle East, South Africa, Australia, etc. Our product engages millions of global users, and we keep adding millions every month We are on a mission We sure are - on an 8-year Moon-shot Mission to be specific. We want to accelerate the World’s transition to intuitive, digital, and joyful financial experiences and become a Decacorn in the process. Does this excite you, then join us! 😊 Apply Now

Job Title: Chemical Engineer – Process Development & Pilot Plant (POC Setups) Location: Bodhgaya, Bihar (On-Site) Job Type: Full-time Joining Type: Immediate preferred About Us Technoculture Research is re-imagining how the world measures health. We build micro-scale electrochemical laboratories that place lab-grade accuracy directly in the hands of clinicians, community health workers and even patients at home. Our platform fuses microfabricated electrodes, novel surface chemistries and microfluidics to run protein, nucleic-acid and metabolite assays within minutes. By replacing costly optical detection with electron sensing, we slash instrument and per-test costs by roughly an order of magnitude, making precision diagnostics truly accessible. Our mission is clear: make diagnostics abundant so that every critical health decision is guided by immediate, affordable results, wherever care happens. Looking Ahead: Bio-Energy R&D Leveraging the same core strengths in electrochemistry, biotechnology and process miniaturisation, Technoculture Research is now exploring bio-energy technologies—from electrochemical green-hydrogen and ammonia synthesis to sustainable liquid-fuel production. This expansion will allow us to apply our platform science to the urgent challenge of low-carbon energy and chemicals, while staying true to our ethos of cost-compressed, data-rich solutions. www.technoculture.io Job Description We are seeking a Chemical Engineer with hands-on experience in experimental process development, particularly for the Haber-Bosch process (for ammonia production), water electrolysis (produces green hydrogen from water using renewable electricity), and Fischer-Tropsch synthesis (central for converting syngas (a mixture of CO and H₂) into synthetic liquid hydrocarbons, which include sustainable aviation fuels (SAF) and other synthetic fuels). The ideal candidate will be responsible for establishing and operating proof-of-concept (POC) reactor setups for advanced gas fermentation, sustainable aviation fuel (SAF), Bio-CNG/Biogas, and Biodiesel synthesis projects. Responsibilities Design, assemble, and operate laboratory and pilot-scale reactors for chemical processes, including Haber-Bosch, water electrolysis, and Fischer-Tropsch. Develop and optimise process conditions for gas fermentation and renewable fuel production. Conduct experiments, analyse results, and troubleshoot process issues to ensure successful POC demonstrations. Perform financial and techno-economic analysis for process scale-up and commercial viability. Utilise process simulation software (preferably Aspen) for modeling, optimisation, and scale-up studies. Prepare technical documentation, experimental protocols, and project reports. Collaborate with multidisciplinary teams to achieve project milestones and ensure safety and regulatory compliance. Qualifications Master’s/ PhD degree in Chemical Engineering or a related field. Proven hands-on experience with chemical process reactors and laboratory setups. Preferred Qualifications Solid understanding of the fundamentals of Haber-Bosch, water electrolysis, and Fischer-Tropsch processes. Experience in gas fermentation, SAF, Bio-CNG/Biogas, or Biodiesel synthesis is highly desirable. Proficiency in process simulation tools (Aspen or similar software). Ability to perform financial analysis related to process development and scale-up. Personal Attributes Strong analytical, problem-solving, and communication skills. Detail-oriented and methodical in experimental work. Excellent team collaboration and communication skills. Ability to manage time and multiple priorities in a research setting. Eagerness to learn and adapt in a dynamic environment.

About DashamLabs At DashamLabs, we’re on a mission to making advanced materials a commercial reality. Inspired by India’s scientific legacy, we develop and scale advanced material technologies that bridge lab-scale discovery with industrial impact. Our first product: a breakthrough high-performance insulation material. What You’ll Do Join us at the ground floor as we scale our proprietary material from lab to commercial manufacturing. You’ll work at the intersection of materials science, chemical engineering, and operations. Your responsibilities will include: Setting up pilot and lab-scale systems (equipment, layout, safety, workflows) Scaling up synthesis and process operations from lab to pilot to production Running experiments and optimizing for throughput, energy efficiency, and quality Collaborating with R&D, vendors, and plant operations for smooth tech transfer Supporting commissioning, automation, and continuous improvement initiatives Who You Are We’re looking for passionate, hands-on engineers who are excited to build something from scratch. Minimum qualifications: M.Tech / M.E. / M.Sc. / PhD in Chemical Engineering, Materials Science, Ceramics, Polymers, Nanotech, or related 0–5 years of experience in process development, pilot plant work, or manufacturing Bonus if you have: Experience in plant/process scale-up, thermal systems, reactors, or solvent handling Familiarity with CAD tools, process modelling, or industrial prototyping Strong documentation, safety, and analytical capabilities Why Join Us? This is not just a job—it’s a chance to build a deep-tech company from the ground up . Work on cutting-edge Indian innovation with global potential Solve real problems at the lab–factory–market interface Own your work, grow fast, and make meaningful impact Be part of a close-knit, purpose-driven team shaping the future of manufacturing in India If this sounds like you, apply here or reach out at ankit@dashamlabs.com

Job Description Summary Lead FPGA Engineer will be responsible for leading/executing complex FPGA design projects and solutions. You will work in a global environment with skilled team of engineers creating and improving a state-of-the-art platform for use in every kind of power generation application Job Description Essential Responsibilities Select the FPGA, CPLD family and chip suitable for the application. Develop FPGA design requirements based on system requirements document. Define FPGA interfaces with other circuitry along with hardware design engineer. Do FPGA programming, synthesis and simulation, timing analysis and optimization. Validate system along with the hardware and firmware design engineers to confirm about functionality, reliability, efficiency, compatibility and responsiveness. Work on FPGA-based solutions for interfacing real-time microprocessor systems to high speed Networks and I / O Actively drive design rigor and participate in relevant formal design reviews Contribute to board level reliability analysis and system FMEA Identify opportunities to modify/author DPs Identify cost-out opportunities and make technical proposals Lead/ Participate on teams assigned to address organizational initiatives. Qualifications/Requirements Bachelor / Masters in Electronics Engineering, Electronics & communication, Computer Engineering or equivalent. 8-10 years of experience in FPGA design, digital circuit design, system level analysis, Product Development life cycle including system and Sub-system Design Proven analytical and organizational ability Strong interpersonal and leadership skills Strong oral and written communication skills Effective problem identification and solution skills Desired Characteristics Hands on experience in Verilog, VHDL, FPGA development tools, including design, synthesis, simulation, timing analysis, optimization, packaging and debug Expertise in Signal Integrity and simulations Knowledge about different communication techniques Hands on experience in developing the interfaces between FPGA and other devices like microprocessors, ADCs, transceivers and so on. Strong experience of High-speed digital designs, Proficiency in ECAD suite of tools either from Mentor Graphics or Cadence would be an added advantage. Should have a good understanding of EMI/EMC concepts related to high speed designs and debug issues. Experience working with Industry protocols like MODBUS, FF,CAN, Ethernet Ability to coordinate several projects simultaneously. Experience in Agile methodology. Additional Information Relocation Assistance Provided: Yes

Summary The Analyst for Medical Analytics will support advanced analytics projects to guide strategic decisions within the domains of Field Medical Excellence, Publications Excellence, Drug Awareness, and Medical Engagements. This role focuses on data synthesis, exploratory analytics, identifying insights, and delivering impactful results to stakeholders. About the Role Key Responsibilities Create and deliver below customer requirements as agreed SLAs -Deliver services through structured project management approach with appropriate documentation and communication throughout the delivery of services. Quality Assurance: Ensure deliverables for quality and accuracy are of the highest order. On-time project delivery within stipulated deadlines -Support in creation and maintenance of standard operating procedures (SOPs) -Support in developing and maintaining knowledge repositories that captures qualitative and quantitative reports. Participate in various knowledge sharing sessions that Good customer satisfaction scores - Ability to manage multiple stakeholders / projects - Delivery on time Essential Skills Education (minimum/desirable): MBA with Graduate / Postgraduate in Medicine (MD/MBBS/BDS) Pharmacy / Life Sciences Experience: Experience (1-3 years) in business analytics in a market research firm or pharmaceutical company or Pharma KPO Should understand pharmaceutical business including its regulatory environment Strong analytical thinking with problem solving approach, should have worked in an international company with exposure to working in cross-cultural environment Strong and proactive business results-focus, and proven track record to provide insights that increase productivity Why Novartis: Helping people with disease and their families takes more than innovative science. It takes a community of smart, passionate people like you. Collaborating, supporting and inspiring each other. Combining to achieve breakthroughs that change patients’ lives. Ready to create a brighter future together? https://www.novartis.com/about/strategy/people-and-culture Join our Novartis Network: Not the right Novartis role for you? Sign up to our talent community to stay connected and learn about suitable career opportunities as soon as they come up: https://talentnetwork.novartis.com/network Benefits and Rewards: Read our handbook to learn about all the ways we’ll help you thrive personally and professionally: https://www.novartis.com/careers/benefits-rewards Division US Business Unit Universal Hierarchy Node Location India Site Hyderabad (Office) Company / Legal Entity IN10 (FCRS = IN010) Novartis Healthcare Private Limited Functional Area Marketing Job Type Full time Employment Type Regular Shift Work No Accessibility and accommodation Novartis is committed to working with and providing reasonable accommodation to individuals with disabilities. If, because of a medical condition or disability, you need a reasonable accommodation for any part of the recruitment process, or in order to perform the essential functions of a position, please send an e-mail to [email protected] and let us know the nature of your request and your contact information. Please include the job requisition number in your message. Novartis is committed to building an outstanding, inclusive work environment and diverse teams' representative of the patients and communities we serve.

Amex GBT is a place where colleagues find inspiration in travel as a force for good and – through their work – can make an impact on our industry. We’re here to help our colleagues achieve success and offer an inclusive and collaborative culture where your voice is valued. Create your journey at Amex GBT! As a Neo Software Engineer, you’ll join our highly skilled R&D Neo team ! Neo is an online booking tool (OBT) as well as an expense tool for business travel through a SaaS deployment. It allows a user to search and book a business trip in a user friendly and high-performance web application. It gives him access to different transport modes and travel suppliers within the travel policy set by his company. It then gives them the opportunity to claim additional expenses for reimbursement. The service allows to capture VAT, compute policies and reimbursement rules, and much more. Our scrum teams are empowered to develop a leading product with some strong focus on usability, performance, and scalability in an international environment. We’re most proud of our warm and inclusive culture, innovation in the travel & expense tech space, internal promotions, and career advancement opportunities. We’re excited for you to experience our values (People, Passion, and Progress) in action, and look forward to your application. What You’ll Do on a Typical Day Work in a SCRUM team Design, develop and test new applications and features Participate in the evolution and maintenance of existing systems Contribute in the deployment of features Monitor the platform Propose new ideas to enhance the product either functionally or technically What We’re Looking For 8-10yrs of Operational knowledge of C# or python development, as well as in Docker Experience with PostgreSQL or Oracle Knowledge of AWS S3, and optionally AWS Kinesis and AWS Redshift Real desire to master new technologies Unit test & TDD methodology are assets Team spirit, analytical and synthesis skills Passion, Software Craftsmanship, culture of excellence, Clean Code Fluency in English (multicultural and international team) What Technical Skills You’ll Develop C# .NET and/or Python Oracle, PostgreSQL AWS ELK (Elasticsearch, Logstash, Kibana) GIT, GitHub, TeamCity, Docker, Ansible #GBTJobs Location Gurgaon, India The #TeamGBT Experience Work and life: Find your happy medium at Amex GBT. Flexible benefits are tailored to each country and start the day you do. These include health and welfare insurance plans, retirement programs, parental leave, adoption assistance, and wellbeing resources to support you and your immediate family. Travel perks: get a choice of deals each week from major travel providers on everything from flights to hotels to cruises and car rentals. Develop the skills you want when the time is right for you, with access to over 20,000 courses on our learning platform, leadership courses, and new job openings available to internal candidates first. We strive to champion Inclusion in every aspect of our business at Amex GBT. You can connect with colleagues through our global INclusion Groups, centered around common identities or initiatives, to discuss challenges, obstacles, achievements, and drive company awareness and action. And much more! All applicants will receive equal consideration for employment without regard to age, sex, gender (and characteristics related to sex and gender), pregnancy (and related medical conditions), race, color, citizenship, religion, disability, or any other class or characteristic protected by law. Click Here for Additional Disclosures in Accordance with the LA County Fair Chance Ordinance. Furthermore, we are committed to providing reasonable accommodation to qualified individuals with disabilities. Please let your recruiter know if you need an accommodation at any point during the hiring process. For details regarding how we protect your data, please consult the Amex GBT Recruitment Privacy Statement. What if I don’t meet every requirement? If you’re passionate about our mission and believe you’d be a phenomenal addition to our team, don’t worry about “checking every box;" please apply anyway. You may be exactly the person we’re looking for!