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Marvylogic

7 Job openings at Marvylogic
Senior Mulesoft Developer maharashtra 5 - 9 years INR Not disclosed On-site Full Time

The ideal candidate for the Senior Mulesoft Developer position should have at least 5-8 years of experience and active working knowledge of Mulesoft version 3.7+. In this role, you will be responsible for developing custom reusable connectors and creating complex Mule flows that are memory efficient and adhere to basic reusability principles. You should have a detailed understanding of OOTB transformers and connectors that come packaged with Mule, as well as strong JSON and ODBC skills, including streaming reads. Additionally, you should possess a solid understanding of Mule Expression Language (MEL) and be able to differentiate between parametrized and dynamic use of Mule variables, especially when working with DB connectors. Experience with deployment, including deploying Mule packages via Mule standalone engine and MMC, is also required. Joining our team at MarvyLogic will not only provide you with the opportunity to work with cutting-edge technologies and solutions that have a positive impact on businesses but also encourage you to pursue your individual passions. You will gain valuable insights into a wide range of industries and emerging technologies, helping you develop futuristic and impactful solutions. Working at MarvyLogic may even contribute to your personal growth and lead you towards a more fulfilling life. This position is based in Bangalore, Ahmedabad, Mumbai, or Chennai.,

SMTS/Principal FPGA Design Engineer karnataka 10 - 14 years INR Not disclosed On-site Full Time

The culture at our organization is defined by the people who contribute to it. We foster a culture of passion for technology solutions that have a tangible impact on businesses. Additionally, we prioritize the pursuit of individual passions by our team members. Collaborating with us offers you the opportunity to gain a deep understanding of various industries and cutting-edge technologies. This knowledge enables us to develop forward-thinking and impactful solutions. Moreover, being a part of MarvyLogic can facilitate personal growth, leading you towards a more enriching and fulfilling life. To be considered for this role, you should possess the following qualifications: - A minimum of 10 years of experience in FPGA Design and Debug, preferably working with Xilinx Ultrascale+ and Virtex7 - Proficiency in utilizing tools such as Xilinx Vivado/Coregen/Synplify and developing/maintaining Timing/IO constraints (UCF) - Experience with managing multiple high-speed clock domains and integrating third-party IP onto Xilinx transceivers - Familiarity with working on FMC daughter-cards, High-Speed Cables/Connectors, etc. - Extensive debugging experience using Xilinx ILA, Protocol Analyzers, Oscilloscope, Logic Analyzers, etc. - Proficiency in PERL/TCL scripting and database management between FPGA and ASIC RTL - Knowledge of front-end RTL tools such as RTL Simulation, Synthesis, DFT, Timing - Ability to modify/adapt RTL designs for FPGA implementation and optimize designs to achieve FPGA area/performance goals - Collaboration with DV and Firmware/Software teams throughout the validation process, including post-silicon bring-up Your responsibilities in this role will include: - Effectively collaborating and communicating with multi-site teams - Reviewing FPGA netlist releases (block/chip) and overseeing ASIC product life cycle stages, including requirements, design, implementation, testing, and post-silicon validation If you meet the specified qualifications and are ready to take on these responsibilities, we welcome you to apply for this challenging and rewarding opportunity.,

Sr Developer/Lead - .NET maharashtra 3 - 7 years INR Not disclosed On-site Full Time

The culture at the company revolves around its people, who are encouraged to have a passion for technology solutions that have a significant impact on businesses. There is also a focus on supporting individuals in pursuing their own passions. Working at the company provides an opportunity to gain a deep understanding of various industries and emerging technologies, enabling the creation of futuristic and impactful solutions. Moreover, the experience of being part of the team at MarvyLogic can contribute towards personal growth and lead to a more fulfilling life. The ideal candidate for this role should have 3-7 years of experience and be located in Mumbai, Bengaluru, or Bangalore. They should possess the following skills and qualifications: - Proficiency in identifying and defining non-functional requirements and designing systems. - Strong experience in Object-Oriented Analysis and Design (OOAD) and effectively applying Design patterns. - Expertise in the .NET 4.0 framework, ASP .NET, and C#. Familiarity with advanced frameworks such as WCF, WWF, and WPF is essential. Front-end technologies like ASP, HTML, JavaScript, and Ajax are required but not sufficient on their own. - Good understanding of concepts like Caching, Reflection, Parallel programming, Remoting, Garbage collection, Threading, and Web services within the context of .NET systems. - Experience in developing products end-to-end, including deployment at customer premises and generating revenue from the product. - Proficiency in at least one Microsoft server system (SharePoint, BizTalk, Commerce, etc.). - Experience in performance testing and optimization of .NET applications. - Strong experience in at least one Relational Database Management System (RDBMS) such as Oracle, MS-SQL, or MySQL. - Experience in creating and reviewing technical documents like Design specifications, Deployment architecture, Workload modeling, etc. - Excellent understanding of software development methodologies and architectures. - Additional experience in areas like Infrastructure sizing, Capacity planning, Performance modeling, or Cloud Computing would be considered a definite advantage.,

SMTS/Principal ASIC Design Engineer karnataka 10 - 14 years INR Not disclosed On-site Full Time

The culture at MarvyLogic is defined by its people. We foster a culture of passion for technology solutions that have a direct impact on businesses. We prioritize the pursuit of individual passions among our employees. Working with us offers you the opportunity to gain a comprehensive understanding of various industries and cutting-edge technologies. This exposure enables us to develop solutions that are not only forward-thinking but also highly impactful. Being a part of MarvyLogic can facilitate your personal growth, leading you towards a more fulfilling life. You should possess a Graduate Degree in Electrical/Electronics Engineering with over 10 years of experience (a post Graduate degree would be an added advantage). The job location is in Bengaluru/Bangalore. As a candidate for this position, you are expected to have a minimum of 10 years of experience in ASIC RTL Design and demonstrate proficiency in Verilog/System Verilog. Your expertise should extend to working with multiple clock and power domains. You should have a strong background in integrating and validating high-speed PCIe IP cores, including controllers and PHY SerDes. Experience with PCIe protocol analyzers and debugging is essential, as well as familiarity with PCIe driver and application software for both Linux and Windows environments. Your responsibilities will include RTL design and implementation of interface logic between PCIe controllers and DMA engines for high-performance networking applications. You will be required to create block-level micro-architecture specifications detailing interfaces, timing behavior, design tradeoffs, and performance objectives. Additionally, you will need to review vendor IP integration guidelines and ensure compliance throughout the design process. Running integrity check tools such as Lint/CDC/DFT/LEC/UPF to meet coding and implementation standards will also be part of your role. You will play a crucial role in the design verification process by reviewing test plans, coverage reports, writing assertions, and implementing design modifications to enhance verification quality. Furthermore, you will be involved in the physical implementation process by providing synthesis constraints, timing exceptions, and making design updates to achieve area, power, and performance targets. Key Responsibilities: - Collaborate effectively with multi-site teams - Conduct reviews of FPGA netlist releases (block/chip) - Demonstrate experience in the full ASIC product life cycle, including requirements, design, implementation, testing, and post-silicon validation.,

SMTS/Principal ASIC Design Engineer - PCI Design and Integration karnataka 10 - 14 years INR Not disclosed On-site Full Time

You have an exciting opportunity to join a dynamic team at MarvyLogic in Bengaluru/Bangalore. With over 10 years of experience in ASIC RTL Design and a Graduate Degree in Electrical/Electronics Engineering (Post Graduate degree is a plus), you will be a valuable addition to our team. As a member of our team, you will be responsible for various tasks related to ASIC RTL Design. Your expertise in Verilog/System Verilog proficiency, experience with multiple clock and power domains, and integration and validation of high-speed PCIe IP core will be crucial. You will also need familiarity with PCIe protocol analyzers and debug, as well as PCIe driver and application software for Linux/Windows. Your role will involve RTL Design and implementation of interface logic between PCIe controller and DMA engines for high-performance networking applications. You will be creating block-level micro-architecture specifications, reviewing vendor IP integration guidelines, and running integrity check tools to ensure compliance throughout the design flow. In addition to your technical responsibilities, you will also need to work and communicate effectively with multi-site teams. Your experience in ASIC product life cycle, including requirements, design, implementation, test, and post-silicon validation, will be essential in this role. If you are passionate about technology solutions and enjoy working in a collaborative environment, we encourage you to apply for this position. Join us at MarvyLogic and be a part of building futuristic and impactful solutions that make a difference in various industries. Your experience with emerging technologies and your contributions to our team may help you evolve both professionally and personally, leading to a more fulfilling life.,

Digital Design Engineer/Senior Digital Design Engineer karnataka 5 - 10 years INR Not disclosed On-site Full Time

The people are the culture. We encourage a culture of passion for technology solutions that impact businesses. We also make sure that our people pursue their individual passions. Working with us means you get an in-depth understanding of a range of industries and emerging technologies that help us build solutions that are futuristic and impactful. More importantly, the experience of being at MarvyLogic may help you evolve as a person toward enjoying a more fulfilling life. Minimum BE/BS degree in Electrical/Electronics/Computer science required. At least 5-10 years of logic design and RTL coding experience with sound knowledge on verification and implementation concepts. Experience in physical layer ASIC architecture, micro-architecture development, design and debug. Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/or SystemVerilog. Experience with lint, synthesis, CDC, STA, formality, ECO process, tool flows, and scripting. Knowledge in one or more of the following areas, a definite plus: Ethernet (layer 2/3/4 protocols, GMII/XGMII, integration of PHY layer), DSP fundamentals/Filter/FFT design/Datapath design/Error Control Coding, Computer architecture/Processor fundamentals. Preferred Qualifications: Strong knowledge of ASIC design methodologies and flows. Ability to proactively take on responsibilities and competent to work in a start-up environment. Worked with product development companies and having seen at least a couple of tape-outs. Experience with silicon bring-up in the lab and debugging is a definite plus. Experience with FPGA realizations of higher complexity designs. Ability to work with teams spread across geography with excellent communication skills. Responsibilities: Develop key blocks of logic in a next-generation physical layer/mixed signal SOCs. Perform hardware feasibility analysis and come up with a micro-architecture specification helping it map to a high performance, implementable design. Work with verification, DFT, synthesis, circuits, backend implementation teams to realize quality implementation.,

DIGITAL DESIGN VERIFICATION (PHY) karnataka 8 - 15 years INR Not disclosed On-site Full Time

The culture at the organization is defined by its people. There is an emphasis on fostering a culture where individuals are passionate about technology solutions that have a meaningful impact on businesses. It is also ensured that employees are encouraged to pursue their personal passions. Being a part of the team provides you with a deep insight into a variety of industries and cutting-edge technologies, enabling the creation of futuristic and impactful solutions. Moreover, the experience gained at MarvyLogic has the potential to contribute towards personal growth and the enjoyment of a more fulfilling life. In this role based in Bengaluru/Bangalore, the ideal candidate must possess the following qualifications and skills: - Proficiency in Verilog/SystemVerilog languages. - Strong expertise in UVM (mandatory) and familiarity with Specman (preferred). - Experience in formal verification is advantageous. - Knowledge of C++ is a plus. - Familiarity with Automotive, MIPI PHY standards. - Experience with PCIe and/or networking protocols (Ethernet/PCS). - Proficiency in gate-level simulation and debugging. - Proficiency in scripting languages such as Perl and Python. - Experience in SoC verification. - Strong interpersonal and communication skills. - Experience in assertion methodology and familiarity with emulation/hardware acceleration platforms is beneficial. Key Responsibilities: - Possessing 8 to 15 years of Digital Verification (DV) experience in developing and architecting verification environments, preferably from the ground up for multiple projects. - Demonstrating the ability to write test plans, enhance verification environments, and confidently code various components of a test bench (models, checkers, scoreboards, coverage monitors, etc.). - Having expertise in developing constraint random DV environments for large ASIC blocks. If you meet the qualifications and are looking for a challenging opportunity to contribute to cutting-edge technology solutions while being a part of a culture that values personal growth and fulfillment, we welcome you to apply for this position.,