The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. We are seeking a seasoned SoC leads to work with a team to solve complex problems while optimizing performance, area, and power on leading-edge SoC systems. This team helps build new and innovative connectivity products tailored to world changing solutions for AI accelerators, Compute, IO, and Memory Chiplets. What You'll Do: You will manage the design / RTL team to achieve the project goals You will work with customer, provide technical support and provide collaterals agreed upon. You will work with team to achieve flow, methodology improvements to achieve high reuse. You will work with IP vendors to generate / get right configurations of the IP. You will manage teamwork allocation, schedule, risk mitigation and deliverables from design team. Interact closely with the architecture team and develop implementation strategies to meet quality, schedule, and power performance area for the SOC. Interact with the subsystem team and plan SOC milestones, plan quality checks as part of SOC milestones and guide subsystem teams with SOC level requirements (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.). Work with the cross-functional team of verification, DFT, Physical Design, emulation, and software teams to make design decisions and represent Design status throughout the development process. What you'll have: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 15+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 15+years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for talented RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and engage in the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 5+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 5+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in Chiplet Architecture and Design! We are looking for experienced RTL Design Engineers to contribute to our next generation Chiplet designs. This is an incredible opportunity to be part of the AI revolution and contribute to the complete ASIC development cycle, from concept to product. As an RTL Design Engineer, you will work in SoC design and SOC-Subsystem design. You will be responsible for microarchitecture/RTL coding of the SOC/subsystems and create microarchitecture documents. You will work with verification teams on achieving the code & functional coverage. You will work with Physical design team to meet area, power and performance goals. You will support physical design teams, verification teams, software teams and FPGA teams to ensure high quality SoC and ensure successful tapeout. What You'll Do: Micro architect and RTL Design of SoC SubSystem/IP blocks Will develop UPF and run CLP checks Will be responsible for RTL quality checks - Lint/CDC/LEC Create appropriate documentation for hardware blocks. Responsible for analyse / debug / fixing issues reported by verification team Will develop the synthesis constraints for the blocks / subsystem Work with SOC Architect/Leads to integrate the design, review/sign-off verification plan, DFT and PD implementation What You'll Need: Education: Bachelor's or master's degree in electrical or Electronics and Communication or Computer Science Engineering. Experience: 8+ years of proven experience in SoC architecture, development, and full-chip design for multi-million gate SoCs. Expertise: Strong understanding of the design convergence cycle, including architecture, micro-architecture, verification, synthesis and timing closure. Expertise in managing IP dependencies, as well as planning and tracking front-end design tasks. Ability to drive project milestones across design, verification, and physical implementation phases. Experience in CPU, high-speed serial interfaces, or coherence/noncoherent NOC domains is highly desirable. Skills: Excellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Minimum Qualifications: SoC Design Experience: Minimum 8+ years of hands-on experience in SoC design. Architecture Development: Ability to develop architecture and micro-architecture based on specifications. Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage. Chip IO Design: Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure: Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug: Experience in post-silicon bring-up and debugging. Decision Making: Ability to make effective decisions under incomplete information. Communication & Leadership: Strong leadership and communication skills to ensure effective program execution. "Hybrid work environment" As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes: Great compensation package Restricted Stock Units (RSUs) Hybrid Working Model Provisions to pursue advanced education from Premium Institute, eLearning content providers Medical Insurance and a cohort of Wellness Benefits Educational Assistance Advance Loan Assistance Office lunch & Snacks Facility Equal Employment Opportunity Statement Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process. Show more Show less

Job Description As a member of the Support organization, your focus is to deliver post-sales support and solutions to the Oracle customer base while serving as an advocate for customer needs. This involves resolving post-sales non-technical customer inquiries via phone and electronic means, as well as, technical questions regarding the use of and troubleshooting for our Electronic Support Services. A primary point of contact for customers, you are responsible for facilitating customer relationships with Support and providing advice and assistance to internal Oracle employees on diverse customer situations and escalated issues. Career Level - IC3 Responsibilities 6-10+ Years’ experience as an Oracle database engineer/DBA Extensive knowledge and solid troubleshooting experience in all areas of Oracle database technology. Advanced level skills in RAC, ASM, Performance tuning, HA, Backup and Recovery Experience in database upgrades, migrations, installations and patching Ability to quickly grasp complex technical issues Knowledge and experience in administration of engineered system products like Exadata and ZDLRA Experience in Engineered system Maximum Availability Architecture Clear understanding of Exadata features like Flash cache, Storage Index, HCC and IORM Understanding of Luns, Cell Disk and Grid disk Understanding Engineered system Health Check Exadata Full stack patching and Upgrade OEM 13c implementation & migration Skills in Golden Gate replication Day to day monitoring experience of RDBMS and RAC environment Willingness to work in shifts and on weekends Great problem-solving skills, with a strong bias for quality and engineering excellence at scale. Not only must you able to identify, analyse, diagnose, and troubleshoot complex problems using appropriate tools under constraints, but able to handle with utmost professionalism without compromising customers’ satisfaction. Will have strong customer-centricity mindset and the passion to work in Service Support line of business including to provide preventive support and proactive advice Excellent interpersonal communication and written skills in English Able to work with minimal supervision, self-motivated, self-directed and take initiative to collaborate and synthesis with members locally or globally across different geographical time zone Degree in Computer Science, Engineering, related field or equivalent. About Us As a world leader in cloud solutions, Oracle uses tomorrow’s technology to tackle today’s challenges. We’ve partnered with industry-leaders in almost every sector—and continue to thrive after 40+ years of change by operating with integrity. We know that true innovation starts when everyone is empowered to contribute. That’s why we’re committed to growing an inclusive workforce that promotes opportunities for all. Oracle careers open the door to global opportunities where work-life balance flourishes. We offer competitive benefits based on parity and consistency and support our people with flexible medical, life insurance, and retirement options. We also encourage employees to give back to their communities through our volunteer programs. We’re committed to including people with disabilities at all stages of the employment process. If you require accessibility assistance or accommodation for a disability at any point, let us know by emailing accommodation-request_mb@oracle.com or by calling +1 888 404 2494 in the United States. Oracle is an Equal Employment Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability and protected veterans’ status, or any other characteristic protected by law. Oracle will consider for employment qualified applicants with arrest and conviction records pursuant to applicable law. Show more Show less

Job Description As a member of the Support organization, your focus is to deliver post-sales support and solutions to the Oracle customer base while serving as an advocate for customer needs. This involves resolving post-sales non-technical customer inquiries via phone and electronic means, as well as, technical questions regarding the use of and troubleshooting for our Electronic Support Services. A primary point of contact for customers, you are responsible for facilitating customer relationships with Support and providing advice and assistance to internal Oracle employees on diverse customer situations and escalated issues. As a Senior Systems Engineer, you will interface with the customer's IT staff on a regular basis. Either at the client's site or from a remote location, you will be responsible for resolution of moderately complex technical problems related to the installation, recommended maintenance and use and repair/workarounds for Oracle products. You should be highly experienced in some Oracle products and several platforms that are being supported. You will be expected to work with only general guidance from management while advising management on progress/status. Job duties are varied and complex utilizing independent judgment. May have project lead role. Because of substantial customer interfacing, a demonstrated ability to work with customers on an independent basis with exceptional communication skills, while consistently achieving the highest levels of customer satisfaction is essential. A Bachelor's degree in Computer Science, Engineering or equivalent experience is preferred with five years related experience. Experience with Oracle's core products, applications, and tools is important. Career Level - IC3 Responsibilities Minimum 6-10 Years’ experience as an Oracle database engineer/DBA Extensive knowledge and solid troubleshooting experience in all areas of Oracle database technology. Advanced level skills in RAC, ASM, Performance tuning, HA, Backup and Recovery Experience in database upgrades, migrations, installations and patching Ability to quickly grasp complex technical issues Knowledge and experience in administration of engineered system products like Exadata and ZDLRA Experience in Engineered system Maximum Availability Architecture Clear understanding of Exadata features like Flash cache, Storage Index, HCC and IORM Understanding of Luns, Cell Disk and Grid disk Understanding Engineered system Health Check Exadata Full stack patching and Upgrade OEM 13c implementation & migration Skills in Golden Gate replication Day to day monitoring experience of RDBMS and RAC environment Willingness to work in shifts and on weekends Great problem-solving skills, with a strong bias for quality and engineering excellence at scale. Not only must you able to identify, analyze, diagnose, and troubleshoot complex problems using appropriate tools under constraints, but able to handle with utmost professionalism without compromising customers’ satisfaction. Will have strong customer-centricity mindset and the passion to work in Service Support line of business including to provide preventive support and proactive advice Excellent interpersonal communication and written skills in English Able to work with minimal supervision, self-motivated, self-directed and take initiative to collaborate and synthesis with members locally or globally across different geographical time zone Degree in Computer Science, Engineering, related field or equivalent. About Us As a world leader in cloud solutions, Oracle uses tomorrow’s technology to tackle today’s challenges. We’ve partnered with industry-leaders in almost every sector—and continue to thrive after 40+ years of change by operating with integrity. We know that true innovation starts when everyone is empowered to contribute. That’s why we’re committed to growing an inclusive workforce that promotes opportunities for all. Oracle careers open the door to global opportunities where work-life balance flourishes. We offer competitive benefits based on parity and consistency and support our people with flexible medical, life insurance, and retirement options. We also encourage employees to give back to their communities through our volunteer programs. We’re committed to including people with disabilities at all stages of the employment process. If you require accessibility assistance or accommodation for a disability at any point, let us know by emailing accommodation-request_mb@oracle.com or by calling +1 888 404 2494 in the United States. Oracle is an Equal Employment Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability and protected veterans’ status, or any other characteristic protected by law. Oracle will consider for employment qualified applicants with arrest and conviction records pursuant to applicable law. Show more Show less

Job Description Are you looking for an exciting opportunity to join a dynamic and growing team in a fast paced and challenging area? This is a unique opportunity for you to work in our team to partner with the Business to provide a comprehensive view. Role provides the ability to influence the strategic direction of J.P. Morgan’s Global Banking business by sharing new insights and driving thought leadership, as well as the ability to affect numerous aspects of a market-leading, global franchise. As a senior associate on the Strategy & Competitive Intelligence team, you will inform senior leaders, key partners, and sales force members about changes in the competitive landscape and the impact these changes have on our Global Banking business. In this role you will work on various recurring and ad hoc engagements that provide a deeper understanding of the competitive landscape so J.P. Morgan can compete most effectively. Competitive Intelligence is a dedicated function within J.P. Morgan’s Global Banking business, which includes Commercial Banking, Global Corporate Banking and Global Investment Banking. Recurring and project-based work will be relevant to Global Banking overall or one of the sub-businesses. The group is aligned with the Global Banking Business Intelligence team, which reports to the Global Banking CFO. The group maintains connectivity with Strategy & Competitive Intelligence teams throughout firm, sharing resources and best practices as needed. Job Responsibilities Develop deep understanding of the global banking landscape and activities taking place at peer banks, non-bank lenders, and boutique IBs -- share insights with Global Banking leaders, partners and sales force Deliver insights into new trends impacting Global Banking by analysis and synthesis of competitor news articles, financial statements, presentations, industry reports and anecdotal input via recurring deliverables and ad-hoc projects Analyze the impact of competitors strategies and market trends on J.P. Morgan’s Global Banking strategy Leverage market share information to provide strategic updates to Global Banking leaders and partners in a timely manner Work independently and with teammates on ad-hoc projects / requests Engage with broader Global Business Intelligence team on internal activities (i.e. weekly meetings, brainstorming sessions, volunteer activities) Support broader team projects as needed Required Qualifications, Capabilities And Skills Qualified graduate from tier 1 school with relevant experience 5-8 years of relevant experience in consulting, business management, strategy, finance, project management or related field Ability to synthesize large amounts of qualitative information and present concise, easy-to-read findings to an executive audience Superior writing and verbal communication skills; strong presentation skills Comfortable working with employees at various seniority levels and locations while building strong internal relationships Self-starter, ability to work both independently and as part of a team Experience in managing project teams along with multiple projects and timelines Preferred Qualifications, Capabilities And Skills Experience in financial services industry About Us JPMorganChase, one of the oldest financial institutions, offers innovative financial solutions to millions of consumers, small businesses and many of the world’s most prominent corporate, institutional and government clients under the J.P. Morgan and Chase brands. Our history spans over 200 years and today we are a leader in investment banking, consumer and small business banking, commercial banking, financial transaction processing and asset management. We recognize that our people are our strength and the diverse talents they bring to our global workforce are directly linked to our success. We are an equal opportunity employer and place a high value on diversity and inclusion at our company. We do not discriminate on the basis of any protected attribute, including race, religion, color, national origin, gender, sexual orientation, gender identity, gender expression, age, marital or veteran status, pregnancy or disability, or any other basis protected under applicable law. We also make reasonable accommodations for applicants’ and employees’ religious practices and beliefs, as well as mental health or physical disability needs. Visit our FAQs for more information about requesting an accommodation. About The Team J.P. Morgan’s Commercial & Investment Bank is a global leader across banking, markets, securities services and payments. Corporations, governments and institutions throughout the world entrust us with their business in more than 100 countries. The Commercial & Investment Bank provides strategic advice, raises capital, manages risk and extends liquidity in markets around the world. Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering Experience General Summary: 3+ years of experience in RTL,UPF & Physical aware Synthesis for cutting edge technology nodes, logic equivalence checking, Scripting and Netlist Timing Signoff Proficiency in Python/Tcl Familiar with Synthesis tools (Fusion Compiler/Genus), Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus Should be sincere, dedicated and willing to take up new challenges Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3074295 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering Responsibilities General Summary: Defining chip and macro level power domains System Level Power Modeling Mixed signal power analysis Power Island/Power Gating/Power Isolation Structural Low power design of level shifter and isolation cell topology and associated rules Architectural analysis and development of digital power optimization logic/circuits/SW Work with Power Management IC developers for power grid planning Creating detailed architecture and implementation documents Education Requirements Required: Bachelor's, Computer Engineering and/or Electrical Engineering Preferred: Master's, Computer Engineering and/or Electrical Engineering Work with cross-functional teams on SoC Power and architecture for mobile SoC ASICs. Skills/Experience At least 4-12 years of experience are required in the following areas: Low power intent concepts and languages (UPF or CPF) Power estimation and reduction tools (PowerArtist/PTPX,Calypto) Power dissipation and power savings techniques- Dynamic clock and voltage scaling Power analysis (Leakage and dynamic) and thermal impacts Power Software features for power optimization Voltage regulators including Buck and Low Drop out ASIC Power grids and PCB Power Distribution Networks Additional Skills In The Following Areas Are a Plus Mobile Baseband application processors chipset and power grid understanding UPF-based synthesis and implementation using Design Compiler Structural low power verification tools like CLP or MVRC Outstanding written and verbal communication skills Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3074297 Show more Show less

Job title : Associate – HEVA (Evidence Synthesis) Hiring Manager: Head/Group Lead//Team Lead HEVA Location: Hyderabad % of travel expected: Travel required as per business need Job type: Permanent and Full time About The Job Our Team: Sanofi Business Operations (SBO) is an internal Sanofi resource organization based in India and is setup to centralize processes and activities to support Specialty Care, Vaccines, General Medicines, CHC, CMO, and R&D, Data & Digital functions . SBO strives to be a strategic and functional partner for tactical deliveries to Medical, HEVA, and Commercial organizations in Sanofi, Globally. Main Responsibilities The overall purpose and main responsibilities are listed below: Contribute at different levels in execution of assigned Evidence Synthesis projects (including but not limited to search strategy development, screening, data extraction) to generate robust evidence to maximize the value propositions in support of programs/products for Global/Local markets Seek opportunities to innovate HEVA value identification, evidence generation and dissemination process/plan to increase the relevance and impact of HEVA evidence to ensure reimbursement decisions optimal access Develop and maintain TA expertise People: (1) Support and maintain effective relationships with key stakeholders (2) Work effectively with global HEVA teams across various time zones Performance: (1) Contribute at different levels in execution of assigned Evidence Synthesis projects (including but not limited to search strategy development, screening, data extraction): Support activities for research plan for pre-launch, launch and post-launch evidence for investigational and marketed drugs; Evidence generation plan includes burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective, and prospective observational studies, economic evaluations, development and analysis of patient-reported outcomes; Provide support with individuals and institutions, which may serve as resources for evidence generation purpose, etc. (2) Support execution of approved HEVA study(s) and manage ongoing study(s) if required: Supports the manager/HEVA product lead to manage and execute research studies to support the clinical, economic and humanistic value of products; Studies include but are not limited to burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective and prospective observational studies, economic evaluations, and patient-reported outcomes (3) Support development of core value dossier (CVD) and AMCP dossiers and provide strategic direction Process: (1) Assist HEVA team in development of HEVA strategic evidence material (2) Contribute in development of core HEVA strategic evidence generation processes, templates, and products across the portfolio in accordance to the scientific and value messages aligned with CVD, the US AMCP dossier, and HEVA contributions as appropriate to other submissions (3) Maintain adherence to the evidence generation guidelines and other standards relevant to HEVA evidence generation processes Stakeholder: (1) Work with HEVA, RWE, Clinical, Medical Affairs, Marketing, External Affairs and Market Access global or local teams in regions/areas to identify evidence generation and dissemination needs and assist in developing assigned deliverables (2) Assist HEVA team to prepare relevant & customized deliverables for these Teams About You Experience: 3+ years of experience in HEOR for the pharmaceuticals industry, CRO consultancy or academia. Soft skills: Stakeholder management; writing/communication skills; external engagement and ability to work independently and within a team environment Technical skills: Strong analytical skills to translate clinical and economic information and messages into payer evidence strategies Education: Advanced degree in life sciences/pharmacy/similar discipline or medical degree Languages: Excellent knowledge of English language (spoken and written) Pursue progress, discover extraordinary Better is out there. Better medications, better outcomes, better science. But progress doesn’t happen without people – people from different backgrounds, in different locations, doing different roles, all united by one thing: a desire to make miracles happen. So, let’s be those people. At Sanofi, we provide equal opportunities to all regardless of race, colour, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, or gender identity. Watch our ALL IN video and check out our Diversity Equity and Inclusion actions at sanofi.com! null Show more Show less

Job Opportunity: Seeking highly motivated, energetic, team-oriented Individual Contributor driving roadmaps for IP / SS domain including complete IP portfolio, going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions. Working closely with experienced and motivated team of Global experts in Systems, SoC Design functions to address the design/architectural challenges in the context of the complex IP and overall System level solutions. Work through a wide spectrum of skill from developing High level Specifications to actual design Implementation. Key Responsibilities Own and drive Roadmaps for complete IP / Subsystem domains portfolio within global R&D team. Perform benchmarks against other industry players and ensure differentiating features for our customer with high level of innovation. Architect and Design complex IP and Subsystems across a range of protocols required for Automotive Self Driving Vehicles (ADAS) both Vision and Radar, In-Vehicle networks, Gateway Systems, Fail Safe Subsystems (ASIL-D) etc. Own and Lead IP / Subsystem from Concept till IP Design and Development achieving final design performance in integrated system within aggressive, market driven schedules. Ensure quality adherence during all stages of the IP development cycle and carry out a thorough analysis of existing processes, recommend and implement the process improvements to ensure ‘Zero Defect’ designs and drive and mentor teams towards that. Key Skills Self starter with 10-14 years of hands-on experience to Architect and Design complex IP design / Sub-system with minimal supervision. Custom Processor Designs with key DSP functions like those needed for Vision and Radar processing. Experience in High Speed Serial protocols and associated high speed challenges on controller and PHY for PCIe, Ethernet & MIPI CSI2. Understanding of key External Memory interface protocols including DDR4 / LPDDR4, QuadSPI Flash interfaces. Experience in microcontroller architecture, Cache, protocols like AHB/AMBA,AXI. Extensive hands on knowledge of HDLs (Verilog/VHDL), Scripting languages (Perl, Tcl), C/C++ for hardware modeling. Understanding of end to end IP development flow including complex CDC, RDC constructs, IP Synthesis, DFT ATPG coverage. Have worked on Testbench and Testplan development closely with the verification team. Hands on work on pre silicon validation using FPGA/Emulation Board would be a significant added advantage. Key Soft Skills Proficient skills in both written and verbal communication. Can articulate well. Has a sense of Ownership and engages everyone with Trust and Respect. Should demonstrate Emotional Intelligence and Leadership values with ability to work well as a part of team both local and remote or multisite. More information about NXP in India... Show more Show less

Principal STA / Synthesis Engineer Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore A US based well-funded product-based startup looking for Highly talented Engineers for the following roles. Constraint development Constraint management Constraint validation Chip top level synthesis, sta and Timing Closure. RTL2GDS flow. Ability to handle synthesis,sta, lec, upf flow methodologies. TCL/perl/python scripting. Candidate with 12-17 yrs exp in Synthesis / STA role Experience in handling complex data path-oriented multi-million gate synthesis Working Knowledge of Physical synthesis using tools like Genus, Design Compiler Experience in debugging for multi-clock domains hierarchical/flat timing analysis. Hands-on experience in LEC along with strong debugging skills for resolving issues/aborts. Netlist and constraint sign in checks and validation. Prime time constraint development at full chip level and clean up. Multimode multi corner timing knowledge and timing closure at block/top level using tools like DMSA Excellent debugging skills in timing convergence issues and ability to come up with creative solutions . Technical leadership and ability to mentor and make the team deliver. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

Job Title: Lead RTL to GDS Engineer Block/Sub-System Level Company: Wafer Space an ACL Digital Group Location: Bangalore, India Experience: 7+ - 20+ Years Notice Period: Immediate to 30 Days Compensation: Best in Industry Overview: Wafer Space, part of ACL Digital , is actively hiring a Lead RTL to GDS Engineer with deep expertise in block/subsystem-level physical design and signoff for advanced SoC designs (7nm and below). The role involves leading full RTL to GDSII implementation, owning delivery, mentoring junior engineers, and collaborating across functions. We’re looking for professionals who are passionate about driving execution quality, solving complex physical design challenges, and making impactful contributions in high-performance silicon projects. Key Skills & Responsibilities: Technical Responsibilities: Lead end-to-end RTL to GDSII implementation at block/subsystem level. Perform synthesis, floorplanning, placement, CTS, routing, and optimization for PPA. Full signoff closure experience including: Static Timing Analysis (STA) Physical Verification (DRC/LVS using Calibre) IR drop, Electromigration (EM), Crosstalk Drive low power design closure using UPF/CPF flows . Debug and resolve complex design and convergence issues. Collaborate with RTL, DFT, verification, and packaging teams for integration and handoff. Guide flow/methodology improvements and automation scripting (TCL, Python, Perl). Leadership Responsibilities: Provide technical leadership and mentorship to junior engineers. Conduct design reviews and drive quality across the team. Interact with program managers and cross-functional teams to ensure timely delivery. Key Skills: RTL to GDSII implementation Block & Subsystem level design STA (PrimeTime/Tempus) Synthesis (Design Compiler/Fusion Compiler) Place & Route (ICC2, Innovus) Calibre DRC/LVS RedHawk / Voltus (IR/EM analysis) Low power design (UPF/CPF) Scripting (TCL, Python, Perl) Tape-out experience at advanced nodes (7nm, 5nm, 3nm) Team leadership & technical mentoring Preferred Experience: Experience with TSMC, Samsung, Intel process nodes. Hands-on tape-out experience at FinFET nodes (5nm and below). Background in SoC integration and hierarchical design. Why Join Wafer Space – an ACL Digital Group? Work on cutting-edge SoC designs and the latest technology nodes. Be part of a highly technical and collaborative team. Best-in-industry compensation and growth opportunities. Lead from the front and make a real impact in semiconductor innovation. If this opportunity isn’t for you, please share or refer someone in your network who would be a great fit. Referrals are highly appreciated! (prabhu.p@acldigital.com)

Opportunity to work with a leading CDMO in India Opportunity to work in a dynamic and fast-paced environment About Our Client Our client is a Hyderabad-based, innovation-led CDMO specializing in complex chemistries and niche therapeutic areas. They provide custom synthesis and contract manufacturing solutions to global biopharma clients. With robust R&D, regulatory-compliant facilities, and scalable operations, they deliver value across the drug development lifecycle-from clinical development to commercial manufacturing. Job Description The key responsibilities include: Lead and manage end-to-end business development for the North American API market. Drive revenue growth through new business acquisition and existing account management. Develop strategic plans based on market intelligence and competitor benchmarking. Partner with internal stakeholders across R&D, operations, and regulatory to ensure seamless execution. Maintain strong relationships with key accounts, ensuring high levels of satisfaction and retention. Provide accurate sales forecasts, budgets, and performance reports to senior leadership. The Successful Applicant Must-Have Qualifications & Skills: Demonstrated experience in handling API business in North America, preferably in a reputed CDMO or pharma company. Strong commercial acumen and negotiation skills. Deep understanding of regulatory and quality standards applicable in the US. Proficiency in Salesforce CRM and advanced Excel-based reporting. Ability to travel internationally as needed. Key Competencies: Strategic mindset with a growth orientation Market development & territory expansion Cross-cultural communication and stakeholder management Result-driven and execution-focused What's on Offer This role offers the opportunity to lead strategic initiatives in a growing, innovation-driven PE-invested CDMO. With a strong focus on specialty chemicals and CRAMS, the candidate will shape global market presence, drive brand growth, and contribute to cutting-edge healthcare solutions in a dynamic, collaborative environment. Contact: Sangya Shaily Quote job ref: JN-052025-6748801 Show more Show less

Job Description Conducting complex Solid Phase Peptide Synthesis (SPPS). Utilizing various resin types such as 2-CTC, Rink Amide, Wang, MBHA, and others Carrying out cleavage, deprotection, and purification processes with high accuracy Applying Fmoc/Boc protection strategies and performing peptide modifications Operating both automated peptide synthesizers and manual reactors. Qualifications Ph. D in Peptide Chemistry About Us Amneal is an equal opportunity employer. We do not discriminate based on caste, religion, gender, disability, or any other legally protected status. We believe in fostering a workplace that values diversity and inclusion. About The Team The Human Resources team partners with all aspects of the organization, driving success through the effective and innovative management of people for both current and future business needs. Key Roles That The Human Resources Team Performs Executive Role: Specialists in all aspects of people management. High-level input at strategic level into all key business decisions. Audit Role: Ensures all areas of the organization are compliant with legal requirements AND best practice employment policies and procedures. Facilitator Role: Close partnership to support, advise and extend the ability of all areas of the organization to meet their objectives through implementation of highly effective employment practices in areas such as Talent Acquisition, Learning and Development, Reward systems, Performance Management, Health and Wellbeing. Consultancy Role: Provide expert advice to the organization and it’s managers on any aspect of workforce management and employee relations and performance. Service Role: Ensure the organization is fully aware of and is equipped to deal with developments impacting employment matters, such as changes in legislation, changes in the characteristics of the labor market. Show more Show less

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What You'll Be Doing In this position, you will expected to lead all block/chip level PD activities. PD activities includes floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification. Work in collaboration with design team for addressing design challenges. Help team members in debugging tool/design related issues. Constantly look for improvement in RTL2GDS flow to improve PPA. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets. What We Need To See BE/BTECH/MTECH, or equivalent experience. 4+ years of experience in Physical Design. Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies. Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure. Expertise on high frequency design methodologies. Good knowledge and experience in Block-level and Full-chip Floor-planning and Physical verification. Working experience with tools like ICC2/Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation. Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred. Well versed with timing constraints, STA and timing closure. Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools. Ability to multi-task and flexibility to work in global environment. Good communication skills and strong motivation, Strong analytical & Problem solving skills. Proficiency using Perl, Tcl, Make scripting is preferred. Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. JR1996348 Show more Show less

Title: Research Associate Custom Field 2: 913 Location: Bavla, Gujarat, IN Country/Region: IN State: Guja City: Bavla Company: Dishman Carbogen Amcis Limited Business Unit: Contract Research Travel Description: Candidate should be exeprinecd in process development in R&D in API synthesis Candidate with the exeprience of handelling Photo reactor will be prefered . Experience in Vitamin synthesis will be prefered Job Segment: Research Associate, Research Show more Show less

Inizio is a strategic partner for health and life science businesses. Inizio unlocks the value of healthcare innovation by connecting best-in-class strategic, analytic, and creative capabilities. We bridge scientific knowledge, market intelligence, actionable data, cutting-edge tech, and creative execution- to provide the tailored skills and support that our clients need. We’re a truly global partner with more than 12,500 experts operating in over 50 countries covering all major health and life sciences markets. JOB DESCRIPTION : Educational Qualification M Pharm and MBA PG ( Life Sciences ) and MBA Job Responsibility Research, information synthesis and analysis Perform complex analyses and handle sections in larger assignments Play an active role in all aspects of an engagement - identification of issues, formulation of hypotheses, planning and conducting analyses; and synthesizing conclusions into recommendations Deliver to quality, under the guidance of a Engagement/Group Manager Typical Experience Domain knowledge of Pharma sector Science Commercial aspects ~2-4 years of experience in Pharma domain or in Consulting Company Skills And Expertise Excellent communication skills Conceptual, analytical & tactical thinking, strategic thought process Ability to multi-task, work in a demanding global team environment, work under tight deadlines Don't meet every job requirement? That's okay! Our company is dedicated to building a diverse, inclusive, and authentic workplace. If you're excited about this role, but your experience doesn't perfectly fit every qualification, we encourage you to apply anyway. You may be just the right person for this role or others. Show more Show less

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training and teamwork within a collaborative and innovative culture. Want to be apart of a fast paced team responsible for delivering high-speed ASICs for large, complex systems? Our team at Silicon Systems Technology Group (SST) is seeking ASIC Verification Engineers to verify next generation of ASICs for new core routers, switches, and firewalls. We are looking to hire sharp individuals with excellent communication, problem solving, and leadership skills. Opportunity Snapshot: At Juniper, you will have a significant opportunity to interact with system design teams across geographies. We are a team built on a foundation of open communications, empowerment, innovation, teamwork and customer success with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards. ASIC DV Engineer Experience: 5+ years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25%) Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%) Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%) Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%) Required Skills: ASIC Verification using SystemVerilog Experience in constrained-random verification is a strong plus Experience with verification methodology like OVM/VMM/UVM Perl/Tcl scripting is strongly preferred Experience verifying networking protocols such as Ethernet is desirable Strong problem solving and ASIC debugging skills MSEE or BSEE is required with at least 5 years of ASIC Verification Experience. ASIC Design Engineer IND, KA, Bangalore Experience: 5+ years As part of our fast-paced chip design group, you will become an expert in building high-speed ASICs, from specifications to final netlist. You can pick and choose where you want to work on – design/ verification or timing closure/PD. As you are getting started in your career, we will let you explore your passions here. Open communications, empowerment, innovation, teamwork and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements and rewards. Responsibilities: You will start with a functional specification of a module and come up with a detailed micro-architecture specification – do not worry, you will have guidance from our senior engineers on how to go about this if you have not done this before. RTL coding – we prefer you know System Verilog and have done several school/intern projects (coding to synthesis) using this language. Write functional coverage/SVA (we will teach you how to do this if you haven’t done this before) Timing closure – work with PD to identify timing paths and fix timing in RTL to meet the frequency target. Debug issues in your block found by verification team. Use state-of-the-art EDA tools for various design checks. Recommended Skills Bachelor’s degree in Electrical Engineering required, Master’s strongly desired. Strong analytical/ problem solving skills. Should have taken courses for credit in digital logic design. Strong coding skills in Verilog/System Verilog through courses and intern projects Knowledge of Computer Architecture/networking protocols/machine learning through graduate level courses is a plus. Excellent written and verbal communications skills is good to have. Knowledge of Perl/Python is a plus #JuniperASICEngineeringIndia About Juniper Networks Juniper Networks challenges the inherent complexity that comes with networking and security in the multicloud era. We do this with products, solutions and services that transform the way people connect, work and live. We simplify the process of transitioning to a secure and automated multicloud environment to enable secure, AI-driven networks that connect the world. Additional information can be found at Juniper Networks (www.juniper.net) or connect with Juniper on Twitter, LinkedIn and Facebook. WHERE WILL YOU DO YOUR BEST WORK? Wherever you are in the world, whether it's downtown Sunnyvale or London, Westford or Bengaluru, Juniper is a place that was founded on disruptive thinking - where colleague innovation is not only valued, but expected. We believe that the great task of delivering a new network for the next decade is delivered through the creativity and commitment of our people. The Juniper Way is the commitment to all our colleagues that the culture and company inspire their best work-their life's work. At Juniper we believe this is more than a job - it's an opportunity to help change the world. At Juniper Networks, we are committed to elevating talent by creating a trust-based environment where we can all thrive together. If you think you have what it takes, but do not necessarily check every single box, please consider applying. We’d love to speak with you. Additional Information for United States jobs: ELIGIBILITY TO WORK AND E-VERIFY In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire. Juniper Networks participates in the E-Verify program. E-Verify is an Internet-based system operated by the Department of Homeland Security (DHS) in partnership with the Social Security Administration (SSA) that allows participating employers to electronically verify the employment eligibility of new hires and the validity of their Social Security Numbers. Information for applicants about E-Verify / E-Verify Información en español: This Company Participates in E-Verify / Este Empleador Participa en E-Verify Immigrant and Employee Rights Section (IER) - The Right to Work / El Derecho a Trabajar E-Verify® is a registered trademark of the U.S. Department of Homeland Security. Juniper is an Equal Opportunity workplace. We do not discriminate in employment decisions on the basis of race, color, religion, gender (including pregnancy), national origin, political affiliation, sexual orientation, gender identity or expression, marital status, disability, genetic information, age, veteran status, or any other applicable legally protected characteristic. All employment decisions are made on the basis of individual qualifications, merit, and business need. Show more Show less

Position Summary US India, Client Labs: Lab Lead & Facilitator Career Level 5: Manager Location: Hyderabad The Deloitte Client Labs team at Deloitte US India offers immersive labs designed to drive significant breakthroughs for clients and account leadership visiting in India. By leveraging behavioral science, analytics, technology, and expert facilitation, we create environments that foster innovation, strategic insights, and transformative results. Our labs include offerings such as Innovation, Insight, Leadership, Strategy, Relationship, Transformation, Transition, and Custom Labs, all tailored to meet the unique needs of our clients. The Client Labs team works in partnership with Deloitte Client Experiences and Client and Market Growth teams and is dedicated to elevating experience of the visiting clients and account leaders to deepen relationships, innovation, and opportunities that lead to extraordinary outcomes. The Team Our team’s key focus is to provide exceptional client service to Breakthrough Labs and support the development of confidential, high-end quality deliverables to strengthen our Deloitte PPD’s Client relationships. Our team culture is collaborative, encourages team members to take initiatives, and seek on-the-job learning opportunities by being highly resourceful. About Deloitte University The Leadership Center in India, our state-of-the-art, world-class learning Center in the Hyderabad offices is an extension of the Deloitte University (DU) in Westlake, Texas, and represents a tangible symbol of our commitment to our people’s growth and development. Explore DU: The Leadership Center in Westlake Explore DU: The Leadership Center in India as we explore the future of DU, our client strategy will continue to grow and evolve, providing career growth opportunities and the ability to connect with teams across Executive Accelerators. Work you’ll do. As a Lab Lead & Facilitator, you will play pivotal role, to design, deliver, and manage immersive lab experiences to address clients' top priorities and challenges in a virtual or in-person environment. Leveraging expertise in behavioural research, team dynamics, and facilitation, you will drive intervention, alignment, and consensus-building within client organizations. This role demands a blend of strategic thinking, project management, and exceptional facilitation skills to ensure the successful delivery of labs. Define objectives in collaboration with stakeholders to clearly outline the desired outcomes of the Lab. As a Lab Lead: Lab Design : Lead and drive the making of the lab design, the process, and carve the construct by finalizing the session agenda that is customized and focused on the client visit and outcomes desired from the hosting account leaders. This includes drafting lab design brief, leading the scoping of the Lab, iteration process with the Deloitte business teams by scoping, overseeing content curation and creation, reviewing all lab materials, conducting pre-lab interviews, for evaluating the scope of the Lab, that’s aligned with the account team and client objectives. We are looking for someone with strong design thinking and creative problem-solving skills who is passionate about creating innovative and dynamic experiences for the clients. Project Management: Strong project management skills and attention to detail. Lead end to end Lab project cycle at all stages of planning when a Lab opportunity is created. Be responsible for high quality Lab outcomes and executive summary report outs. Craft a comprehensive Lab session agenda that meticulously outlines the session's structure, including the topics to be discussed, time allocations, and key modules, that are aligned to the objectives. Owning the project management for assigned labs, which includes setting, communicating, and tracking milestones and objectives, proactively identifying risks, leading meetings, and leading and/or participating in client interviews. You will typically manage the relationship with Deloitte account teams and managing client relationships. Lab Delivery/Facilitation : Lead Lab sessions as a Facilitator by managing the day-of lab on an ongoing basis for visiting clients. Includes live facilitation, capture live synthesis of brainstorming sessions using tools, and technology assets, comprehend conversations, probe/ask questions, take notes and key insights during the lab, to identify opportunities and build action plans by leading breakout groups, and facilitating lab modules and navigate through outcomes. We are looking for someone with strong executive presence, manage interpersonal dynamics in a room with senior leaders, and has a knack for operating in ambiguity and pivot structured and unstructured conversations. People Leadership: Manage a team of three to four, as a people leader and Coach for strategic guidance and support for their professional development, performance, and effectiveness of the client experiences, in overall. Provide both formal and informal instruction, direction, and feedback to lab producers and other junior staff. We are seeking an individual who thrives on team-oriented leadership and who is committed to growing and inspiring talent. Green Dot support: In addition to delivering labs, you may also can support national or local special projects and test creative and innovative approaches that could be leveraged in the Client Labs-Experience portfolio. We are seeking an individual who enjoys taking on new challenges and pushing boundaries. Work collaboratively with USI Executive Accelerators, Deloitte University, and cross-functional teams and businesses. Provide comprehensive support through the proficient use of Salesforce, SharePoint, and other firm resources. Be responsible for leadership reporting, identifying training needs, and developing the team in a dynamic landscape. Drive a culture of innovation with stakeholders and within the USI team, by continually seeking ways to enhance the Lab's processes, operational efficiencies, and innovation. Requisite core skills: Business language proficiency with strong communication skills with an ability to enable and facilitate conversations, probe, and moderate dialogues effectively in a collaborative and evolving environment. Has good executive presence to lead sessions through excellent facilitation skills to moderate dynamic sessions with senior leaders and client executives. Strong presentation skills as well as emotional maturity construct to manage complex situations with poise, in a dynamic environment. Experience in using any immersive and innovative technology and tools to engage audience through interactive digital assets to whiteboard conversations for brainstorming and ideation. Solid organizational and project management skills to lead a team and manage multiple tasks and work with cross-functional businesses and teams, such that the components are well-coordinated and executed. Understanding of design-thinking methodologies to curate session design briefs, lead scoping calls and stakeholder interviews to probe required information to Ability to manage diverse audience with perspectives, think on your feet and pivot discussions through effective facilitation and engagement in managing small-large group participants. Flexibility to adapt to changing dynamics and unexpected developments during the Lab session, with client and solution focused approach. Proficient in Microsoft office suite specially in PowerPoint, Excel, Word, Teams, and OneNote. Experience in a professional services firm or a strong understanding of its operations, along with experience working on a global team. Areas where you will exercise skills: Owning multiple client visit Labs as projects. Operating effectively in ambiguity, including making in-the-moment adjustments and making decisions when not all information is available. Offering original, new, or different approaches to solving problems. Demonstrating strong business writing, as well as document development skills (including note taking and tailoring complex information) and structuring and formatting capabilities. Establishing rapport and building strong working relationships with internal and external stakeholders. Thinking and acting in the best interest of the client and demonstrating ability to resolve issues. Collaborating and integrating with a variety of stakeholders to accomplish tasks and projects. Diagnosing problems using formal problem-solving tools and techniques. Drawing insights and conclusions from complex qualitative and quantitative data. Applying knowledge of business priorities and processes, client and shareholder perspective, and future trends to inform decisions. Qualifications, experience, work location, and timing Academic qualification: Master's degree (preferably an MBA) Certification in Facilitation, Design Thinking, and Agile Methodologies is a plus. Work experience: 10+ years Base Location: Hyderabad. Hybrid work week (flexible to travel as per business need and work across diverse time zones and geographical regions in India) Work timing: 11:00am to 08:00pm regular. Flexible/alternate work hours to during a client visit and delivering a Lab session, as per business need. How You Will Grow At Deloitte, we have invested a great deal to create a rich environment in which our professionals can grow. We want all our people to develop in their own way, playing to their own strengths as they hone their leadership skills. And, as a part of our efforts, we provide our professionals with a variety of learning and networking opportunities—including exposure to leaders, sponsors, coaches, and challenging assignments—to help accelerate their careers along the way. No two people learn in the same way. So, we provide a range of resources including live classrooms, team-based learning, and eLearning. DU: The Leadership Centre in India, our state-of-the-art, world-class learning Centre in the Hyderabad offices is an extension of the Deloitte University (DU) in Westlake, Texas, and represents a tangible symbol of our commitment to our people’s growth and development. Benefits At Deloitte, we know that great people make a great organization. We value our people and offer employees a broad range of benefits. Learn more about what working at Deloitte can mean for you. Deloitte’s culture Our positive and supportive culture encourages our people to do their best work every day. We celebrate individuals by recognizing their uniqueness and offering them the flexibility to make daily choices that can help them to be healthy, centered, confident, and aware. We offer well-being programs and are continuously looking for new ways to maintain a culture that is inclusive, invites authenticity, leverages our diversity, and where our people excel and lead healthy, happy lives. Learn more about Life at Deloitte. Corporate citizenship Deloitte is led by a purpose: to make an impact that matters. This purpose defines who we are and extends to relationships with our clients, our people, and our communities.We believe that business has the power to inspire and transform. We focus on education, giving, skill-based volunteerism, and leadership to help drive positive social impact in our communities. Learn more about Deloitte’s impact on the world. AboutDeloitte Deloittereferstoone or moreofDeloitteToucheTohmatsu Limited,aUKprivatecompanylimitedbyguarantee(“DTTL”),itsnetworkofmemberfirms,and their related entities. DTTL and each of its member firms are legally separate and independent entities. DTTL (also referred to as “Deloitte Global”)does not provide services to clients. In the United States, Deloitte refers to one or more of the US member firms of DTTL, their related entities thatoperate using the “Deloitte” name in the United States and their respective affiliates. Certain services may not be available to attest clients under therulesandregulationsofpublicaccounting.Pleasesee www.deloitte.com/about t olearns moreabout ourglobalnetworkofmemberfirms. Copyright©2024DeloitteDevelopmentLLC.Allrightsreserved. Recruiting tips From developing a stand out resume to putting your best foot forward in the interview, we want you to feel prepared and confident as you explore opportunities at Deloitte. Check out recruiting tips from Deloitte recruiters. Benefits At Deloitte, we know that great people make a great organization. We value our people and offer employees a broad range of benefits. Learn more about what working at Deloitte can mean for you. Our people and culture Our inclusive culture empowers our people to be who they are, contribute their unique perspectives, and make a difference individually and collectively. It enables us to leverage different ideas and perspectives, and bring more creativity and innovation to help solve our clients' most complex challenges. This makes Deloitte one of the most rewarding places to work. Our purpose Deloitte’s purpose is to make an impact that matters for our people, clients, and communities. At Deloitte, purpose is synonymous with how we work every day. It defines who we are. Our purpose comes through in our work with clients that enables impact and value in their organizations, as well as through our own investments, commitments, and actions across areas that help drive positive outcomes for our communities. Professional development From entry-level employees to senior leaders, we believe there’s always room to learn. We offer opportunities to build new skills, take on leadership opportunities and connect and grow through mentorship. From on-the-job learning experiences to formal development programs, our professionals have a variety of opportunities to continue to grow throughout their career. Requisition code: 302341 Show more Show less

Relevant Years of Experience Required: 3 to 9 years Work Location: Kochi, Kerala Minimum Education Criteria: Fulltime three or four years Degree. (B. Design or M. Design will be an added advantage) Mode of Work: Work from Office (3-5 days a week) Job Description Understands the overall UX design process, Business stakeholder vision and general software development / platform specific principles in both CX and EX contexts Mature in problem framing and requirements gathering methodologies and assists in contributing to those activities (may conduct and delegate subtasks to others) Proficient in Discovery and data synthesis to identify critical user insights and develop hypotheses to design effective experiences Performs experience audits / usability analysis e.g. Immersive studies, heuristic assessments Designs low fidelity to high fidelity UI designs and prototypes (Sketches, wireframes, fully interactive mocks) for web applications, mobile devices (web, native, hybrid etc.), or any other form factors for best-in-class digital experience Crafts proof of concepts in mixed-fidelity in collaboration with visual designers Creates research artifacts e.g. Analysis summaries and ideation strategies needed for workshops as directed and can participate when needed Contributes to experience strategy as needed Assists in conducting usability testing or other exploratory / evaluative user research methods as directed Ability to design for modern emerging experiences based on Generative AI and immersive design is a plus Show more Show less

Relevant Years of Experience Required: 3 to 9 years Work Location: Kochi, Kerala Minimum Education Criteria: Fulltime three or four years Degree. (B. Design or M. Design will be an added advantage) Mode of Work: Work from Office (3-5 days a week) Job Description: • Understands the overall UX design process, Business stakeholder vision and general software development / platform specific principles in both CX and EX contexts • Mature in problem framing and requirements gathering methodologies and assists in contributing to those activities (may conduct and delegate subtasks to others) • Proficient in Discovery and data synthesis to identify critical user insights and develop hypotheses to design effective experiences • Performs experience audits / usability analysis e.g. Immersive studies, heuristic assessments • Designs low fidelity to high fidelity UI designs and prototypes (Sketches, wireframes, fully interactive mocks) for web applications, mobile devices (web, native, hybrid etc.), or any other form factors for best-in-class digital experience • Crafts proof of concepts in mixed-fidelity in collaboration with visual designers • Creates research artifacts e.g. Analysis summaries and ideation strategies needed for workshops as directed and can participate when needed • Contributes to experience strategy as needed • Assists in conducting usability testing or other exploratory / evaluative user research methods as directed • Ability to design for modern emerging experiences based on Generative AI and immersive design is a plus

Role & responsibilities TTD Preparation GTI, Nitros, Elemental risk assessment Patent review & ROS Finalize Preferred candidate profile Male candidate

Job Overview JOB DESCRIPTION As a Peptides Production Executive, you will be responsible for learning and assisting in the production of peptides according to established protocols and quality standards. This position is designed to provide hands-on training in peptide synthesis, purification, and related processes. Key Responsibilities Understand and follow standard operating procedures (SOPs) for peptide synthesis. Assist in the preparation of reagents, solutions, and equipment for peptide production. Execute peptide synthesis under the guidance of experienced personnel Learn and perform purification techniques such as HPLC, chromatography, and filtration. Assist in maintaining accurate records of production and testing activities. Follow Good Manufacturing Practices (GMP) and safety guidelines. Learn to operate and maintain peptide production equipment. Report equipment malfunctions or abnormalities promptly. Maintain accurate and detailed records of all production activities. Compile data and assist in preparing production reports. Communicate effectively with team members and supervisors. Contribute to the identification and implementation of process improvements. Provide feedback on procedures to enhance efficiency and quality Attend training sessions to enhance knowledge and skills. Actively participate in professional development opportunities. Preferred Candidate Profile Basic understanding of peptide synthesis principles is a plus. Strong attention to detail and commitment to quality. Ability to work in a team-oriented environment. Good communication and interpersonal skills. Willingness to learn and adapt to new processes. Qualifications Masters/Bachelors degree in Chemistry or a related field. About Us In the three decades of its existence, Piramal Group has pursued a twin strategy of both organic and inorganic growth. Driven by its core values, Piramal Group steadfastly pursues inclusive growth, while adhering to ethical and values-driven practices. Equal employment opportunity Piramal Group is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, ethnicity, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetics, or other applicable legally protected characteristics. We base our employment decisions on merit considering qualifications, skills, performance, and achievements. We endeavor to ensure that all applicants and employees receive equal opportunity in personnel matters, including recruitment, selection, training, placement, promotion, demotion, compensation and benefits, transfers, terminations, and working conditions, including reasonable accommodation for qualified individuals with disabilities as well as individuals with needs related to their religious observance or practice. About The Team Piramal Pharma Solutions (PPS) is a Contract Development and Manufacturing Organization (CDMO) offering end-to-end development and manufacturing solutions across the drug life cycle. We serve our customers through a globally integrated network of facilities in North America, Europe, and Asia. This enables us to offer a comprehensive range of services including drug discovery solutions, process & pharmaceutical development services, clinical trial supplies, commercial supply of APIs, and finished dosage forms. We also offer specialized services such as the development and manufacture of highly potent APIs, antibody-drug conjugations, sterile fill/finish, peptide products & services, and potent solid oral drug products. PPS also offers development and manufacturing services for biologics including vaccines, gene therapies, and monoclonal antibodies, made possible through Piramal Pharma Limited’s investment in Yapan Bio Private Limited. Our track record as a trusted service provider with experience across varied technologies makes us a partner of choice for innovators and generic companies worldwide. Show more Show less

Job Description As a member of the Support organization, your focus is to deliver post-sales support and solutions to the Oracle customer base while serving as an advocate for customer needs. This involves resolving post-sales non-technical customer inquiries via phone and electronic means, as well as, technical questions regarding the use of and troubleshooting for our Electronic Support Services. A primary point of contact for customers, you are responsible for facilitating customer relationships with Support and providing advice and assistance to internal Oracle employees on diverse customer situations and escalated issues. As a Senior Systems Engineer, you will interface with the customer's IT staff on a regular basis. Either at the client's site or from a remote location, you will be responsible for resolution of moderately complex technical problems related to the installation, recommended maintenance and use and repair/workarounds for Oracle products. You should be highly experienced in some Oracle products and several platforms that are being supported. You will be expected to work with only general guidance from management while advising management on progress/status. Job duties are varied and complex utilizing independent judgment. May have project lead role. Because of substantial customer interfacing, a demonstrated ability to work with customers on an independent basis with exceptional communication skills, while consistently achieving the highest levels of customer satisfaction is essential. A Bachelor's degree in Computer Science, Engineering or equivalent experience is preferred with five years related experience. Experience with Oracle's core products, applications, and tools is important. Career Level - IC3 Responsibilities Minimum 6-10 Years’ experience as an Oracle database engineer/DBA Extensive knowledge and solid troubleshooting experience in all areas of Oracle database technology. Advanced level skills in RAC, ASM, Performance tuning, HA, Backup and Recovery Experience in database upgrades, migrations, installations and patching Ability to quickly grasp complex technical issues Knowledge and experience in administration of engineered system products like Exadata and ZDLRA Experience in Engineered system Maximum Availability Architecture Clear understanding of Exadata features like Flash cache, Storage Index, HCC and IORM Understanding of Luns, Cell Disk and Grid disk Understanding Engineered system Health Check Exadata Full stack patching and Upgrade OEM 13c implementation & migration Skills in Golden Gate replication Day to day monitoring experience of RDBMS and RAC environment Willingness to work in shifts and on weekends Great problem-solving skills, with a strong bias for quality and engineering excellence at scale. Not only must you able to identify, analyze, diagnose, and troubleshoot complex problems using appropriate tools under constraints, but able to handle with utmost professionalism without compromising customers’ satisfaction. Will have strong customer-centricity mindset and the passion to work in Service Support line of business including to provide preventive support and proactive advice Excellent interpersonal communication and written skills in English Able to work with minimal supervision, self-motivated, self-directed and take initiative to collaborate and synthesis with members locally or globally across different geographical time zone Degree in Computer Science, Engineering, related field or equivalent. About Us As a world leader in cloud solutions, Oracle uses tomorrow’s technology to tackle today’s challenges. We’ve partnered with industry-leaders in almost every sector—and continue to thrive after 40+ years of change by operating with integrity. We know that true innovation starts when everyone is empowered to contribute. That’s why we’re committed to growing an inclusive workforce that promotes opportunities for all. Oracle careers open the door to global opportunities where work-life balance flourishes. We offer competitive benefits based on parity and consistency and support our people with flexible medical, life insurance, and retirement options. We also encourage employees to give back to their communities through our volunteer programs. We’re committed to including people with disabilities at all stages of the employment process. If you require accessibility assistance or accommodation for a disability at any point, let us know by emailing accommodation-request_mb@oracle.com or by calling +1 888 404 2494 in the United States. Oracle is an Equal Employment Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability and protected veterans’ status, or any other characteristic protected by law. Oracle will consider for employment qualified applicants with arrest and conviction records pursuant to applicable law. Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Role Should have strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure. Experience in all aspects of timing closure for multi-clock domain designs. Should be familiar with MCMM synthesis and optimization. Should have good understanding of low-power design implementation using UPF. Experience with scripting language such as Perl/ Python, TCL. Experience with different power optimization flows or technique such as clock gating. Should be able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation Should be able to handle ECOs and formal verification and maintain high quality matrix Skill Set * Proficiency in Python/Tcl * Familiar with Synthesis tools (Fusion Compiler/Genus), * Fair knowledge in LEC, LP signoff tools* Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis, QoR optimization & Equivalence Checking* Familiarity with standard software engineering practices like Version Control, Configuration Management, Regression is a plus* Should be sincere, dedicated and willing to take up new challenges Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.