2263 Synthesis Jobs - Page 29

We’re inviting applications for a PhD position under the Visvesvaraya PhD Scheme (MeitY, Govt. of India)! Join our research group at the Department of Physics, IIT Ropar, and work on cutting-edge projects in quantum materials. Research Focus Areas: • Growth & characterization of quantum materials • Topological materials, altermagnets, and van der Waals materials • Advanced synthesis techniques: arc melting, CVT, PVT, flux growth, Czochralski, etc. • Study of physical properties: electrical & thermal transport, magnetization, specific heat, thermodynamic studies Eligibility: • Strong background in physics, materials science, or related fields • Interest in experimental condensed matter physics and quantum materials What we offer: • Full-time PhD with fellowship for up to 5 years: – ₹38,750/month (1st & 2nd year) – ₹43,759/month (3rd–5th year) • Opportunity for a 6-month visit to labs abroad (from 3rd year) • Conference travel supports up to ₹2 lakh from the institute • Additional support up to ₹1.5 lakh for selected international conferences (from 3rd year) • Contingency research grant of ₹1.20 lakh/year per candidate • Access to advanced facilities and a collaborative research environment How to Apply: • Fill out the application form: https://lnkd.in/d6Bb4Hsg • Send the filled form, CV and a brief statement of interest to PI Dr. Ritu Gupta at: ritu.gupta@iitrpr.ac.in Learn more about our research: https://lnkd.in/gQJE6RJ9 Please feel free to share this opportunity with anyone who might be interested! Physics @ IITRopar hashtag #PhDPosition hashtag #QuantumMaterials hashtag #VisvesvarayaPhDScheme hashtag #IITRopar hashtag #ResearchOpportunity hashtag #Hiring hashtag #CondensedMatterPhysics

Line of Service Advisory Industry/Sector GPS X-Sector Specialism Operations Management Level Senior Associate Job Description & Summary At PwC, our people in software and product innovation focus on developing cutting-edge software solutions and driving product innovation to meet the evolving needs of clients. These individuals combine technical experience with creative thinking to deliver innovative software products and solutions. In business analysis at PwC, you will focus on analysing and interpreting data to provide strategic insights and recommendations for improving business performance. Your work will involve strong analytical skills and the ability to effectively communicate findings to stakeholders. *Why PWC At PwC, you will be part of a vibrant community of solvers that leads with trust and creates distinctive outcomes for our clients and communities. This purpose-led and values-driven work, powered by technology in an environment that drives innovation, will enable you to make a tangible impact in the real world. We reward your contributions, support your wellbeing, and offer inclusive benefits, flexibility programmes and mentorship that will help you thrive in work and life. Together, we grow, learn, care, collaborate, and create a future of infinite experiences for each other. Learn more about us . At PwC, we believe in providing equal employment opportunities, without any discrimination on the grounds of gender, ethnic background, age, disability, marital status, sexual orientation, pregnancy, gender identity or expression, religion or other beliefs, perceived differences and status protected by law. We strive to create an environment where each one of our people can bring their true selves and contribute to their personal growth and the firm’s growth. To enable this, we have zero tolerance for any discrimination and harassment based on the above considerations. " Job Description & Summary: At PwC, our purpose is to build trust in society and solve important problems. We’re a network of firms in 157 countries with more than 300,000 people who are committed to delivering quality in Assurance, Advisory and Tax services. Within Advisory, PwC has a large team that focus on transformation in Government through Digital inclusion. The open position is for a candidate who desires to work with government clients and bring about a change in society. A successful candidate will be expected to work pro-actively and effectively on multiple client engagements over the period of time and take ownership of the entire project delivery he/she entrusted with. Responsibilities: · Lead the design and implementation of AI/ML models, particularly in the areas of Generative AI and advanced data analytics · Develop and fine-tune large language models (LLMs) and transformer-based architectures for specific use cases · Collaborate with data engineers, product owners and business stakeholders to translate requirements into intelligent solutions · Deploy ML models in production using MLOps practices, ensuring scalability and performance · Drive experimentation with cutting-edge Gen AI techniques (e.g., text generation, summarization, image synthesis) · Conduct data exploration, feature engineering and statistical modeling to support various business needs · Mentor junior team members and guide them in model development and evaluation best practices · Stay up to date with the latest research and industry trends in AI, ML and Gen AI · Document methodologies, models and workflows for knowledge sharing and reuse Mandatory skill sets: · 4+ years of experience in AI/ML and data science, with proven experience in Generative AI · Hands-on expertise with Python and relevant ML/AI libraries (e.g., PyTorch, TensorFlow, Hugging Face, Scikit-learn) · Strong understanding of LLMs (e.g., GPT, BERT, T5), transformers and prompt engineering · Experience with NLP techniques such as text classification, summarization, entity recognition and conversational AI · Ability to build and evaluate supervised and unsupervised learning models · Proficient in data wrangling, exploratory data analysis and statistical techniques · Familiarity with model deployment tools and platforms (Docker, FastAPI, MLflow, AWS/GCP/Azure ML services) · Excellent problem-solving, analytical thinking and communication skills Preferred skill sets: · Experience fine-tuning open-source LLMs using domain-specific data · Exposure to reinforcement learning (RLHF), diffusion models or multimodal AI · Familiarity with vector databases (e.g., FAISS, Pinecone) and retrieval-augmented generation (RAG) architectures · Experience with ML pipelines and automation (CI/CD for ML, Kubeflow, Airflow) · Background in conversational AI, chatbots or virtual assistants · Knowledge of data privacy, ethical AI and explainable AI principles · Publications, Kaggle participation or open-source contributions in the AI/ML space Years of experience required: · 4+ years Education qualification: · Bachelor’s or Master’s degree in Computer Science, Artificial Intelligence, Data Science, Statistics or a related field Education (if blank, degree and/or field of study not specified) Degrees/Field of Study required: Bachelor of Engineering Degrees/Field of Study preferred: Certifications (if blank, certifications not specified) Required Skills AI Programming Optional Skills Accepting Feedback, Accepting Feedback, Active Listening, Analytical Thinking, Business Administration, Business Analysis, Business Case Development, Business Data Analytics, Business Process Analysis, Business Process Modeling, Business Process Re-Engineering (BPR), Business Requirements Analysis, Business Systems, Communication, Competitive Analysis, Creativity, Embracing Change, Emotional Regulation, Empathy, Feasibility Studies, Functional Specification, Inclusion, Intellectual Curiosity, IT Project Lifecycle, Learning Agility {+ 19 more} Desired Languages (If blank, desired languages not specified) Travel Requirements Not Specified Available for Work Visa Sponsorship? No Government Clearance Required? No Job Posting End Date

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS SILICON DESIGN ENGINEER THE ROLE: This exciting position as MTS in AMD's Silicon IP solutions & SOC group will provide the individual with an opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to Productization. Join us in providing innovative IP solutions as we embark on our journey into the cutting edge programmable logic based silicon designs by delivering the complex IP Solutions for multiple market segments As part of this opportunity, we are seeking a Synthesis and Timing engineer to participate in the development of large SOC’s with multiple physical blocks and 300+ clock domains. This position requires an individual to be creative, team-oriented, technology savvy, able to lead large cross-functional teams, comfortable and willing to provide regular updates to management chain during the project execution THE PERSON: You have a passion for modern, complex hardware and IP architecture, digital design, and physical design in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts) PREFERRED EXPERIENCE: About 6 to 10 years of relevant experience Worked with EDA tools that enable RTL quality checks Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints related issues. Ability to multitask and grasp new flows/tools/ideas Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc Automating workflows in a distributed compute environment. Scripting language experience: Python/TCL preferred. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-MK1 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Location: Hyderabad Faculty Name: Professor Tamanna Singh Dubey Academic Area: Finance Research Summary of the Faculty Professor Tamanna Singh Dubey: Professor Tamanna obtained her Ph.D. in Finance from the Ross School of Business at the University of Michigan – Ann Arbor. Her research interests are in empirical Corporate Finance with a specific focus on financial technology, banking, household finance, and financial intermediation. Her current research agenda is to study the impact of innovation in financial intermediation, such as innovation in payments and lending, on households, firms, and the broader economy. Prior to her Ph.D., Professor Tamanna worked as an Investment Banking Analyst at Bank of America Merrill Lynch to raise equity and dollar denominated debt capital for Indian firms. She holds a bachelors in Electrical Engineering from Indian Institute of Technology Kharagpur, an MBA from the Indian Institute of Management Bangalore, and an MA in Economics from the University of Michigan – Ann Arbor. About ISB The Indian School of Business (ISB) evolved from the need for a world-class business school in Asia. The founders, some of the best minds from the corporate and academic worlds, anticipated the leadership needs of the emerging Asian economies. The ISB is committed to creating such leaders through its innovative programs, outstanding faculty, and thought leadership. The Indian School of Business (ISB) provides a robust environment that generates high-quality research that is both contemporary and rigorous. Roles and Responsibilities: You will provide assistance to the faculty in their ongoing research work which includes the following: Data - scrapping, compilation, cleaning and analysis. Synthesis - Literature search and review, summary, presentation, and analytical writing. Research Associate will get exposure in compiling and handling big data sets, learning new techniques and frontier techniques in Econometrics and Causality Regressions. Required Skills and Qualifications: This position is a good fit for a candidate looking to pursue a PhD in Finance or Economics. Qualifications: B Tech (preferably in Electrical Engineering, Signal Processing or Computer Science) OR Master’s degree in a quantitative area such as Economics, Statistics, Industrial Engineering, Computer Science, Mathematics, Data Analytics. Individuals with 4-year bachelor’s degree may apply. Preferred Skills: Experience working with big data systems, concepts, and tools. Working knowledge of statistical software and/or coding proficiency in programming languages such as Python, Stata, R, MATLAB etc. Strong verbal and written communication skills, with attention to every detail. Knowledge of writing API queries and web-scraping algorithms, ML or textual analysis and ability to use data mining techniques to extract data from structured/unstructured tables in PDF files is an added advantage. Motivation to learn and a strong work ethic. Our Commitment towards you ISB is a research-focused business school. It offers a variety of opportunities to understand the current management phenomena in depth, through research brown-bag seminars, workshops, and PhD-level courses. It provides several options to hone a person’s analytical skills. This position is best suited for a candidate with an interest in pursuing a PhD down the line. Along with the competitive salary and plethora of employee benefits, ISB hosts a world-class Learning Resource Centre in the entire Asia, Comprehensive Health and Personal Accident Cover for you and your family members. ISB believes in creating a truly inclusive culture that values diversity, equity, and inclusion for everyone through our ideas and collaborations. For any queries, reach out to - careers_ra_fd@isb.edu. Kindly do not share your resumes or CVs via email. If this role is your true calling, please fill out the form using the below-mentioned link. https://www.cognitoforms.com/IndianSchoolOfBusiness9/FDOHiringForm We will connect with you shortly. Hyderabad Campus Indian School of Business Gachibowli, Hyderabad - 500111 Timings : Monday- Friday, 08:00 AM IST to 06:00 PM IST 040 23187777 0172 4591800 careers_hyderabad@isb.edu careers_mohali@isb.edu careers_ra@isb.edu Mohali Campus Indian School of Business Knowledge City Sector 81, SAS Nagar ,Mohali - 140 306

Job Title: Medical Annotation Intern Location : Hyderabad Type : Internship / Full-Time Internship Duration : 6 months Job Type: Onsite Department : Research & Development Industry : Health Tech / Digital Health Salary: ₹5,000 – ₹10,000/month (based on qualifications and Knowledge) About Us: At MHN , we're redefining how individuals engage with their health through research-backed, AI-driven tools. Our mission is to personalize preventive health solutions by combining clinical science, behavioral data, and user-centric design. The Role: We're looking for R&D Interns and Research Associates who are passionate about healthcare innovation. This role is ideal for those with a research-oriented mindset and an interest in bridging the gap between science, data, and digital health technology. Key Responsibilities Health Research & Analysis: Conduct in-depth research on various health parameters and their correlation with lifestyle and behavioral factors, as assigned by management. Stay current with the latest clinical studies, scientific literature, and public health data to support evidence-based development. Insight Generation: Translate complex medical data into clear, actionable insights aimed at improving individual and population health outcomes. Identify trends, risk factors, and preventive strategies based on data analysis and scientific research. Product & Dashboard Integration: Collaborate with the tech and product teams to integrate research findings into MHN’s health templates, AI dashboards, and personalized user interfaces. Ensure all outputs reflect clinical accuracy, relevance, and user applicability. Cross-Functional Collaboration: Work closely with multidisciplinary teams—including the development, product, and design teams—to drive research-backed innovation. Actively contribute to brainstorming sessions, rapid prototyping, and the validation of health solutions to ensure scientific integrity and user-centric design. Team Building & Leadership: Contribute to the foundation of MHN’s R&D division by developing research strategies, creating knowledge repositories, and documenting best practices. Required: Bachelor's or Master's degree in Public Health , Life Sciences , Biomedical Sciences , Medicine , Psychology , or related fields. Strong critical thinking and research synthesis skills. Excellent written and verbal communication, especially simplifying complex ideas. Good to Have: Prior internship or coursework in public health, health tech, or clinical research. Familiarity with data interpretation or tools like Excel, PubMed, or public health dashboards. Interest in digital health, AI, or behavior change science. What We Offer Direct impact on health outcomes through technology. Mentorship from cross-functional teams (product, research, clinical). Fast-paced, learning-focused environment. Flexible work arrangements. Opportunity to transition from intern to full-time (if applicable). After completing the Internship, for Full-Time the CTC will be ₹1.5 LPA – ₹3 LPA Job Types: Full-time, Fresher Pay: ₹100,000.00 - ₹200,000.00 per year Schedule: Day shift Supplemental Pay: Performance bonus Work Location: In person

At Alstom, we understand transport networks and what moves people. From high-speed trains, metros, monorails, and trams, to turnkey systems, services, infrastructure, signalling and digital mobility, we offer our diverse customers the broadest portfolio in the industry. Every day, more than 80 000 colleagues lead the way to greener and smarter mobility worldwide, connecting cities as we reduce carbon and replace cars. PURPOSE OF THE JOB Manage the adequacy between Demand (Firm & Forecast) and Resources (Manufacturing & Procurement) to reach customers QCD (Quality, Cost, Delivery) and projects timescales while optimising site resources (people, machines & cash). ORGANISATION Organisation structure (job belongs to) Project Management Reports directly to: Project Planning Manager/Site Planning Manager Other reporting to: Global planning director Direct reports: N/A Network & Links Internal Manufacturing and testing Department / Project Industrial Manager (PrIM) Industrialization : Process Manufacturing Engineering (PME), Process Industrial Manager (PIM) Tender : Bid Technical Manager(BTM) Project : Project Planning Manager (PrPM), Sub System Manager (SSM) Supply Chain & Procurement : Project Supply Chain Leader (PrSCL), Project Sourcing Manager (PrSM), Global Business Center Product Manager, Obsolescence Manager Finance : Warning Process Change (WPC) Manager, Site Controller Human Resources (HR) External None Key Responsibility: Apply Industrial Planning Golden rules. Apply EHS (Environment Health Safety) rules (Alstom Zero Deviation Plan) when moving in workshops Manage demand (firm & forecast) in the Core Planning Tools and/or ERP (Enterprise Resource Planning) Loco Maintenance Date Tracking SO Workload Calculation P&FM Site Update Plan Vs Actual TAT Planning Front End Management (GSI) & Maintenance plan Update in GSI Monthly Plan Vs Actual Compilation PM/CM Material Tracking UOR Locomotive Planning Monthly Maintenance Plan Release Meetings: L3 / L4 / WAR Room /SSR / Work Package / Services Planning/etc. Daily Loco Report & P&FM Weekly Publish E-loco Services Planning Governance (SRE+NGP) MBR Slides Readiness & Management MPR Slides Readiness & Management Services Planning governance - Weekly and Monthly Mileage based Maintenance Plan creation Service Core committee meeting governance Daily Morning meeting governance Sales order Creation for scrap and inter-site material transfer Inputs for Services bids Main Required Competences Mandatory: Graduated from university or engineering school (Master’s degree) Experience: Mandatory: Min 1-2 year experience required in Planning & SCM or Industrial or equivalent Desirable: Knowledgeable of End-to-End vision for Industrial Planning process and process impact in ERP for procurement and manufacturing Competencies & Skills: Technical: Good knowledge of Core Planning Tool, ERP and Excel Good level of English Behavioral : Good Communication and collaborative skills Innovative, pro-active and positive Customer oriented Sense of urgency and autonomous Able to make the synthesis of a critical issue You don’t need to be a train enthusiast to thrive with us. We guarantee that when you step onto one of our trains with your friends or family, you’ll be proud. If you’re up for the challenge, we’d love to hear from you! Important to note As a global business, we’re an equal-opportunity employer that celebrates diversity across the 63 countries we operate in. We’re committed to creating an inclusive workplace for everyone.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. In this role You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset: Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

1) Client Company : Manufacturing company (Pharma) 2) Position : Sr. Chemist 3) Experience Required : 5+ Years 4) Salary Negotiable : 60000 to 66000As Per Interview 5) Job Location : Vatva, Ahmedabad 6) Job Description :Having Pharma Company experience in APIs & their Intermediates. Literature Search via Scifinder, chemical abstract, Free Patent online and Journals. Feasibility study of assign project. To plane and selection of routes of synthesis for process development and perform scientific experiments & interpret data for identification of product. Communication with IPR and Regulatory Affairs and DQA department.. Synthesis of molecules using multi step synthesis procedure. Selection of non-infringement process and robust data generation on lab scale. Development synthesis, yield improvement, cost reduction to improve the productivity of APIs. Development with Extraction, Purification and Distillation of product. Performed the Validation in Lab scale. Compilation of all data and preparation of Technical Report of project for technology transfer. From Sneha HR 8487085519 Job Types: Full-time, Permanent Pay: ₹60,000.00 - ₹66,000.00 per month Work Location: In person

We are chemical manufacturing company looking candidate for Technical Associate-R&D Synthesis Education & Experience M.Sc. (Chemistry) Preferred: Position / Job Title Technical associate- R &D -Synthesis Function Research & Development Reporting to Assistant Manager R & D Work Experience 3-5 years relevant Experience in R &D Key Responsibilities 1.Conduct Laboratory trials for development of new products. 2.Ensure Documentation of the Process developed and finding or any new discoveries that arise during the research work. 3.Submitting reports and write-ups in an efficient and timely manner. 4.Practicing and monitoring health and safety at all times, including correct handling, storage and disposal of all types of chemicals. 5.Ensure safety to achieve zero accident 6.Ensuring the housekeeping of the working area as per the GLP. Must knowledge of reaction: Chlorination Bromination, hydrogenation, nitration, fluorination, Must Equipment experience: Autoclave-Rotavapour If your are interested and your profile is suitable please share your CV on ganesh.khandekar@laxmi.com.

Company Description Dr. Reddy’s Laboratories Ltd. is a leading multinational pharmaceutical company based across global locations. Each of our 24,000 plus employees comes to work every day for one collective purpose: to accelerate access to affordable and innovative medicines because Good Health Can’t Wait . We started in 1984 with a modest investment, 20 employees and a bold vision. Today, we have research and development centres, manufacturing facilities or a commercial presence in 66 countries. For nearly four decades, we have stood for access, affordability and innovation based on the bedrock of deep science, progressive people practices and robust corporate governance. As the pharmaceutical industry evolves and undergoes disruption, we see an opportunity – to strengthen our core further (the next steps) and to build the future (the new bets). ‘The Next and the New’ is how we aim to continue to be the partner of choice – purpose-driven, future-ready and sustainable. Our aim is to reach over 1.5 Bn+ patients across the world by 2030 by growing our core businesses and building for the future with sustainability at the core of our purpose and strategy. Sustainability for us means operating in a manner that respects people, planet and purpose – helping us conserve precious resources, serve our patients, create value for stakeholders, give back to society, fulfil our potential and maintain our integrity and transparency Dr Reddy’s maintains a work environment, free from discrimination and is an equal opportunity employer. We are committed to employ & nurture all qualified diverse workforce without regard to race, colour religion, nationality, sex, age, disability status, genetics, sexual orientation, gender expression, citizenship or any other characteristic or classification protected by applicable law(s) of the country we operate in. We treasure every talent, and recognize merit and diversity in our organization. Job Description We are seeking a Senior Specialist, Intellectual Property for our North America Group (NAG). The incumbent will be based in India, and report to the Lead, Intellectual Property Counsel - North America. As a Senior Specialist in the IP department, you will collaborate with US Counsel and internal stakeholders to design and implement IP strategies to advance Dr. Reddy’s interest in providing affordable health care solutions. Roles & Responsibilities Work with US Counsel in managing ANDA, 505(b)(2), BPCIA, and PM(NOC) patent litigations, including post-grant patent office proceedings by developing and implementing claims and defenses. Assist in discovery, witness preparations, and competitive landscape analysis. Identify strategies related to Paragraph IV certifications and Section viii carve-outs. Work with US Counsel and DRL R&D in securing freedom-to-operate for Dr. Reddy’s products, including clearance of Orange Book and unlisted patents for the bulk API, route of synthesis, finished dosage form and polymorphs. Conduct prior art, patentability, landscape and freedom-to-operate searches. Examine patents, file histories, prior art, ongoing litigations, and citizen’s petitions for possible Paragraph IV and related strategies for ANDA and 505(b)(2) products. Develop and provide IP inputs as part of product selection. Provide IP prosecution strategy, including by collaborating with R&D on innovation and drafting patent applications. Conduct IP due diligence and provide IP support towards business development activities. Qualifications Educational qualification: Advanced Degree in pharmaceutics, pharmacology, pharmaceutical chemistry, or similar discipline required (MS or PhD); LLB preferred. Minimum work Experience: 14+ years of experience working with life science, biotechnology, and/or pharmaceutical companies in Intellectual Property is required, wherein 6+ years were spent assisting on complex intellectual property issues for the United States litigations. Skills & attributes: Technical Skills Experience in Intellectual Property (IP) domain Experience developing strategies for and assisting in the management of ANDA litigations in the US Skilled in infringement/invalidity analysis, freedom to operate, filing and prosecution, Market launch analysis. Experience leading product Identification and selection in perspective of complex Injectable, inhalation, OSDs in different geographies. Sound knowledge of technologies used in various dosage forms. Due diligence experience for North America region. Experience with both small molecules and biologics, not required, but preferred Behavioural Skills Excellent communication and interpersonal skills. Strong analytical and problem-solving abilities. Good Negotiation and Influencing skills. Ability to work collaboratively with Regulatory and cross-functional teams across US - India time zones. People management skills Additional Information Benefits Offered At Dr. Reddy’s we actively help to catalyze your career growth and professional development through personalised learning programs. The benefits you will enjoy at Dr. Reddy’s are on par with the best industry standards. They include, among other things and other essential equipment, joining & relocation support, family support (Maternity & Paternity benefits), learning and development opportunities, medical coverage for yourself and your family, life coverage for yourself. Our Work Culture Ask any employee at Dr. Reddy’s why they come to work every day and they’ll say, because Good Health Can’t Wait. This is our credo as well as the guiding principle behind all our actions. We see healthcare solutions not only as scientific formulations, but as a means to help patients lead healthier lives, and we’re always attuned to the new and the next to empower people to stay fit. And to do this, we foster a culture of empathy and dynamism. People are at the core of our journey over the last few decades. They have been supported by an enabling environment that buoys individual ability while fostering teamwork and shared success. We believe that when people with diverse skills are bound together by a common purpose and value system, they can make magic. For more details, please visit our career website at https://careers.drreddys.com/#!/

About The Job Our Team: Sanofi Business Operations (SBO) is an internal Sanofi resource organization based in India and is setup to centralize processes and activities to support Specialty Care, Vaccines, General Medicines, CHC, CMO, and R&D, Data & Digital functions . SBO strives to be a strategic and functional partner for tactical deliveries to Medical, HEVA, and Commercial organizations in Sanofi, Globally. Main Responsibilities The overall purpose and main responsibilities are listed below: SBO Manager (HEVA) will be functionally aligned to Global HEVA business partners (BPs)/Global HEVA Evidence Synthesis lead and will support execution of multiple activities Manage assigned Evidence Synthesis projects in the assigned portfolio to plan and generate robust health economics and value based evidence to maximize the value propositions from both a global and US perspective working within the Market Access tripod by working with Global HEVA BPs/Global HEVA Evidence Synthesis lead Work with Global HEVA BPs/Global HEVA Evidence Synthesis lead to manage and execution of quality research projects, economic models, trial design recommendations and other activities in support of programs/products as required Support HEVA BPs/Global HEVA Evidence Synthesis lead in the planning, design, implementation, and completion of innovative evidence-based research programs that are consistent with program/product strategies. The research programs developed by Global HEVA BPs will provide appropriate evidence and/or tools to be used for internal decision making and for external audiences at product launch and over product life cycle Collaborate with Global HEVA BPs/Global HEVA Evidence Synthesis lead to seek opportunities to innovate HEVA value identification, evidence generation and dissemination process/plan to increase the relevance and impact of HEVA evidence to ensure reimbursement decisions optimal access Create complex and specialized strategic content without supervision Develop and maintain TA expertise Develop and review content created by HEVA associates Coach HEVA associates People: (1) Develop and maintain effective relationships with key internal stakeholders including Medical Affairs, Clinical Development, Commercial and Market Access (2) Constantly assist and provide effective feedback to HEVA associates (senior or junior) in developing knowledge and sharing expertise (3) Work effectively with global HEVA teams across various time zones Performance: (1) Manage the HEVA evidence generation projects in collaboration with Global HEVA BPs: Develop research plan to support pre-launch, launch and post-launch evidence for investigational and marketed drugs; Evidence generation plan includes burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective and prospective observational studies, economic evaluations, development and analysis of patient-reported outcomes; Provide strategic support with individuals and institutions, which may serve as resources for evidence generation purpose, etc.; Work closely with the HEVA product lead to manage and execute research studies to support the clinical, economic and humanistic value of products; Studies include but are not limited to burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective and prospective observational studies, economic evaluations, and patient-reported outcomes; Lead development of core value dossier (CVD) and AMCP dossiers under the strategic direction of Global HEVA BPs Process: (1) Develop complex HEVA strategic evidence material (2) Build expertise in the field of HEVA for the assigned Therapeutic area (3) Manage core HEVA strategic evidence generation processes, templates, and products across the portfolio in accordance to the scientific and value messages aligned with CVD, the US AMCP dossier, and HEVA contributions as appropriate to other submissions (4) Accountable for adherence to the evidence generation guidelines and other standards relevant to HEVA evidence generation processes at SBO (5) Leverage advanced training delivery tools & techniques thereby enhancing the effectiveness of training delivery (6) Design an overall plan of action basis end-customers feedback & improve course content and delivery Stakeholder: (1) Work closely with HEVA, RWE, Clinical, Medical Affairs, Marketing, External Affairs and Market Access global or local teams in regions/areas to identify evidence generation and dissemination needs and assist in developing assigned deliverables (2) Liaise with these teams to prepare relevant & customized deliverables and ensure milestones and timelines are on track for assigned the projects About You Experience: 8+ years of experience in HEOR for the pharmaceuticals industry, CRO consultancy or academia. Soft skills: Demonstrate effective communication, organizational and interpersonal skills; Able to work effectively as part of a multidisciplinary global teams; Able to work independently, but in concert with the direction provided by their management, in accordance with defined functional policies and precedents, budgetary guidelines, company values, ethics and applicable law; Ability to handle multiple projects across different therapeutic areas; Ability to work well in a cross-functional team; Understanding of the disease environment and the evolution of the market access landscape and implications for the business; Proven track record working successfully in a project/matrix-oriented environment; Excellent communication skills and ability to understand and present complex information in digestible ways for internal (e.g. senior management) and external audiences; Strong team spirit, sense of transversality, multicultural awareness and ability to drive matrix teams Technical skills: Strong analytical skills to translate clinical and economic information and messages into payer evidence strategies; Understands reimbursement decisions to determine value drivers and how evidence is used in decision making and how it impacts various payers (e.g., providers, patients, health systems); Knowledge of methods and principles of health economics, health technology assessment (HTA) reviews Education: Advanced degree in life sciences/pharmacy/similar discipline or medical degree Languages: Excellent knowledge of English language (spoken and written) Pursue progress, discover extraordinary Better is out there. Better medications, better outcomes, better science. But progress doesn’t happen without people – people from different backgrounds, in different locations, doing different roles, all united by one thing: a desire to make miracles happen. So, let’s be those people. At Sanofi, we provide equal opportunities to all regardless of race, colour, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, or gender identity. Watch our ALL IN video and check out our Diversity Equity and Inclusion actions at sanofi.com! null Pursue Progress . Discover Extraordinary . Join Sanofi and step into a new era of science - where your growth can be just as transformative as the work we do. We invest in you to reach further, think faster, and do what’s never-been-done-before. You’ll help push boundaries, challenge convention, and build smarter solutions that reach the communities we serve. Ready to chase the miracles of science and improve people’s lives? Let’s Pursue Progress and Discover Extraordinary – together. At Sanofi, we provide equal opportunities to all regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity, protected veteran status or other characteristics protected by law.

About Aragen Life Sciences: Aragen is a trusted partner to the global life sciences industry, offering end-to-end discovery, development, and manufacturing solutions. As a leading Contract Research Organization (CRO) , we are committed to scientific excellence, innovation, and client success. Role Overview: We are seeking a highly experienced and motivated Senior/Principal Scientific Manager to lead our Peptide Synthesis function. This leadership role involves managing high-impact peptide synthesis projects, ensuring client satisfaction, optimizing resource utilization, and fostering a high-performance scientific culture. Key Responsibilities: Client & Project Management: Manage and grow global client relationships; serve as the primary technical contact Plan, lead, and deliver multiple peptide synthesis projects on time and within budget Drive collaboration, project retention, and client satisfaction Scientific & Technical Leadership: Provide deep scientific guidance in solid-phase and solution-phase peptide synthesis Troubleshoot complex synthetic challenges and optimize purification strategies Drive innovation through adoption of advanced analytical and purification technologies Team Development & Leadership: Mentor and guide scientific staff; foster continuous learning and development Conduct performance reviews and implement recognition and engagement programs Build a strong pipeline of scientific talent within the peptide synthesis function Operational Excellence: Optimize usage of manpower, infrastructure, and materials for cost-effective delivery Ensure adherence to GLP, safety, IP confidentiality, and data integrity protocols Lead continuous improvement initiatives and contribute to business unit growth Key Qualifications: Ph.D. / Postdoctoral Fellowship in Organic or Medicinal Chemistry Senior Scientific Manager (M2): 5–8 years of relevant experience Principal Scientific Manager (M3): 7–11 years of relevant experience Expertise in peptide synthesis (SPPS, solution phase) with hands-on troubleshooting Prior experience in CRO/CDMO setups highly desirable Strong people management, client handling, and cross-functional collaboration skills Research publications in peer-reviewed journals preferred

Job Title: Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Experience: 7 to 15 Years Location: Bangalore / Hyderabad / Cochin / Pune Budget: ₹30 LPA to ₹75 LPA Work Mode: 5 Days Office Key Responsibilities End-to-end ownership of chip-level and block-level floor planning. Drive partitioning, placement, clock tree synthesis (CTS), and routing. Utilize tools like Cadence Innovus and Synopsys Fusion Compiler for implementation. Perform timing analysis, DRC/LVS closure, and physical verification. Collaborate with cross-functional teams including RTL, DFT, STA, and packaging teams. Key Skills Required Strong experience in chip-level and block-level physical design. Hands-on expertise with Innovus and/or Fusion Compiler. Solid understanding of timing, power, signal integrity, and physical verification. Exposure to advanced technology nodes (e.g., 7nm, 5nm) is a plus. Excellent problem-solving and debugging skills. Skills: fusion compiler,chip level,signal integrity,chip-level physical design,timing,physical verification,timing analysis,physical design,debugging,block-level floor planning.,block-level physical design,power,problem-solving,advanced technology nodes,innovus,synopsys fusion compiler,drc/lvs closure,cadence innovus

Job Title: Physical Design Engineer Domain: Semiconductor | VLSI | Chip Design Experience: 7 to 15 Years Location: Bangalore / Hyderabad / Cochin / Pune Budget: ₹30 LPA to ₹75 LPA Work Mode: 5 Days Office Key Responsibilities End-to-end ownership of chip-level and block-level floor planning. Drive partitioning, placement, clock tree synthesis (CTS), and routing. Utilize tools like Cadence Innovus and Synopsys Fusion Compiler for implementation. Perform timing analysis, DRC/LVS closure, and physical verification. Collaborate with cross-functional teams including RTL, DFT, STA, and packaging teams. Key Skills Required Strong experience in chip-level and block-level physical design. Hands-on expertise with Innovus and/or Fusion Compiler. Solid understanding of timing, power, signal integrity, and physical verification. Exposure to advanced technology nodes (e.g., 7nm, 5nm) is a plus. Excellent problem-solving and debugging skills. Skills: fusion compiler,chip level,signal integrity,chip-level physical design,timing,physical verification,timing analysis,physical design,debugging,block-level floor planning.,block-level physical design,power,problem-solving,advanced technology nodes,innovus,synopsys fusion compiler,drc/lvs closure,cadence innovus

This role is for one of our clients Industry: Technology, Information and Media Seniority level: Mid-Senior level Min Experience: 3 years JobType: full-time About The Role We are looking for a highly skilled Computer Vision Engineer with deep expertise in Generative AI to join our cutting-edge visual computing team. In this role, you’ll design and deploy AI-driven systems that enable photorealistic image generation, object placement, and scene modification—transforming how users visualize furniture in real-world environments. This is an opportunity to build next-gen visual intelligence tools using the latest in diffusion models, rendering pipelines, and large-scale AI systems. Key Responsibilities 🎨 Generative Vision Modeling Develop and refine diffusion-based generative models for tasks including object insertion, transformation, and high-resolution rendering. Solve challenges in furniture placement, replacement, and scene consistency , delivering ultra-realistic outputs across diverse environments. 🔬 AI Research & Implementation Stay at the forefront of visual AI—implementing novel architectures in Stable Diffusion, DDPM, NeRF, GANs , or transformer-based generation. Translate state-of-the-art research into production-grade models optimized for speed and accuracy. 🧠 Model Development & Deployment Architect, train, and deploy scalable models using PyTorch and GPU-accelerated workflows. Optimize pipelines for real-time inference, memory efficiency, and photorealistic rendering. 🔁 Collaboration & Integration Work cross-functionally with design, product, and engineering teams to develop AI features that enhance user experience. Collaborate with DevOps to package and serve models via APIs and microservices in live environments. Technical Requirements ✅ Core Expertise 3–8 years of experience in Computer Vision , Deep Learning , or Generative AI . Proven experience working on image generation, object detection, and replacement with generative techniques. Mastery in PyTorch , with deep understanding of diffusion models and training paradigms. 🔧 Toolset & Frameworks Hands-on experience with Stable Diffusion , GANs , NeRF , or similar architectures. Strong understanding of 3D rendering pipelines , including lighting, shading, and texture mapping. Proficiency in CUDA for accelerated model training and deployment. 📊 Additional Skills Experience with large datasets , preprocessing, and augmentation techniques. Background in image synthesis , segmentation , or scene understanding is a plus. Soft Skills & Mindset Strong problem-solving abilities with a research-meets-product mindset. Ability to communicate complex concepts clearly and effectively to technical and non-technical teams. Team-first attitude with a drive to experiment, innovate, and iterate fast. Tech Keywords Diffusion Models Generative AI PyTorch Stable Diffusion NeRF GANs Computer Vision Photorealistic Rendering CUDA Object Placement 3D Vision Image Synthesis

Date: 10 Jul 2025 Location: Kolthur Shamirpet, Medchal, TG, IN, 500078 Custom Field 1: Discovery Services Job Description Level 7-II (Senior Research Investigator or Senior Research Scientist) Job Location: Hyderabad/Bangalore Department: Synthetic Chemistry Role Requirements Ph.D. degree with post-Doctoral research with excellent communication skills is preferred with minimum 2 years’ experience in CRO industry. The candidate should manage a team of 7-12 scientists and be capable of designing scheme, troubleshoot, problem solve independently and execute high-profile project(s). The person should be flexible working shifts as per the organizational policy. The candidate should be excellent in cross functional teamwork and in customer engagement. Safety Strategic Responsibilities Commitment to safety (self, team, lab and the organization) always Ensuring ZERO safety incidents in the lab/organization Ensuring ZERO safety non-compliances at workplace. Reporting incidents (or near-misses) and learnings from those incidents to avoid recurrence Near miss reporting 1 per year per employee, Reduction in number of first aid injuries reported compared to previous FY, Review SOPs and checklists for completeness of information related to safety Quality Ensure to comply with Syngene’ s quality standards and services (self and team) always ZERO data integrity incidents Adhere to the ALCOA+ principles in all data generated. Ensuring adherence to all Syngene policies related to data integrity by all team members. Maintain confidentiality Zero repeat audit observations, Zero major and critical observations in external audits, SOP’s vs Practices: Review and implement necessary refinements for continuous training, testing, and tracking SOP compliance Deviations <= 2% within the fiscal year, tracked monthly Delivery Responsible for Project Health Index: Project planning, Execution, Deliverables including tracking of KPIs for his/her team and Quality of services (internal/client metrics) Achieve per-quarter improvement in key FY25 KPIs, per OU per plan, 18-20 steps per FTE per month, 6 compounds/FTE/month, 70% targets TAT within 30 days for deliverables <0.1 g scale and 5 CE/FTE/month for scales >0.1 g scale. Help the Group Leaders and Head of the department in managing the process of governance & tools for effective, transparent, and collaborative management of the projects. Engagement Good in engaging the customers (weekly reports, experimental for completed final compounds etc). Zero flaw in presentations and report, real time and flawless communication 0% business attrition w.r.t scientific environment and work culture Support in implementing comprehensive client feedback collection and response platform in collaboration with PMO as service management piece. Demonstrate consistent, sustainable technical and operational improvements per RCA/CAPA process in Synthetic chemistry Excellent in team and cross-functional engagement Cost Manage lifecycle of various lab infrastructure, instruments. Ensure optimum resource utilization and cost efficiencyManage FH to chemist ratio. Maintain above 50 % of Scientist-1 in the team and around 25 % of Scientist-2 employees. Compliance Adhere to the ALCOA+ principles in all the experiments and data generated. Ensuring adherence to Syngene policies related to data integrity by all team members. ALCOA+ deviations <= 2% within the fiscal year, tracked monthly, zero data integrity incidents: Breaches that would lead to a material breach with client or regulator Gemba walk compliance at 100%, Timesheet compliance at 100% Confidentiality compliance Ensuring all assigned mandatory training related to data integrity, health, and safety measures are completed on time by all team members. People Leadership Next and Succession planning for critical roles – Reduce critical talent attrition by <5%, create succession plans for critical roles Build competencies and skills that are required to achieve current and future business needs. Technical/functional Skills The candidate should have excellent knowledge of modern synthetic methodology including asymmetric synthesis, heterocyclic chemistry, catalysis and the reaction mechanism is expected. Should be expert in synthetic problem solving/troubleshooting skills. Excellent communication skills including face to face and virtual interactions with team and clients. Must have exceptional Presentation skills. The candidate should maintain an accurate scientific notebook, draft concise written reports for publications. Managerial Skills Expertise in handling multiple collaborations. Demonstrated in handling a team size of 7-12 FTEs Worked effectively with interdisciplinary teams. Efficient Lab management skills The Leader must demonstrate the essential qualities of People Management. Giving & receiving performance-enhancing feedback Setting clear performance expectations Conducting challenging performance conversations Coaching individuals toward improved performance Delegating tasks Creating accountability Lead the change

Date: 10 Jul 2025 Location: Kolthur Shamirpet, Medchal, TG, IN, 500078 Custom Field 1: Discovery Services Job Description Level 7-II (Senior Research Investigator or Senior Research Scientist) Job Location: Hyderabad Department: Synthetic Chemistry Role Requirements Ph.D. degree with post-Doctoral research with excellent communication skills is preferred with minimum 2 years’ experience in CRO industry. The candidate should manage a team of 7-12 scientists and be capable of designing scheme, troubleshoot, problem solve independently and execute high-profile project(s). The person should be flexible working shifts as per the organizational policy. The candidate should be excellent in cross functional teamwork and in customer engagement. Safety Strategic Responsibilities Commitment to safety (self, team, lab and the organization) always Ensuring ZERO safety incidents in the lab/organization Ensuring ZERO safety non-compliances at workplace. Reporting incidents (or near-misses) and learnings from those incidents to avoid recurrence Near miss reporting 1 per year per employee, Reduction in number of first aid injuries reported compared to previous FY, Review SOPs and checklists for completeness of information related to safety Quality Ensure to comply with Syngene’ s quality standards and services (self and team) always ZERO data integrity incidents Adhere to the ALCOA+ principles in all data generated. Ensuring adherence to all Syngene policies related to data integrity by all team members. Maintain confidentiality Zero repeat audit observations, Zero major and critical observations in external audits, SOP’s vs Practices: Review and implement necessary refinements for continuous training, testing, and tracking SOP compliance Deviations <= 2% within the fiscal year, tracked monthly Delivery Responsible for Project Health Index: Project planning, Execution, Deliverables including tracking of KPIs for his/her team and Quality of services (internal/client metrics) Achieve per-quarter improvement in key FY25 KPIs, per OU per plan, 18-20 steps per FTE per month, 6 compounds/FTE/month, 70% targets TAT within 30 days for deliverables <0.1 g scale and 5 CE/FTE/month for scales >0.1 g scale. Help the Group Leaders and Head of the department in managing the process of governance & tools for effective, transparent, and collaborative management of the projects. Engagement Good in engaging the customers (weekly reports, experimental for completed final compounds etc). Zero flaw in presentations and report, real time and flawless communication 0% business attrition w.r.t scientific environment and work culture Support in implementing comprehensive client feedback collection and response platform in collaboration with PMO as service management piece. Demonstrate consistent, sustainable technical and operational improvements per RCA/CAPA process in Synthetic chemistry Excellent in team and cross-functional engagement Cost Manage lifecycle of various lab infrastructure, instruments. Ensure optimum resource utilization and cost efficiency Manage FH to chemist ratio. Maintain above 50 % of Scientist-1 in the team and around 25 % of Scientist-2 employees. Compliance Adhere to the ALCOA+ principles in all the experiments and data generated. Ensuring adherence to Syngene policies related to data integrity by all team members. ALCOA+ deviations <= 2% within the fiscal year, tracked monthly, zero data integrity incidents: Breaches that would lead to a material breach with client or regulator Gemba walk compliance at 100%, Timesheet compliance at 100% Confidentiality compliance Ensuring all assigned mandatory training related to data integrity, health, and safety measures are completed on time by all team members. People Leadership Next and Succession planning for critical roles – Reduce critical talent attrition by <5%, create succession plans for critical roles Build competencies and skills that are required to achieve current and future business needs. Technical/functional Skills The candidate should have excellent knowledge of modern synthetic methodology including asymmetric synthesis, heterocyclic chemistry, catalysis and the reaction mechanism is expected. Should be expert in synthetic problem solving/troubleshooting skills. Excellent communication skills including face to face and virtual interactions with team and clients. Must have exceptional Presentation skills. The candidate should maintain an accurate scientific notebook, draft concise written reports for publications. Managerial Skills Expertise in handling multiple collaborations. Demonstrated in handling a team size of 7-12 FTEs Worked effectively with interdisciplinary teams. Efficient Lab management skills The Leader must demonstrate the essential qualities of People Management. Giving & receiving performance-enhancing feedback Setting clear performance expectations Conducting challenging performance conversations Coaching individuals toward improved performance Delegating tasks Creating accountability Lead the change

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power, and low-power design techniques. Experience with a scripting language such as Perl or Python. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience implementing image/video processing blocks or other multimedia IPs such as Display or ISP Experience with Application-Specific Integrated Circuit (ASIC) design methodologies for clock domain checks and reset checks Experience in scripting languages, C/C++ programming and software design skills. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will be responsible for Register-Transfer Level (RTL) design development of security IP and subsystems. This includes Micro architecture, RTL coding, definition, constraints, IP release flows, Power Performance Area (PPA) optimizations, test planning collaboration, coverage reviews and closure for quality and optimized security designs. You will be involved in Micro-Arch and RTL coding for imaging and video codecs - IPs and subsystems. You will also contribute to improvements by debugging and by using different RTL QC tools like Lint, CDC, VCLP. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Perform Verilog/SystemVerilog RTL coding, function/performance simulation debug and Lint/CDC/FV/UPF checks. Perform RTL verification using industry standard methodologies. Participate in test planning and coverage analysis. Develop RTL implementations that meet competitive power, performance and area targets. Participate in synthesis, timing/power closure and Field-Programmable Gate Array (FPGA) or silicon bring-up. Work with multi-disciplined and multi-site teams in RTL design, verification, or architecture or micro-architecture planning. ,

About Company: Ceragon Networks (https://www.ceragon.com/about-ceragon/) is a company that develops innovative equipment used in wireless data transmission among other software and service solutions. Our systems are based on microwave technology and serve as a cost-effective alternative to fibre optics. About the role: Would you like to be part of a group that takes ideas and brings them to a full product To influence the entire product flow If you answered yes to these questions Your place is with us! Ceragon networks develops a complete product, from idea to field installation, while developing the entire technology internally ASIC, RF chip and FPGA. FPGAs are in every product, hence requires continuous development, both new designs and legacy. We are looking for FPGA engineer to Join Ceragon FPGA team in India, developing next generation backhaul communication systems. In this role you will be required to: All aspects of FPGA design activity: Coding, Synthesizing, mapping and timing closure, verification support and LAB bring up. Participate in FPGA architecture and design for current and next generation products, collaborate with other teams: SW, DV, QA, System etc Requirements: B.E/B Tech degree in Electronic & Communication or Equivalent 5+ years experience as an FPGA designer 5+ years experience with networking. Practical knowledge of RTL design, synthesis, timing closure, simulation and verification test benches. Hardware bring up and debug experience. Familiarity with high level programming languages like C/C++, System Verilog, Scripts (TCL, Python) advantage Excellent system understanding & strong analytical and problem solver abilities. Experience with UVM verification flow advantage. High motivation to excel in career.,

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs, supporting complex architectures with multi-core, multi-power, and multi-reset domains. Demonstrate strong proficiency with front-end flows, including Lint, CDC, low-power (UPF) checks, synthesis, DFT, and Static Timing Analysis (STA). Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI, and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4. Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation, working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 10+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams.

Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs , supporting complex architectures with multi-core, multi-power, and multi-reset domains . Demonstrate strong proficiency with front-end flows , including Lint, CDC, low-power (UPF) checks, synthesis, DFT , and Static Timing Analysis (STA) . Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI , and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4 . Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation , working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 10+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams.

Python Software Development Sr.Analyst Job Description In these roles, you will be responsible for: Design, implement, and test generative AI models using python and various frameworks such as Pandas, TensorFlow, PyTorch, and OpenAI. Research and explore new techniques and applications of generative AI, such as text, image, audio, and video synthesis, style transfer, data augmentation, and anomaly detection. Collaborate with other developers, researchers, and stakeholders to deliver high-quality and innovative solutions. Document and communicate the results and challenges of generative AI projects. Required Skills for this role include: Technical skills 3 + years Experience in developing Python frameworks such DL, ML, Flask At least 2 years of experience in developing generative AI models using python and relevant frameworks. Good knowledge in RPA Strong knowledge of machine learning, deep learning, and generative AI concepts and algorithms. Proficient in python and common libraries such as numpy, pandas, matplotlib, and scikit-learn. Familiar with version control, testing, debugging, and deployment tools. Excellent communication and problem-solving skills. Curious and eager to learn new technologies and domains. Desired Skills: Knowledge of Django, Web API Proficient exposure on MVC. Preferences: Graduate degree in Computer Science with 4 years ofPython based development. Gen AI Framework Professional Certification

Job Description The person is responsible for ensuring the integrity of a design by analyzing signal connectivity, specifically related to Design for Testability (DFT) features, utilizing Spyglass tools to identify and report potential violations within the test logic. Expertise should include and not limited to the following Strong understanding of digital circuit design principles and timing analysis concepts Experience with RTL design, synthesis Proficiency in scripting languages like TCL, Perl, or Python for automation Excellent problem-solving and debugging skills Strong communication and teamwork abilities to collaborate with cross-functional teams

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: GPU Design and micro-Architect who will work across functions like GPU architecture and Systems in design and micro-architecture of the next generation GPU features. Work very closely with Architecture teams to come up with micro-architecture and hardware specification for features Design and RTL ownership Work very closely with Design Verification teams to review test plans and sign off the validation of all design features across products Work closely with physical design teams to achieve the right power, performance and area metrics for the GPU blocks Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

About the Role: Design and develop software components tailored to the platform’s specific architectures, including hardware/software acceleration and offloading. Develop management software supporting multiple WAN technologies such as xPON, xDSL, and FTTH. Leverage chipset and board capabilities to deliver optimal performance and user experience. Develop secure software solutions for loading and updating HOME GATWAYS. Exploiting the chipset and board capabilities to offer the best performances and experiences. Work on Linux kernel to build the foundational layer (embedded Linux, drivers, BSP, bootloaders) for hardware platforms like Home Gateways. Work with cutting-edge technologies and standards, engaging extensively with chip vendors and hardware manufacturers to shape the future of connected homes. Demonstrate creativity, conceptual thinking, and a strong eagerness to learn and experiment with new ideas. Possess strong analytical and synthesis skills. About You: Minimum of 8+ years of experience in Embedded Software development, with expert-level proficiency in C programming. A minimum of 5+ years of core software development experience specifically in the HOME GATEWAY DOMAIN (routers) is required. Candidates with less than 5 years of experience in this domain will not be considered. A minimum of 5+ years of hands-on experience with frameworks such as openWrt or RDK-b. Intermediate level of practical technical knowledge in GIT, Bash, and Python. Practical experience with Linux software development and excellent debugging skills (e.g., gdb, JTAG). Solid understanding of the Linux kernel, OS, and device drivers (GPIO, flash storage, Ethernet, etc.). Knowledge of embedded Linux bootloaders such as u-boot. Familiarity with networking stacks and management protocols like TCP/IP, L2/L3, xDSL, and OMCI. Nice to Have: Experience with prplOS development. Nice to Have: Experience integrating hardware and software for chipsets relevant to the router/gateway industry (ARM, MIPS, x86 SoCs from Broadcom, MxL, Qualcomm, Mediatek, etc.).