Design Verification

Allegis Services India

4 - 9 years

20 - 30 Lacs

noida pune bengaluru

Posted:1 day ago| Platform:

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Skills Required

design verification uvm sv tcl scripting ovm formal verification asic amba functional verification system verilog python ace usb soc verification pcie perl code coverage assertions mac apb low power design axi ethernet pci ahb tcl ip verification

Work Mode

Work from Office

Job Type

Full Time

Job Description

Role :

Work Location :

Years of Experience :

Education Qualification :

Skills

Must have excellent knowledge of computer architecture and design verification fundamentals.
Must have experience with Verilog and popular EDA simulation,System Verilog assertions and testbench methodologies.
Experience in developing complex test bench in System Verilog using OVM/UVM methodology.
Hands-on experience in
AMBA protocol, PCIe MAC/ USB /MAC/ Bluetooth MAC/ Wifi 802.11 MAC layer protocol.
Experience in Low Power Simulation/UPF setup, debug /low power simulation failures.
Exposure to scripting languages like Perl, Unix shell or similar languages
.

Responsibilities

You will be responsible for verification of various IPs and/or SoC.
Candidate must be self-motivated and capable of working independently or as part of a team
You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals.
You will also assist with developing test-plans, debugging failures and analyzing coverage information.

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