757 Soc Verification Jobs

Job Description Team Leadership: Lead and manage a team of verification engineers. Verification Strategy: Define strategies for verifying IPs and SoCs to ensure first silicon success. Test Planning & Development: Write test plans. Develop test benches and test cases. Coverage-Driven Verification: Use industry-standard methodologies (likely UVM/SystemVerilog). Focus on functional coverage, code coverage, and assertions.. Job Description - Grade Specific Your Profile: You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven using latest industry standard methodologies and HVLs. Work invo...

About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the aw...

Role & responsibilities We are seeking a highly skilled and passionate Design Verification Engineer to join our team working with the best in the Industry, developing innovative ASIC solutions for data center and AI Infrastructure. As a design verification engineer, you will lead end-to-end design verification by creating verification plans, building test benches, and driving closure through functional and code coverage. Collaborate across design, modelling, emulation, and validation teams to ensure robust debug, high quality, and complete verification. Key Responsibilities: Define and implement verification plans, and build test benches for block, IP, sub-system, and SoC level verification ...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

The required qualifications are: - 6+ years of experience in DV. - Strong expertise in USB 2.0 and 3.0. - Experience with both SoC and Subsystem verification. - Familiarity with Cadence tools. - Experience working on both host and device sides.

Play senior verification member role and development of verification of SoC level scenarios and IP integration verification Owning the Testbench architecture and development Thriving to bring innovation in Verification Methodologies and optimizing the flow and turn around time. Key contributor for post silicon validation support, pattern generation. Develop tests , Debug failures and perform root cause analysis Develop/execute/debug test cases in simulation and Pre-Sillicon Validation on palladium Collaborate with validation and FW teams. Working closely with different teams within organization and tracking bugs to closure Be involved in SOC bring-up and Pre/Post Si ValidationQualifications ...

Greetings from Excel Enterprises !!! Our client, an SoC Design and Semiconductors manufacturing company is inviting applications from experts with rich experience in Front end design/validation Please find below brief details of the roles and responsibilities Senior Technical Director, SOC System Verification & Validation: Driving development and implementation of SoC System Verification and Validation design flow in collaboration with the main design team Define strategy of using different tools and infrastructure (incl emulation and prototyping) Develop the methodology of emulation using on-premise and remote platforms Participate in improvements and optimization of current design flow wit...

Perform analysis and investigations using various data sources to identify and defend against novel fraud and abuse on Google's ad products. Collaborate with Engineering teams to enhance ad traffic infrastructure, defense systems, and workflows. Proactively identify and implement efficiency improvements through advanced machine learning techniques, scaled defenses, and automation. Drive full life-cycle projects across Product, Engineering, and Trust and Safety teams to prevent abuse by improving policies and closing product vulnerabilities. Work closely with cross-regional and cross-functional stakeholders at all levels to communicate technical concepts effectively. Review or be exposed to s...

MIPI Design Verification Engineer Role & responsibilities Actively hires for MIPI Design Verification Engineers , focusing on complex IP/SoC verification using UVM/SystemVerilog, scripting (Python/Perl), and deep knowledge of bus protocols (AXI/AHB) and MIPI standards, often for high-speed interconnects (HSIO) like PCIe/USB/UFS, leveraging industry-standard ASIC tools for simulation and debugging. Roles range from engineers to leads/managers, emphasizing technical leadership, pre-silicon emulation, and strong communication for platform-level testing, with opportunities in multimedia/video codec verification as well. Key Responsibilities & Skills (MIPI/HSIO focus): Verification Expertise: UVM...

About The Role Your Role As a Senior FPGA Design Engineer at NEC Mobile Network Excellence Center (NMEC), Chennai, you will be responsible for designing, implementing, and testing FPGA-based hardware systems for Datacom and Aerospace applications. You will work closely with cross-functional teams to integrate system components and demonstrate proof-of-concept designs in advanced technologies.In this role, you will: Implement FPGA code on target hardware and test with system components and software. Perform RTL design, implementation, testing, and integration of FPGA-based systems. Deliver high-performance hardware solutions for Datacom and Aerospace applications. Participate in R&D activitie...

Role & responsibilities You will be part of the team verifying SoCs leading to first Si success. Manage and lead a team of Verification engineers SOC verification is coverage driven using latest industry standard methodologies and HVLs. Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases. Code coverage, Functional coverage and assertions are desired. ARM based SoC verification experience is an added advantage. Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus. Multiple positions with emphasis on AMS and Power aware verification. Should have worked on GLS. 50% on SOC v...

Experience: 510 years in SoC Verification withexpertisein CPU DV and Bus Interconnects. Responsibilities: Perform SoC DV and CPU DV for complex architectures. Develop scalable test benches (BFM, Scoreboard, Checkers, Monitors) inSystemVerilogand UVM. Create tests, functional coverage models, andSystemVerilogassertions. Debug issues related to memory architecture (DRAM, Cache, MMU), AXI, PCIe, DDR/HBM. Collaborate with design teams to ensure verification completeness. Technical Skills: Excellent in SystemVerilog (SV) and UVM. Strong knowledge of AMBA protocols, ARM v8/v9, RISC-V, x86 architecture. Proficient in OOP/C++, Python scripting. Excellent debugging skills.

Expertise in Digital Verification Expertise in Functional Verification Expertise in SOC / IP Verification Expertise in working on system Verilog assertions & test benches Expertise in working on OVM / UVM / VMM based verification flow Expertise in working on ARM processor Expertise in working on AMBA bus protocols (AXI, AHB, APB) Expertise in CXL or PCIe Protocol Verification Expertise in simulation tools (VCS, ModelSim, Questa) Expertise in driving Verification Strategy, writing Test Plan, developing Test Bench, Test cases Expertise in analysing Code Coverage, Functional Coverage and Assertions Expertise in verification of complex SoCs Expertise in Test Plan creation and Verification techno...

Introduction The High Speed IO design team delivers both proprietary and industry standard interfaces for IBM's POWER systems and Z Mainframe's processors. With a current data rate up to 64Gbps and rising, verifying the functionality of the digital and analog components in an efficient manner is necessary. Your Role And Responsibilities Understand the design specification, Power On Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design ...

As a senior SOC Verification Lead/Manager at Modern Chip Solutions, your role will involve ASIC Verification with a focus on SOC verification. You will be required to have a minimum of 10 years of experience in the field. The primary locations for this position are in Bangalore and Hyderabad. Key Responsibilities: - Utilize System Verilog and Verilog for ASIC Verification - Implement UVM methodologies for verification processes - Familiarity with various protocols such as DDR, Ethernet, and PCIe would be advantageous Qualifications Required: - Bachelor's degree in Electrical Engineering or related field - Proficiency in System Verilog and Verilog programming - Strong experience in SOC verifi...

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 15 years of experience with Finite Element (FE) or Design Verification, and with fabric interconnect, Network-on-Chip (NoC) design and implementation, Advanced Microcontroller Bus Architecture (AMBA) protocols, and System-on-a-Chip (SoC) integration. 6 years of experience in people management, developing employees. Experience with project management, cross-functional collaboration and stakeholders collaboration. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science. E...

Introduction As a CPU Processor Verification Engineer , you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable customers to make better decisions quicker on the most trusted hardware platform in today's market. Your Role And Responsibilities Lead a team of 5-10 resources Understand the design specification , PowerOn Specification Understand boot firmware and reset flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging log...

Role Overview: You are a Senior ASIC Verification Engineer responsible for verifying complex System on Chip (SoC) architectures, primarily focusing on ARM-based designs. Your role involves collaborating closely with design teams to ensure thorough validation of all aspects of the SoC, from architectural design to implementation. You will develop and implement verification testbenches, execute verification processes, and contribute to the enhancement of verification tools and methodologies to improve product quality. Key Responsibilities: - Develop and implement verification testbenches and components for ARM-based SoC designs. - Execute thorough verification processes, including test plan an...

We are looking for experienced Digital Verification Engineers with strong IP/Sub-System verification expertise. Key Responsibilities Execute IP/Sub-system verification activities. Develop and enhance testbench components (BFM, Scoreboard, Checkers, Monitors). Create detailed test plans, coverage plans, and assertions. Debug failures and provide quick, accurate fixes. Work closely with design and architecture teams. Key Skills Required Mandatory: Ethernet protocol Strong SystemVerilog (SV), UVM methodology Experience in IP/SS verification Hands-on with assertions, functional coverage, testbenches Excellent debugging & problem-solving skills Experience with verification flow and EDA tools

Lead end-to-end verification by creating plans, building test benches, and driving coverage closure. Collaborate with cross-functional teams to ensure robust debugging and high design quality.

Responsibilities Lead the development of verification environments, testbenches, and test cases for IBM server processors, SoCs, or ASICs. Develop expertise in IBM functional verification tools and methodologies. Collaborate with design teams and other stakeholders to debug and fix logic design issues, ensuring high-quality design delivery. Work with development teams to meet verification coverage criteria. Conduct verification at multiple levels including unit, element, subsystem, and system-level verification.

Required technical and professional expertise: Experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification: Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (VHDL,Verilog) Good programming skills in C++/C, Object Oriented Programming(OOPs), Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectivel...

Responsibilities: Create verification environments per UVM Develop test cases and debug failures Support architecture understanding and customer communication Debug and close coverage Build reusable verification IP Collaborate with system architects

Job Description: Location: Bangalore, Hyderabad & Chennai 5-14years of experience in verification & Soc & System verilog,UVM You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven using latest industry standard methodologies and HVLs. Work involves defining verification strategy, writing test plans, developing efficient test benches and test cases. Code coverage, Functional coverage and assertions are desired. ARM based SoC verification experience is an added advantage. Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus. M...

Job Description: In this role as a DV Engineer, you will be responsible for verifying the design and functionality of digital circuits. Your primary task will be to utilize your skills in SOC verification, PCIE, GLS, C/System Verilog, UVM, and GIT to ensure the integrity and reliability of the digital designs. Key Responsibilities: - Verify the design and functionality of digital circuits - Utilize skills in SOC verification, PCIE, GLS, C/System Verilog, UVM, and GIT - Experience in PCIE-VIP usage - Ensure the integrity and reliability of digital designs Qualifications Required: - Proficiency in SOC verification, PCIE, GLS, C/System Verilog, UVM, and GIT - Experience in PCIE-VIP usage Additi...