646 Soc Verification Jobs - Page 6

Role : Design Verification Work Location : Preferred Pune WFO, If candidate is found to be excellent Noida or Bangalore Remote options are open Years of Experience : 4+ Years Education Qualification : MS (or higher) in EE/EC/ECC Engineering Skills Must have excellent knowledge of computer architecture and design verification fundamentals. Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies. Experience in developing complex test bench in System Verilog using OVM/ UVM methodology. Hands-on experience in AMBA protocol, PCIe MAC/ USB /MAC/ Bluetooth MAC/ Wifi 802.11 MAC layer protocol. Experience in Low Power Simulation/UPF setup, d...

Develop/Maintain tests for functional verification and performance verification at the core level Build testbench components to support the next generation IP Maintain or improve current test libraries to support IP level testing Create hardware emulation build to verify the IP functional performance Maintain and improve current hardware emulation environment to speed up the runtime performance and improve the debug facility Provide technical support to other teams PREFERRED EXPERIENCE: Good at C/C++ Familiarity with SystemVerilog and modern verification libraries like UVM Experience/Background on Computing/Graphics is a benefit Experience with OpenGL/OpenCL/D3D programming is a benefit

About the Role: We are seeking an experienced Design Verification Engineer with 5 to 10 years of hands-on experience in verifying complex digital designs, particularly in IP cores, SoCs, and PCIe protocols. The ideal candidate will have deep expertise in developing and executing verification plans, writing testbenches, and automating verification environments to ensure high-quality silicon delivery. Key Responsibilities: Develop and implement comprehensive verification plans and strategies for IP, SoC, and PCIe blocks. Create and maintain advanced verification environments using SystemVerilog, UVM (Universal Verification Methodology), and other relevant methodologies. Write and debug directe...

Demonstrate a solid understanding of the CPU/CPU Based SoC Verification. Must have good understanding of one or more of the following domains ARM v8/v9, RISC-V, x86 Architecture Memory Architecture(DRAM, Cache, MMU), GIC, SoC Debug Architecture Cache Coherent Architectures PCIe OSCI Layer and its functionality PCIe Phy , Bring up and trainin SoC DV, BUS Interconnects Understand architecture and micro-architecture specifications. Work closely with Architects and Logic Designers. Develop Unit Level and/or Subsystem Level Test plans, Coverage Plans and checker Plans needed to target zero defect post-silicon quality. Develop scalable Test benches in System Verilog and UVM. Develop Tests, Functio...

What you will do Work on creating verification plan based on the IP design specification Build Standalone IP test bench using System Verilog Develop test cases, coverage model and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC) Use the IP/ SOC RTL in system verilog based logic verification environment & complete the functional verification Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality. Deliver the functional test vectors needed to be used for post-silicon validation. Be the single point contact for the concerned IP Verification and enable the Tapeout for all contro...

Demonstrate a solid understanding of the CPU/CPU Based SoC Verification. Must have good understanding of one or more of the following domains ARM v8/v9, RISC-V, x86 Architecture Memory Architecture(DRAM, Cache, MMU), GIC, SoC Debug Architecture Cache Coherent Architectures PCIe OSCI Layer and its functionality PCIe Phy , Bring up and trainin SoC DV, BUS Interconnects Understand architecture and micro-architecture specifications. Work closely with Architects and Logic Designers. Develop Unit Level and/or Subsystem Level Test plans, Coverage Plans and checker Plans needed to target zero defect post-silicon quality. Develop scalable Test benches in System Verilog and UVM. Develop Tests, Functio...

Key Skills and Responsibilities: IP verification Using SV/UVM or SOC Verification using C/SV VIP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART (3+) High Speed Serial Interfaces: PCIe Gen 3/4 or USB or MIPI or UPF or DDR Coverage Closure: Code, Functional and Toggle Tools: Synopsys VCS or Cadence Incisive Technical Documentation: Testbench Specification, Test Plan Specification Good exposure to Scripting skills like Perl or Python or Shell or TCL Bachelors in Electronics Engineering is a minimum requirement Masters in Electronics or Computer Science Engineering is an added advantage 5 to 15 years minimum Exposure to working in multi-national environmen...

We are looking for skilled Senior ASIC/SoC RTL Engineer / Lead / Managers with 5-20 years of experience to join our team in Bangalore, Chennai, Hyderabad, Kochi, Pune, Noida, and Ahmedabad. The ideal candidate will have expertise in SoC/IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog, AMBA bus protocols (AXI, AHB, ATB, APB), interface protocols, and scripting languages like Make flow, Perl, shell, and Python. Roles and Responsibility Design and develop high-quality ASIC/SoC RTL code. Lead the development team in integrating subsystems and clusters at the SoC level. Collaborate with cross-functional teams to ensure successful project execution. Develop and ...

Position: Sr.Design Verification Engineer-Lead and above Experience: 5+ years to 30 years Location - Bangalore/Hyderabad Notice period: immediate to 30 days most preferable. Position Description: To be part of a highly skilled ASIC Team working on the newest technology nodes Responsible for overall IP verification from test plan creation, UVM development to signoff. Pair with similar domain specialists across other geographical locations on core technical initiatives SKILLS required: Good knowledge of System Verilog TB, UVM Methodology, Debug and VIP Development Exposure of SERDES/UNIPRO/PCIE/UFS/DDR protocols is an advantage Exposure to verification of complex high speed PHY Proven track re...

You have a rewarding opportunity at Qualcomm India Private Limited in the Engineering Group, specifically in the Hardware Engineering team. As a Senior SoC Design Engineer, you will play a crucial role with your extensive experience in SoC design and expertise in various protocols and architectures. Let's delve deeper into the responsibilities and qualifications required for this role: **Role Overview:** - Utilize your 15+ years of experience in SoC design to contribute effectively to the team - Demonstrate proficiency in AMBA protocols such as AXI, AHB, and APB, as well as SoC clocking/reset/debug architecture - Showcase your knowledge of peripherals like USB, PCIE, and SDCC - Gain an under...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle devel...

This Position reports to: TCMS Project Technical Lead Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. The work model for the role is: Onsite/HybridThis role is contributing to the Motion Business Traction division in Bengaluru. Main stakeholders are railway/rolling stock integrators. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle ...

We are looking for a skilled Design Verification Engineer with 6 to 11 years of experience. The ideal candidate will have expertise in System Verilog and UVM, PCIe, Ethernet, and solid Linux environment skills. This position is available in Bangalore, Hyderabad, and Ahmedabad. Roles and Responsibility Develop and implement verification environments using System Verilog and UVM. Verify IP, SOC, and pre-silicon designs. Collaborate with cross-functional teams to identify and resolve design issues. Create and maintain testbenches and testcases for verifying complex digital circuits. Analyze and debug verification results to ensure design quality. Participate in the development of new verificati...

Job Description: We're looking for a verification SME, responsible for the SoC verification process and designing the next-generation HBM DRAM products. Deep understanding of SoC Verification, testbench architecture, SoC verification methodologies, and 2.5D & 3D package integration. Responsibilities: • Develop test plans at SOC Level and analyze Coverage. • Build verification environments to verify complex SOCs. • Develop Random/Directed test in RTL and GLS environments. • Review architectural specifications to ensure high quality. • Work with customers to understand their verification &validation requirements • Debug and identify root causes and solutions for pre-silicon and post-silicon is...

As a member of the Front End CAD team, you will be responsible for the development, standardization and maintenance of engineering flows that enable system verification activities within the Solutions Engineering team, working with engineers from our project teams to help them deploy best-practise across a common set of requirements. The flows you will help to develop will include areas such as simulation, emulation and formal verification and advancements in machine-readable specifications to aid automation of standard methodology within SE, enabling our verification community to achieve the best possible results. You will collect and analyse verification metrics and work with tools from mu...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder expectat...

Your role and responsibilities: Lead the TCMS scope of railway projects, ensuring end-to-end delivery from requirement gathering to commissioning. Collaborate with global stakeholders and customers to design, validate, and implement TCMS solutions in compliance with international standards and railway-specific protocols. You will be mainly accountable for: Lead TCMS engineering activities across the project lifecycle, aligned with EN50657 and EN50128 V-cycle development models. Translate functional descriptions into Software Requirement Specifications (SRS) and logical/mathematical models. Conduct internal and external design reviews, ensuring alignment with project goals and stakeholder exp...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MI...

Hi All, We are having opportunities for Design verification lead with SOC Verification Exp for Hyderabad location Exp: 3-8 yrs Loc: Hyd Skills: Soc Verification If Interested, please share your resume to sushma.vunnam@modernchipsolutions.com

Main responsibilities : Acquire knowledge of the architecture and microarchitecture of the ASIC by studying specifications and interacting with the architecture and logical design teams. Participate in defining overall verification strategies and methodologies, and the required simulation environments. Develop, maintain and publish verification specifications. Write and perform closely test plans with the logical design team. Develop coverage models and verification environments using UVM-SystemVerilog / C ++ Monitor, analyze and debug simulation errors. Monitor and analyze simulation coverage results to improve tests accordingly thereby achieving coverage targets on time. Submit recommendat...

Role Overview: You will be leading a team in Intel's Custom Silicon Business, setting priorities, defining, verifying, and documenting the team's work. Your role will involve leading engineers in SoC verification, demonstrating self-motivation, strong communication, problem-solving skills, and teamwork. Additionally, you must be flexible to work in a dynamic environment, multitask seamlessly, and be hands-on in developing test content and achieving coverage closure. Key Responsibilities: - Create verification plans and milestones - Conduct test plan and code reviews - Ensure coverage closure and complete verification signoff Qualifications: - Btech/Mtech with 20+ years of experience in compl...

About The Role Your Role As a SoC GLS Verification Engineer , you will play a key role in verifying complex SoC designs through Gate-Level Simulation (GLS). You will work closely with design and verification teams to ensure functional correctness, timing accuracy, and overall quality of silicon-ready designs. Your expertise in GLS methodologies and debugging will be critical in delivering high-performance, reliable SoCs. In this role, you will: Perform GLS using Zero Delay , SDF , and Post-Layout GLS (PAGLS) techniques. Debug and resolve issues in gate-level simulations to ensure timing and functional correctness. Develop and maintain SystemVerilog/UVM testbenches for GLS environments. Colla...