304 Soc Verification Jobs - Page 6

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Share your Resume to mansoor@hisoltech.com

Key Responsibilities Define and implement DFT architecture for digital IP and SoCs. Insert and verify scan chains, boundary scan (JTAG), and test points. Develop and run ATPG and MBIST for various memory instances. Health insurance

Experience with OVM/UVM/VMM/Test Harness, developing assertions, checkers, coverage, and scenario creation.,min 2 to 3 SoC Verification projects.developing test and coverage plans, verification environments, and validation plans,

Job Description Must have: Must Have Required Expertise: Should be able to build test plan, tests, coverage assertions from Specification. Architect and build testbench and testbench components. Good in UVM,SV,C SVA. Familiar with industry protocols, such as AXI, APB, AHB, PCIe, SoC. Very good in debugging. Worked with industry standard EDA tools Synopsys, Cadance simulators and debugging tools. Good to have skills: Experience with scripting and automation. Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS and a proactive approach to automation. Exposure to SOC verification, Formal verification methodologies.

Role & responsibilities Test bench development and debug UVM/C based test case development and debug. Power aware test case development and debug External/Internal VIP based test development and debug. Mixed-signal block modelling and RNM based testing. Coverage analysis (code, functional, assertion) Verification plan reviews, Verification reviews Back-annotated netlist simulation execution and debug Debug failing cases & Coverage improvements.

About the Role Skills: Strong in IP / SoC-level verification Responsibilities Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Experience: 5+ years in Design Verification Required Skills Strong in IP / SoC-level verification Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Availability: Immediate to within 4 weeks

Job Description : We are looking for experienced SoC Verification Engineers with a strong background in ARM-based SoC architectures . Key Responsibilities : Perform verification at SoC level for ARM-based designs Develop, implement, and debug testcases and verification environments Work closely with RTL, DFT, and firmware teams to ensure high-quality SoC delivery Handle integration and verification of various IPs within the SoC Required Skills : 5+ years of experience in SoC-level verification Strong knowledge of ARM architecture (Cortex-A/M, AMBA protocols, etc.) Expertise in SystemVerilog/UVM , testbench development, and scripting Familiarity with simulation tools like VCS, Questa, etc. Experience with debugging tools and waveform analysis

Role & responsibilities Please interested candidate send me cv : galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Industry: SEMICON Position Name SoC NoC Verification Engineer Job No : PROX-14080 Position type: Permanent Total Exp: 7+ years to 15y HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore Job Description Must have: SoC NoC Verification Engineer with 7+ years of experience This role involves developing test plans, writing verification code, debugging issues, and collaborating with design teams to validate complex interconnect systems. Key Responsibilities Develop and execute verification plans for SoC and NoC architectures. Write and maintain test benches using SystemVerilog/UVM. Perform functional, performance, and power verification. Debug and resolve design and verification issues. Work with high-speed interconnect protocols (AXI, CHI, PCIe, Ethernet, CXL, UCIe). Work closely with design and architecture teams to ensure compliance with specifications. Client is looking for Network on chip , just look for the NoC verification AMD (Dont Share AMD Profiles) Preferred candidate profile

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience in AMBA AXI/AHB/APB System buses Hands on work experience on any of PCIe/Eth/USB/DDR etc. Hands on experience with System Verilog Assertions Scripting for automation, release process, simulations, regressions Good command over written and oral communication Desirable Skills Lead the Verification IP development with 2 or more junior engineers Exposure to full verification cycle Desired Skills and Experience DV Engineer, Design Verification, Verification Engineer

Role & responsibilities 7+ years of design verification experience. MS (or higher) in EE/EC/ECC Engineering As a member of the Design Verification [ Pre-Silicon DV ] Team for client WCS/SCE BU You will be responsible for verification of various IPs and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architecture and design verification fundamentals Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies Must have experience in developing complex test bench in System Verilog using OVM/ UVM methodology Hands-on experience in AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol Experience in Low Power Simulation/UPF setup, debug low power simulation failures. Exposure to scripting languages like Perl, Unix shell or similar languages Good to have some experience with assembly language programming required Excellent written and oral communication skills necessary

JOB DESCRIPTION : Experience in verification of coherent protocols like ARMs ACE/CHI and Network-on-chip (NoC) Experience in ARM or x86 assembly language programming Prior experience in CPU or other IP verification Food allowance Health insurance Annual bonus

As a verification engineer with a knowledge of subsystems and SoCs you will make valuable contributions to a team tasked with verifying the functional correctness of SoC Engineers will have ample opportunities to collaborate with designers and architects to understand design specifications and build a functional verification strategy Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules Work with the Emulation/FPGA team in understanding various verification collaterals required for driving stimulus at the board level Work with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development Senior engineers are also encouraged to support junior members Required Skills and Experience 8+ years of proven experience in working on IP/Subsystem/Soc Verification Experienced in Protocol on Flash Storage device Controller with unipro and MIPI PHY Experience in Working on any of cross functional flows like Reset, Ras(Error and Interrupt), Security, Low Power/ Power Management Good Skills in System Verilog, shell programming/scripting (e g Tcl, Perl, Python etc ) Experienced in one or more of various verification methodologies UVM, formal and low power Exposure to all stages of verification requirements collection, creation of test plans, testbench implementation, test cases development, documentation, and support Experience with various front-end verification tools Dynamic simulation tools, Static Simulation tools and Debuggers Nice To Have Skills and Experience Possess knowledge of object-oriented programming concepts Practical experience of working on Processor based system design Experience in Server/ Infrastructure SoC Strong understanding of CPU Architecture / micro-architectures! Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues We are a diverse organization of dedicated and innovative individuals, and dont discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran Hybrid Working at Arm Arms hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the teams needs Details of what this means for each role will be shared upon application In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution Please talk to us to find out more about what this could look like for you In Return We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together These behaviors are assessed as part of the hiring process Partner and customer focus Collaboration and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises We offer a hybrid approach to home and office working to provide an adaptable experience for all employees We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements Accommodations at Arm At Arm, we want to build extraordinary teams If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm com To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility Please email us about anything we can do to accommodate you during the recruitment process

1. Knowledge of Electrical Vehicle. 2. Knowledge of CAD Tools. 3. Knowledge of Capital Harness/VeSys Electrical software. 4. Good Exposure of 3D ModelingAssy. Drafting in NX Software. 5. Detail design of wiring harness, lighting, switches, sensors, ECU, harness routing & instrument clusters, EV Battery, Motor, CAN and battery charging system. 6. Design knowledge of Subsystem of Tractor. 7. Having Exposure for the implementation of the new development of components, mainly responsible for the designing of Electrical Vehicle related components & involving during the development and proto activities. 8. Having the complete Tractor Knowledge. 9. Should be specialized in Vehicle Integration and Co-ordination with aggregate [Transmission/Hydraulic/Engine] Experience 4 - 7 Years Industry Engineering Engineering Design R&D Quality Qualification Other Bachelor Degree Key Skills Electrical Vehicle Capital Harness Can System Vehicle Integration Electric Vehicle Electrical Manager

We are seeking a highly skilled and experienced DV Lead to drive the verification of complex System-on-Chip (SoC) designs. The ideal candidate will be proficient in SoC-level verification methodologies , have strong expertise in writing C test cases for embedded systems, and lead verification planning and execution for SoC projects. Key Responsibilities: Lead the end-to-end SoC verification lifecycle, from test planning to coverage closure. Define verification strategy , test plans, and verification infrastructure for SoC-level designs. Develop and execute C-based test cases for processor and peripheral verification in a simulation/emulation environment. Collaborate with RTL design, firmware, and software teams to ensure complete SoC-level functional coverage. Drive debugging efforts across multiple functional blocks and coordinate with cross-functional teams to resolve issues. Utilize industry-standard verification tools and methodologies (e.g., UVM, System Verilog, C, scripting). Manage a team of verification engineers and ensure timely delivery of milestones.

Experience: 6 - 15 years Responsibilities: Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/DDRx/LPDDRx/AI accelarator integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog/Verilog testbenches and tests, and debugging of test failures and issues. Working with project management and leads on planning tasks, schedules, and reporting progress Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development Required Skills and Experience Proven understanding of digital hardware verification language Verilog/Systemverilog HDL Experience in SoC verification using Embedded Low-level programming including C/C++ tests and assembly language(preferably ARM) Experienced in SoC verification using Experienced in one or more of various verification methodologies UVM/OVM, formal, power aware verification, emulation Exposure to all stages of verification: requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support Good Problem Solving and Debugging skills. Knowledge of SoC Verification Flow and strategy. Experience with ARM-based designs and/or ARM System Architectures, SoC Boot flow, Cache coherency Porting peripheral driver software for SoC tests Clock Domain Crossing verification Experienced in GLS, DFT/DFD, Experienced in UPF Power Aware verification Automation experience with shell programming/scripting (g. Tcl, Perl, Python etc.)

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics, AI or connectivity processor and related IP. You will: Be responsible for the delivery of all verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off Create verification plans, develop and maintain UVM testbench components Track and report verification metrics and closure Participate in all stages of design specification definition providing feedback from the verification perspective Develop testbenches in UVM, write tests, sequences, functional coverage, assertions & verification plans. Be responsible for the definition, effort estimation and tracking of your own work Be able to influence and advance our GPU verification methodology Have the opportunity to lead, coach and mentor other members of the team Participate in design and verification reviews and recommend improvements About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Have a proven track record of developing verification environments for complex RTL designs Have excellent understanding of constrained-random verification methodology and challenges of verification closure Be confident in defining verification requirements, and work out the implementation approach and details of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of SystemVerilog and UVM Be able to develop new verification flows Have working knowledge of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work Experience working on multiple projects at one time The skill to be able to communicate technical issues both in written form and verbally You might also have: Experience leading teams Graphics/GPU/CPU/SoC knowledge Experience in wider verification technologies, such formal property based verification and code mutation Skill scripting in Python, TCL, Perl, SystemC, C++ experience Understanding of functional safety standards such as ISO26262 Who we are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets. Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces. We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before. So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest. Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions. As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology. Additional information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec.com.

The role This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group. Here you will exercise your skills on key components that meet latest demands and improvements for graphics IP. You will: Be responsible for the delivery of all verification activities related to a GPU component or sub-system from early stages of verification planning to sign-off Create verification plans, develop and maintain UVM testbench components Track and report verification metrics and closure Participate in all stages of design specification definition providing feedback from the verification perspective Develop testbenches in UVM, write tests, sequences, functional coverage, assertions & verification plans. Be responsible for the definition, effort estimation and tracking of your work Be able to influence and advance our GPU verification methodology Participate in design and verification reviews and recommend improvements About you Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard. You'll have: Have a proven track record of developing verification environments for complex RTL designs Have excellent understanding of constrained-random verification methodology and challenges of verification closure Be confident in defining verification requirements, and work out the implementation approach and details of a testbench Be able to do root-cause analysis of complex issues and resolve them in a timely manner Have excellent knowledge of System Verilog and UVM Be able to develop new verification flows Have working knowledge of ASIC design methodologies, flows and tools Be able to plan, estimate and track your own work The skill to be able to communicate technical issues both in written form and verbally You might also have: Graphics/GPU/CPU/SoC knowledge Experience in wider verification technologies, such formal property based verification and code mutation Skill scripting in Python, TCL, Perl, SystemC, C++ experience Understanding of functional safety standards such as ISO26262 Who we are Imagination is a UK-based company that creates silicon and software IP designed to give its customers an edge in competitive global technology markets. Its GPU and AI technologies enable outstanding power, performance, and area (PPA), fast time-to-market, and lower total cost of ownership. Products based on Imagination IP are used by billions of people across the globe in their smartphones, cars, homes, and workplaces. We need your skills to help us continue to deliver technology that will impress the industry and our customers alike, ensuring that people everywhere can enjoy smarter and faster tech than ever before. So come join us if you're wanting that something more Bring your talent, curiosity and expertise and well help you do the rest. Youll be part of one of the worlds most exciting companies who are one of the leaders in semiconductor IP solutions. As a part of our team, you can help us transform, innovate, and inspire the lives of millions through our technology. Additional information If you encounter accessibility barriers in the application process or if you have access needs and require support or adjustments to participate equitably in the recruitment process, please email recruitment@imgtec.com.

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Bengaluru. But youll also get to visit other locations in India and globe, so youll need to go where this job takes you. In return, youll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! This is your role Deploy Siemens EDA ProFPGA prototyping software and hardware solutions at customers and guide the customers to successful design bring-up Work closely with R&D to solve problems, review product specs, and find good general solutions that improve the overall product Train AEs and customers on the solutionWin pre-sales engagements in cooperation with the technical sales teams Successfully deploy our solutions at early customer sites. This means educating the customer on best practices and tool requirements. It also means working with R&D to make the tool improvements necessary for the customers success. Ensure existing customers maximize the value they receive from the solution by developing and enhancing methodology that exploits the solutions capabilities Ensure customers are kept up-to-date with the latest enhancements Provide customer requirements to R&D and marketing Work with QA and Docs to help them create tests and documentation that will improve our solutions Create examples and tutorials that are shipped with our products. Develop and/or refine methodology employed in creating and using prototypes and maximizing the value of our prototyping solution We dont need superheroes, just super minds! A good understanding of FPGA based hardware prototyping platforms Working knowledge of multi FPGA prototyping flows(Synthesis, partitioning, PnR, runtime and debug) Practical insights into the application and usage of FPGA prototyping systems Knowledge of design mapping, testbench mapping and transactor development Expertise of hardware/software debug solutions related to FPGA prototyping Knowledge of test bench acceleration, ICE and co-model solutions Highly proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification Solid background in Functional Verification, RTL synthesis and PnR flows Conversant with SoC design and architecture concepts Good communication and inter-personal skills. #disw #LI-EDA #LI-Hybrid A collection of over 377,000 minds building the future, one day at a time in over 200 countries. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrows reality. Find out more about the Digital world of Siemens here:/digitalminds Siemens Software. Where today meets tomorrow

Real trendsetters in every language. Before our software developers write even a single line of code, they have to understand what drives our customers. What is the environment and the user story based onImplementation means trying, testing, and improving outcomes until a final solution emerges . Knowledge means exchange discussions with colleagues from all over the world. Join our team and enjoy the freedom to think in completely new categories. Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen5/Gen6, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CXL for use with Questa RTL simulation. We make real what matters. This is your role. Questa verification IPs help design teams find more bugs in less time than conventional simulation techniques. You will specify, implement, test and enhance these verification components for a wide range of end user applications. You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger. You will get along with TMEs and Field AEs or directly with customers to deploy or resolve customer issues. We dont need superheroes, just super minds. You're an Electronics Engineer ( B.Tech / M.Tech ) or related field from a reputed institute You've got phenomenal knowledge of verification engineering and have between 2 - 8 years of working experience as well. You've sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc. You've intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe , Flash, DIMM etc. You are a great teammate, resilient and sincere, Enjoy learning new things and build knowledge base in new area. Weve got quite a lot to offer. How about you This role is based in" Noida " but " youll get the chance to work with teams impacting entire cities, countries- and the shape of things to come. The pace of innovation in electronics is constantly accelerating. To enable our customers to deliver life-changing innovations to the world faster and to become market leaders, we are committed to delivering the worlds most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services. We, at Siemens EDA enable companies to develop better electronic products faster and more efficiently. Our innovative products and solutions help engineers conquer design challenges in the increasingly sophisticated worlds of board and chip design We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate

Increasing digitalization and flexibility of production processes presents outstanding potential. In Digital Industries, we enable our customers to unlock their full potential and drive digital transformation with a unique portfolio of automation and digitalization technologies. From hardware to software to services, weve got quite a lot to offer. How about you We blur the boundaries between industry domains by integrating the virtual and physical, hardware and software, design and manufacturing worlds. With the rapid pace of innovation, digitalization is no longer tomorrows idea. We take what the future promises tomorrow and make it real for our customers today. Join us - where your career meets tomorrow. Looking for Siemens EDA ambassadors We are passionate about innovations that mean real progress, and we are curious about technologies that still need to be developed. Do you want to use curiosity, passion, and creativity to make the lives of millions of people easier and betterJoin us- whichever path you take, were looking forward to seeing your point of view! Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group develops transactors (RTL based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and growing further. This is your Role Individual will be responsible for developing transactor (xVIP) solutions for CCIX or PCIe based interconnect technology. Primary responsibilities include understanding standard specifications, develop architecture and micro-arch for the design and writing a synthesized design using Verilog/System Verilog. Required Experience: We seek a graduate with at 1-8 years of relevant working experience with (BE/BTech/ME/MTech/MS) from a reputed engineering college. We value your experience on the protocol e.g. PCIe, USB, Ethernet, AMBA in Design or Verification. Good understanding of IP Verification Methodologies, Verification procedures and practices are plus! Experience in one or more verification techniques such as simulation, emulation, acceleration, formal, etc We value expertise in Verilog, SystemVerilog, and SystemC, as well as experience in developing RTL for FPGAs, ASICs, and IPs, as this will greatly contribute to the quality of our products. We expect candidates to be able to build verification test plans and environments, develop test cases, utilize VIPs, and efficiently debug defects identified during verification processes. We consider exposure to object-oriented programming languages like C++ an advantage, and experience in scripting languages such as Perl will also be valuable in automating tasks and improving efficiency. You need to engage with customers for Deployment and R&D assistance. We've got quite to offer, how about you Join our Digital World We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. At Siemens, we are always challenging ourselves to build a better future. We have some of the most inquisitive minds working across the world, re-imagining the future and doing extraordinary things. #LI-EDA #LI-HYBRID

* Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering.* Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment.* Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU.* Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments.* Develop verification test plan for both functional and performance verification including the estimation for coverage closure.* Support higher level core/system simulation environment.* Participate in post silicon lab bring-up and validation of the Hardware.* Lead , guide ,mentor a team of engineers and represent them at global forums.* Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement.* Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. * Hands-on on Power Management domain Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of power management unit verification.* Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. * Experience with high frequency, instruction pipeline designs* At least 1 generation of Processor Core silicon bring up experience* In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)* Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design* Proficiency in C++, Python scripting or similar object oriented programming languages.2:37Y Annapurna Bharathi Preferred technical and professional experience * Knowledge of instruction dispatch and Arithmetic units.* Knowledge of test generation tools and working with ISA reference model.* Experience with translating ISA specifications to testplan.* Knowledge of verification principles and coverage.* Understanding of Agile development processes. * Experience with DevOps design methodologies and tools.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Knowledge of verification principles and coverage. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. . Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of complete processor pipeline stages. Good understanding of computer architecture, including Processor core design specifications,processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units Experience with high frequency, instruction pipeline designs. At least 1 generation of Processor Core silicon bring up experience. In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages.. Preferred technical and professional experience Nice to haves - Knowledge of verification principles and coverage. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

Role: SoC NoC Verification Lead Location: Bangalore Job Type: Full Time Work mode: Onsite - 5 days WFO 10+ years of experience, the role typically expands to include leadership, strategic planning, and advanced debugging. This role involves developing test plans, writing verification code, debugging issues, and collaborating with design teams to validate complex interconnect systems. Key Responsibilities: Lead verification projects for complex SoC and NoC architectures. Develop advanced verification methodologies using System Verilog/UVM. Good in verifying the communication between the CPU subsystem and the NoC (instruction/data/caches) not just general NoC trafficor peripheral interfaces. Working with cache, MMU, interrupt systems is also important. Cache coherency protocol testing Guide teams in debugging and resolving intricate design issues. Optimize performance, power, and coverage metrics. Work with high-speed interconnect protocols (AXI, CHI, PCIe, Ethernet, CXL, UCIe). Manage test bench architecture and automation frameworks.