407 Design Verification Jobs

Job description About The Role Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 4+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Monitoring and improve existing simulation environments and simulation efficiency. Good to Have: Building emulation models, enabling content Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support.

Position : ASIC Design Verification Engineer Requirements : 2Years to 15Years experience in SystemVerilog/UVM-based verification for IP/SoC Skills in assertions, formal verification and emulation Experience with high-speed interfaces (PCIe, DDR, Ethernet), scripting (Python, TCL, Perl) and working across cross-functional teams Responsibilities : Full verification closurefrom test planning and testbench development to formal, emulation-based verification and ensuring first-pass silicon success Role & responsibilities Preferred candidate profile

Core Technical Skills : SystemVerilog / UVM testbench and coverage methodologies Constraint-random verification, simulation and debug flow Formal verification techniques (e.g. Jasper, VC Formal) Scripting languages: Python, TCL, Perl, Shell Experience with high-speed protocols (PCIe, DDR, Ethernet) and emulation tools Resume & Interview Prep Advice : Highlight projects involving ASIC/SoC verification, testbench implementation, coverage closure using UVM/SystemVerilog Reddit+15Reddit+15Meta Careers+15Indeed+8Atos Jobs+8Indeed+8Reddit+1Indeed+1Reddit+2Meta Careers+2Reddit+2Reddit+2Reddit+2Reddit+2 Showcase contributions in debugging RTL, developing functional coverage models, and scripting automation for regressions Next Steps Role & responsibilities Preferred candidate profile

You will be joining Nivo Controls, a company that values the contributions of each individual towards achieving organizational goals and encourages professional and personal growth. We are seeking dynamic, open-minded, hard-working, and self-motivated individuals to fill various roles within the company. As an Engineer in the R&D department, your primary responsibility will be to support design and development activities within the development team. Nivo Controls specializes in instrumentation products that require expertise in Digital Electronics, Analog Electronics, Embedded Systems, and Power Supply development. Your key responsibilities will include testing prototypes, verifying designs, project planning and execution, PCB designing using EAGLE, SMD soldering, and preparing technical documentation such as test procedures and customer-specific documentation. The qualifications required for this position include a Diploma or BE/BTech in Electronics or Instrumentation, along with 1-3 years of experience. The desired skills and experience include a strong foundation in Analog and Digital development, knowledge of AC/DC Power Supplies, hands-on experience in Breadboard model development and testing, Embedded system development on various microcontrollers, proficiency in Embedded C development using different IDEs, familiarity with design verification and validation methods of electronic instruments, component identification and procurement requirements, computer proficiency, good written and verbal English communication skills, and high moral and ethical values. This position is based in Indore. If you are interested in applying for this job, please send your resume to jobs@nivocontrols.com with the job title in the subject line.,

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This will involve working on a variety of components including yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to bring cutting-edge products to the market. Collaboration with cross-functional teams is a key aspect of this role to ensure that solutions meet performance requirements. The ideal candidate should have a minimum of 4 to 6 years of work experience in ASIC RTL Design. Experience in Logic design, micro-architecture, and RTL coding is essential. Hands-on experience with the design and integration of complex multi clock domain blocks is a must. Proficiency in Verilog/System-Verilog and knowledge of AMBA protocols such as AXI, AHB, APB, clocking/reset/debug architecture are also required. Candidates should have experience in Multi Clock designs and Asynchronous interface. Familiarity with ASIC development tools like Lint, CDC, Design compiler, and Primetime is necessary. An understanding of Automotive System Designs, Functional Safety, Memory controller designs, and microprocessors would be advantageous. The role involves close collaboration with Design verification and validation teams for pre/post Silicon debug. Prior experience in Low power design is preferred. Additionally, expertise in Synthesis and a solid grasp of timing concepts for ASIC are must-haves for this position.,

Hands on experience in using SolidWorks CAD tool is required for this role. You should have expertise in various manufacturing methodologies, especially in sheet metal and/or plastics injection molding. It is essential to have experience in designing mechanical and electro-mechanical assemblies, particularly working on complex assemblies in SolidWorks. You should possess excellent drafting and detailing skills, as well as be proficient in GD&T and Tolerance stack up analysis. Experience in manual design calculation and exposure to FEA analysis are important aspects of this role. Supplier interaction and cross-functional coordination for project execution and closure are also key responsibilities. You should have experience in design verification and documentation, as well as in Engineering Change Management. Knowledge of the medical device development lifecycle and standards is required. Experience in Product Teardown analysis, Function analysis, and leading technical evaluations with experts to make decisions are essential. It would be beneficial to have knowledge of VAVE methodologies and tools, as well as global design standards like IEC, UL, CSA, NEMA, or any other compliance standard. You should have experience in design verification, developing and executing protocols, and related documentation. Additionally, performing Failure Analyses and Investigation reports, working out proposals, and cost estimates of project-related costs are part of the responsibilities. Being self-motivated and proactive is important for this role, as well as taking complete ownership of the assigned projects.,

Exp 5-10 yrs NP: Immediate to 45 days Location : Pune/Bangalore Contract role Skills : system Verilog, PCIe, Ethernet, verification JD: You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architecture and design verification fundamentals Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies Must have experience in developing complex test bench in System Verilog using OVM/UVM methodology Hands-on experience in AMBA protocol, PCIe MAC, USB MAC, Bluetooth MAC, Wifi 802.11 MAC layer protocol Experience in Low Power Simulation/UPF setup, debug low power simulation failures. Exposure to scripting languages like Perl, Unix shell or similar languages Good to have some experience with assembly language programming required Excellent written and oral communication skills necessary. Interested candidates can send me your resume to Renuka@Sincera.in

Job Description Job Overview: The Principal Structural Engineer is responsible for interpreting internal or external business issues and recommending best practices. They will be tasked with solving complex structural-related problems and will work independently with minimal guidance. The Principal Structural Engineer may be responsible for leading functional teams or projects and is regarded as a specialist in the field of structural engineering. As such, they must have in-depth expertise in structural engineering as well as broad knowledge of the structural discipline within the engineering function. Responsibilities Key Tasks and Responsibilities: Perform conceptual, FEED, and detailed analyses and design as per design basis, project specifications, design codes, and standards Apply in-depth skills and broad knowledge of the business to address complex problems and nonstandard situations Prepare clear and accurate detailed design calculations and analyses including design reports and - procedures Manage own time to meet objectives and (as Lead Engineer) forecast and plan resource requirements Clearly communicate and explain difficult concepts and persuade others to adopt a point of view When acting as Lead Engineer, in addition: Direct medium or large Engineering team as a Lead Engineer Lead the Discipline engineering design of the assigned work area and complete it within the planned schedule and budget, in accordance with standards, MDR, and project-specific procedures and to a high professional standard Plan, organize, and direct all aspects of Discipline execution on the assigned project including scope, deliverables, schedule, and all manpower resources - agree allocations with the Discipline Manager Ensure interfaces and deliverables are clearly identified Maintain responsibility for progress and productivity, identifying any required corrective action Act as project representative for the Discipline during meetings with Project Team, Customer discipline lead and relevant agencies such as certifying authorities, auditors, third parties, etc. Train/mentor other employees in the department Assist and monitor MOPEX offices on projects Has a good understanding of the other engineering departments Initiate interface with other disciplines to obtain input for discipline designs Has a good understanding of construction/fabrication yard and client requirements Has commercial insight Helps to maintain unifi Prepare bid from sketching data, using experience Supervise engineers and designers Define scopes of work for engineering/construction fabrication yard Provide engineering support as required Perform engineering checks of drafting Perform engineering checks prepared by others within the discipline Perform design verification through single discipline check and assist with inter-discipline checks (IDC) Prepare MTOs of structures Prepare specifications Prepare subcontract Review of vendor data Prepare technical bid evaluations Assist in furthering the department Tasks as Lead Engineer: Work as Lead Engineer on medium to large-size EPC projects Responsible for all engineering and design work on any project Has full control and manages work hours, materials, progress Work in close liaison with the Design Coordinator Set up all engineering computer systems Assist Project Manager in: Preparing deliverable control Preparing schedule Preparing progress reports Preparing man-hour and capital expenditure estimates Coordinate with project management Train personnel under their supervision Is responsible for discipline within the engineering group Manage (design) subcontracts Identify and manage changes in the scope of work Is responsible for filing of engineering work Give relevant feedback to the department Reports to: Project: Project: Project Engineering Manager, or Project Manager Functional: Supervising Department Manager Liaise with: All Engineering disciplines, Construction site/Fabrication Group, Safety Dept, Project Management Team, Document Control, Project Planner, Project Cost Controller, QC and Certification Group, Procurement Group, Subcontractors and Vendors, and Customers Supervises: Senior Engineers, Engineers and Designers Qualifications Essential Qualifications and Education: Bachelor&aposs Degree or Master&aposs Degree in engineering 15-20 years of experience in oil and gas with a major contractor or consultants predominantly performing detail design Preferably Registered Professional Engineer or member of professional engineering society as applicable Seasoned structural knowledge Very good organizer, motivator, and supervisor Able to solve problems without assistance Keen on improving the effectiveness of the work HSE, TQM and cost-conscious Fluent in English, both oral and written Understanding and supporting company goals and work processes Show flexibility and ensure proper hand-over with regards to: The reassignment to other departments/construction sites/fabrication yards The reassignment to other McDermott offices The replacement of colleagues during illness and holidays The provision of assistance to other colleagues with heavy workloads (also other projects) when possible/desirable The managing/learning of future current working methods and software applications Detailed knowledge of design techniques and analysis methods, and detailed knowledge of the theory, content, and application of standards, codes, and guidelines as applicable Knowledgeable in project coordination and execution skills About Us Our ingenuity fuels daily life. Together, weve forged some of the most trusted partnerships across the energy value chain to make what was once just an idea a reality: laying subsea infrastructure thousands of feet below sea level, installing platforms hundreds of miles from shore, using our expertise to design and build offshore wind infrastructure, and reshaping the onshore landscape to deliver the energy products the world needs safely and sustainably. For more than 100 years, we&aposve been making the impossible possible. Today, we&aposre driving the energy transition with more than 30,000 of the brightest minds across 54 countries. Show more Show less

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a design verification engineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11) team, with various wireless technologies embedded into an ARM based SOC infrastructure. You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Skills/Experience: - 6-15 years experience in Digital Design with a leading chipset company - Decent knowledge in Wireless connectivity technologiesIEEE 802.11 a/b/g/n/ac/ax/be - Knowledge in SoC architecture, including CPUs (preferably ARM), communications peripherals, multi-domain clocking, bus & interconnect structures, and power management - Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing - Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts - Strong knowledge on Digital communication engines viz., Demodulator, Deinterleaver, Viterbi/Turbo Decoders, Sigma-Delta modulation, Base band filters, FFT etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Good knowledge on AMBA protocols (CHI/AXI/AHB) Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Execute verification plans, regression enabling for all features and, debug of the test failures Hands-on experience of GLS and timing simulations Exposure to Formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: General Summary Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle. Roles And Responsibilities Performance exploration. Explore high performance strategies working with the CPU modeling team. Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. Functional verification support. Help the design verification team execute on the functional verification strategy. Performance verification support. Help verify that the RTL design meets the performance goals. Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and po Preferred Qualifications Thorough knowledge of microprocessor architecture including expertise in one or more of the following areasinstruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding of low power microarchitecture techniques Understanding of high performance techniques and trade-offs in a CPU microarchitecture Experience using a scripting language such as Perl or Python Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Principal Design Verification Engineer Job Overview MIPS is seeking a highly experienced Senior Staff Design Verification Engineer with over 15 years of industry experience to lead verification efforts focused specifically on Coherency Manager and Cache Controller components. The successful candidate will have extensive hands-on experience utilizing advanced verification methodologies, including constrained random testing, formal verification, and coverage-driven verification. This senior role involves close collaboration with CPU architects, designers, and cross-functional global teams to ensure high-quality, high-performance processor designs. Key Responsibilities Lead and drive verification activities for Coherency Manager and Cache Controller IP to closure. Collaborate closely with design teams and architects to thoroughly understand and interpret microarchitectural and functional specifications. Develop comprehensive verification plans and execute these plans through testbench creation, test case development, and rigorous analysis. Create directed and constrained random test cases in SystemVerilog, Assembly, and C to verify complex coherency and cache management behaviors. Employ formal verification techniques to augment random verification and ensure exhaustive coverage. Analyze verification coverage metrics to identify and close coverage gaps efficiently. Automate and optimize verification flows and regression environments using scripting languages like Python, Perl, TCL, or Shell. Mentor junior verification engineers, providing technical guidance and leadership within the verification team. Qualifications Master`s degree or higher in Electronics, Electrical, Computer Engineering. 15+ years of relevant verification experience, specifically in CPU or complex SoC verification. Proven expertise in verification of Multicore and Multicluster Coherency, Cache Controllers, or similar blocks. Deep knowledge and practical experience with verification methodologies such as UVM, constrained random, and formal verification. Proficiency in SystemVerilog, Verilog, C, C++, and Assembly. Solid understanding of interconnect and coherency protocols such as AXI, ACE, OCP, CHI. Strong scripting skills in Python, Perl, TCL, or Shell. Experience with CPU architectures, particularly RISC-V, ARM, or MIPS. Preferred Experience Experience with RISC-V architecture. Familiarity with functional safety standards (e.g., ISO 26262). Prior exposure to FPGA prototyping and emulation platforms. What MIPS Offers Opportunity to be part of a dynamic team creating industry-leading RISC-V processors. Autonomy with extensive support from industry experts. Opportunities for significant career growth and technical advancement. Competitive compensation and comprehensive benefits package About MIPS MIPS is a pioneer in RISC-based computing with a legacy of innovation in high-performance microprocessor design. Today, MIPS continues this legacy by leading the adoption and advancement of the RISC-V architecture, delivering scalable processor solutions for cutting-edge computing applications.

As a Sr. Verification Engineer specializing in SOC Verification at SmartSoC, you will be responsible for the technical execution of complex ARM-based SOC Verification projects. Your role will involve test planning, environment architecture, and the development of SV-UVM environments. To succeed in this role, you should have 3-10 years of experience in Design Verification, with a strong expertise in SOC Verification. Excellent communication and presentation skills are essential, along with a deep knowledge of Verification methodologies such as Coverage Driven Test Planning, Environment Architecture, and Verification Flow. Proficiency in System Verilog and familiarity with methodologies like OVM, UVM, VMM, or RVM is required. Additionally, you should possess a solid understanding of protocols, including at least one of SATA, USB, Ethernet, or PCIE. The ability and willingness to adapt to new methodologies, languages, and protocols are crucial for success in this position. This opportunity falls under the VLSI (Silicon engineering) job category and is available in multiple locations, including India (Bangalore, Chennai, Hyderabad, Noida), Sweden (Stockholm), and the USA (Texas). If you are a driven and skilled SOC Verification expert looking to tackle challenging projects in a dynamic environment, we encourage you to apply and be a part of our innovative team.,

Position: Design Verification Engineer Experience: 48 Years We are looking for a skilled Design Verification Engineer with hands-on experience in MIPI protocols and Display IP. For any queries or further details, feel free to reach me at karthik.adasu@Proxilera.com Responsibilities: Experience in MIPI protocol verification (e.g., MIPI DSI, CSI). Strong hands-on experience in Display IP verification and validation. Ability to develop and execute verification plans targeting display and MIPI components. Perform RTL, gate-level, low-power simulations; ensure ISO 26262 compliance. Build SystemVerilog/UVM testbenches tailored to MIPI and Display IPs. Perform simulation and debug activities for MIPI/Display-related RTL modules. Collaborate with RTL and integration teams to resolve display and MIPI interface bugs. Integrate MIPI and Display IPs into subsystem or SoC-level test environments. Implement protocol-specific checkers, monitors, and assertions. Analyze functional coverage metrics related to display pipelines and MIPI interfaces. Work closely with post-silicon and firmware teams to validate MIPI and display functionality

. Must be a BE/BTech in mechanical engineering at a minimum from a reputed university 4 to 8 years of experience in working on mechanical product development Willingness to work on NPD, VAVE, Sustaining projects. Desired to have worked across all phases of new product development processes- initiation, requirements management, concepting, detailed design, verification & validation, handing over for production with accountability of deliverables across phases Ability to collaborate and work in a team environment. Ability to build good rapport with Cross functional teams Ability and desire to lead positive change through systems and process improvement Experienced and proficient with 3D CAD software (preferable Proe/ Creo) Excellent communication and presentation skills Experienced and proficient user of MS Office software Experience in liaising with overseas manufacturers Good working knowledge of DFMEA, DVP, PPAP, GD&T, tolerance analysis and other product development associated techniques and tools Good knowledge on different manufacturing processes Experience with Electromechanical product development is a bonus Having an experience with working on electromechanical projects will be an added advantage Quickly learn established engineering processes (like Product development process - preferable Windchill, ECN, BOM, RFQ, etc.), standards, methods and procedures needed to accomplish assigned tasks with discipline. Be able to prioritize work, meet agreed project timelines, cost and quality

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MIPI, DDR and HBM Conduct Gate-level simulations, and power-aware verification using Xprop and UPF.Collaborate closely with cross-functional teams, architects, designers, and pre/post-silicon verification teams. Analyze and implement System Verilog assertions and coverage (code, toggle, functional). Provide mentorship and technical guidance to junior verification engineers.Manage and lead a dynamic team of verification engineers, fostering a collaborative and innovative work environment. Ensure verification signoff criteria are met and documentation is comprehensive.Demonstrate dedication, hard work, and commitment to achieving project goals and deadlines. Adhere to quality standards, implement good test practices, and contribute to the continuous improvement of verification methodologies. Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration of third-party VIPs (Verification IP) from Synopsys and Cadence. Qualifications Bachelors degree in computer science, Electrical/Electronics Engineering, or related field. ORMasters degree in computer science, Electrical/Electronics Engineering, or related field. ORPhD in Computer Science, Electrical/Electronics Engineering, or related field. 5+ years of hands-on experience in SOC Design Verification. Expertise in UVM (Universal Verification Methodology) and System Verilog. Prior experience working on IP level and SOC level verification projects. Proficient in verification tools such as VCS, Xsim, waveform analyzers, and third-party VIP integration (e.g., Synopsys VIPs and Cadence VIPs). Hands-on experience with UFS (Universal Flash Storage), Ethernet, PCIe, CXL, MIPI protocols.Solid understanding of low-speed peripherals (I2C/I3C, SPI, UART, GPIO, QSPI) and high-speed protocols. Experience in DDR, HBM, Gate-level simulations, and power-aware verification using Xprop and UPF. Proficiency in scripting languages such as shell, Makefile, and Perl. Strong understanding of processor-based SOC verification, including native, Verilog, System Verilog, and UVM mixed environment. C-System Verilog handshake and writing C test cases for bootup verification. Excellent problem-solving, analytical, and debugging skills.

The incumbent will be a part of the maritime structures team and will be responsible for delivering technical packages for a wide range of maritime projects. You will be involved in technical leadership, project management, client engagement, and team leadership. Your responsibilities will include serving as the technical lead on maritime engineering projects, overseeing project delivery to ensure timelines and quality standards are met, coordinating with multi-disciplinary teams, supporting in writing technical proposals, mentoring and leading a team of structural engineers and BIM/CAD technicians, overseeing and undertaking various technical tasks such as structural analyses, calculations, design, verification, and desktop studies for the development of maritime infrastructure. Additionally, you will be responsible for overseeing berthing studies, mooring analyses, condition assessments, and rehabilitation studies, preparing reports, specifications, cost estimates, and undertaking tender reviews. You are expected to apply skill and care in design and take ownership of assigned work packages. Key Competencies / Skills: Mandatory Skills: - 10-15 years demonstrable experience in the structural design of maritime structures - Excellent knowledge of relevant Eurocodes and British standards for maritime structures - Proficiency in software such as STAAD.Pro, AutoCAD, and MS Office - Familiarity with construction techniques and materials - Strong organizational and interpersonal skills - Excellent written and verbal communication skills Desired Skills: - Membership or working towards a Professional body membership - Experience in projects in the Middle East - History of working with an international engineering consultancy - Ability to work in multidisciplinary teams with minimal supervision - Programming skills in Python, VBA, etc. Qualifications: - B.Tech/B.E./B.Sc. in Civil Engineering, M.Tech/M.E/M.Sc. in Structural Engineering About Us: WSP is a leading professional services consulting firm with a global presence. We are committed to providing technical expertise and strategic advisory services in various sectors. Our team consists of engineers, technicians, scientists, architects, planners, surveyors, and environmental specialists, among others. We design sustainable solutions in different sectors and offer strategic advisory services to help societies thrive. Working with Us: At WSP, you will have the opportunity to work on landmark projects, collaborate with experts, and contribute to shaping communities and the future. We encourage new ideas, diverse perspectives, and offer a world of opportunities to build a unique career. Health, Safety and Wellbeing: We prioritize a safe work environment and focus on health, safety, and wellbeing. Our Zero Harm Vision drives us to reduce risks through innovative solutions, ensuring a safe workplace for all employees. Inclusivity and Diversity: Join our global community of talented professionals dedicated to making a positive impact. We value inclusivity and diversity, striving for a better future for all. Apply today to be part of our team. NOTICE TO THIRD PARTY AGENCIES: WSP does not accept unsolicited resumes from recruiters or staffing services. Any unsolicited resumes will become the property of WSP, and the company reserves the right to hire candidates directly without any compensation to the recruiter or agency.,

As a Medical Mechanical Design Verification/Control Engineer at HCLTech in Chennai Shollinganallur, you will be joining a team that values innovation, growth, and impactful work. This is an opportunity to work on cutting-edge projects in SME and be a part of something transformative! The walk-in drive is scheduled for 21st July Saturday from 9AM to 2PM at HCLTech Elcot Sez, 602/3, 138, Medavakkam High Road, Sholinganallur, Chennai-600119. The position available is for Mechanical Design (Lead, Technical Lead /Sr Lead) with an experience requirement of 3-7 years. To be eligible for this role, you should have a B.E/B.Tech or higher education in Mechanical Engineering. Sustaining Engineers are expected to have experience in Medical Device Design Controls, Design Verification & Validation for 3 to 7 years. You should be adept with the Design Control process for Medical Devices and have led Change Qualification projects for medical devices, collaborating with multi-cultured CFT. Your responsibilities will include developing test protocols and test plans, ensuring the quality of deliverables, expertise in Mechanical Engineering basics, Risk Management, applying statistical methods to problem-solving, and driving solutions for technical issues. Additionally, you should be self-motivated, capable of working independently, possess strong project management skills, and have excellent oral and written communication skills including technical writing. Knowledge of ISO13485 would be an added advantage for this role. Proficiency in software tools such as SolidWorks, 2D Tolerance Stackup, MS Word/Excel/PowerPoint is required. Interested candidates can share their CV with Katherine Sylvia at Katherinesylvia.k@hcltech.com, including details such as Current Company, Current CTC, Expected CTC, Notice Period, and Location. Make sure to bring this call letter for the walk-in interview on 21st July.,

Are you seeking an exciting career opportunity at one of the world's leading semiconductor companies Texas Instruments (TI) is inviting applications for the position of Senior Analog Design Engineer. As part of a dedicated team of engineers, you will be involved in developing highly complex mixed signal devices for audio applications, showcasing industry-leading performance. This role offers a unique chance to join an established team that is continuously seeking growth opportunities. You will collaborate with top-tier customers globally and contribute to the development of cutting-edge solutions in consumer electronics, industrial, and automotive markets. As a prospective candidate, you should hold a Bachelor's or Master's Degree in Electrical Engineering. The ideal candidate will possess 4-10 years of relevant experience in the field. In this role, you can look forward to collaborating with industry experts, enhancing your ability to work in a technically challenging, fast-paced environment, and contributing to innovative semiconductor technology. You will have the opportunity to work on cutting-edge analog and power semiconductor processes, interact with various facilities, and gain insights into product development processes. Your responsibilities will include contributing to core-technology development, defining circuit architectures, developing design schematics, and engaging in design verification. You will take ownership of complex analog circuit design activities, collaborate with cross-functional teams, and drive new design methodologies where needed. Preferred qualifications for this role include strong analytical and problem-solving skills, effective communication abilities, and the capacity to work collaboratively in a dynamic environment. Experience in silicon debug, EM and thermal analysis, EMI and EMC aware designs, and signal processing would be advantageous. If you are looking to further your career in analog design engineering and contribute to the development of innovative semiconductor solutions, we encourage you to apply for this exciting opportunity with Texas Instruments (TI).,

B.Tech/M.Tech with 5+ Years of industry experience in analog/mixed signal behavioral modeling at various levels of abstraction and full chip verification (AMS and DMS DV) using SV RNM or Custom UDN’s

Role & responsibilities Strong verification expertise using Verilog and SystemVerilog, with solid understanding of UVM methodology and hands-on experience writing test-benches. Proficient in debugging testcases and verifying processor-based subsystems. Knowledge of AMBA protocols (AXI, AHB, APB) is a plus. Exposure to Arm-based SoCs and strong grasp of digital design fundamentals. Experience with scripting in Perl, TCL, Make, and Shell.

SOURCERIGHT TECHNOLOGIES (INDIA) PRIVATE LIMITED is looking for Design Verification, Pcie, SV, UVM, Ethernet (SI412FI RM 3403) to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes

Are you passionate about ensuring silicon design accuracy and power integrity at advanced nodes? We re looking for a skilled PDV & Power Analysis Engineer to join our growing team! Key Responsibilities: -Physical design verification and power analysis using Calibre, Innovus, and Voltus -Hands-on layout edits in Innovus and deep analysis of IR/EM reports from Voltus -Expertise in understanding and resolving DRC violations using Calibre and Innovus -Strong knowledge of IR drop and electromigration issues and their resolution -Scripting proficiency in TCL, AWK, and Python -Exposure to ADI flows and power domain-based designs is a strong advantage Who Should Apply: Engineers with a strong background in PDV and power integrity, comfortable working with industry-standard EDA tools and scripts, and who thrive in a collaborative environment.

HCLTech WalkInDrive In Chennai for Mechanical Engineers on 26th July Saturday. CONSIDER THIS AS CALLLETTER Medical Mechanical DHF/ windchillPLM/Design Verification/Control Engineer- WalkIN on 26th July in Chennai Shollinganallur Join a team that values innovation, growth, and impactful work. Dont miss the chance to work with cutting-edge Project in SME and be a part of something transformative! Drive Date:26th July Saturday (9AM-2PM) Skill1: #DHF #remediation #DHFremediation Skill2: #Designcontrol #designverfication #designvalidation Skill3: #WindchillPLM in medical domain Contact Person: Katherine Sylvia Venue Location: #HCLTech Elcot Sez, 602/3, 138, Medavakkam High Road, Sholinganallur, #Chennai -600119 Position:Mechanicaldesign (Lead, Technical Lead) Experience: 2.5-9 years Job Location:Chennai Skill : Medical device, Design control, Design Verification, DHF, MDR, ISO13485, Risk management, DHF Remediation, WindchillPLM #changeorder #Designhistoryfiles #JD : B.E / B.Tech or higher education in Mechanical Engineering #EXPERIENCE : Sustaining Engineers should have Medical Device #DesignControls , #Design verification & Validation experience of 3 to 7 years. Adept with #DesignControlprocess for #MedicalDevices . Led Change Qualification projects for medical devices, working with multi-cultured CFT. Experience developing test protocols and test plans Ensures quality of deliverables, including design, data summary and interpretation and report generation. Expertise in #MechanicalEngineering basics. #RiskManagement (Proactive risk identification and mitigation planning) Self-motivated and capable of working independently & Strong project management skills. Knowledge on #ISO13485 would be an added advantage. Excellent Oral and written Communication (MUST prove Technical writing skills with samples and/or assessment during the interview) & Interpersonal skills #SOFTWARETOOLS : #Mechanical #SolidWorks , #2D #ToleranceStackup , MS Word/ Excel/ Power point, #Skill2#JD : #DHFRemediation Experience in gap assessment process such as Testing gap assessment, Standards gap assessment, Requirements gap assessment Knowledge in Design History File remediation #Skill3#JD : #windchillPLM #medicaldomain #BOMstructure #Changeorder Create, Revise, Release parts (ZFIN, ZRAW, ZSMI, ZMOD, ZNVL) in Wind-chill according to the requirements defined in WI Create, Revise, Release Documents (Protocols, Reports, FAB, TRAV, PFMEA, IFU, Drawing Specification, Device tracking kit etc) in Wind-chill according to the requirements defined in WI Update Document and Part structure Create, Update BOM structure Create Change order with change description and justification for change. Assign Change Activity Assignee and Peer Reviewer. Assign approvers to the Change Implementation Board for change orders per the approval requirements. Create manual Pre- and Post-Release Adhoc Tasks Follow up with approvers to get the COs reviewed and approved Release of the Change Orders in Wind chill #Contact Person: #KatherineSylvia Interested candidates can share their CV on below mail id Katherinesylvia.k@hcltech.com with Below details Current Company, Current CTC, Expected CTC, Notice Period, Location . CONSIDER THIS AS CALLLETTER

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop/Maintain tests for functional verification at SOC level. Build testbench components to support the next generation IP Maintain or improve current verification libraries to support SOC/Full-chip level verification Provide technical support to other teams Help Hardware emulation team to port the RTL to Palladium/Zebu or HAPS/Protium platforms. PREFERRED EXPERIENCE: Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM Familiarity with Verilog and General Logic Design concepts Knowledge of system-level architecture including buses like AXI/AHB, bridges, memory controllers such as DDR4/DDR5, and peripherals such as USB, PCIe and Ethernet Strong working knowledge of UNIX environment and scripting languages such as Perl or Python Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM/XCELIUM, Verdi, QUESTASIM Experience using UNIX Revision Control tools - ICM manage, CVS, Perforce and bug tracking tools such as JIRA Experience in verifying multimillion gate chip designs from specifications to tape-out Excellent communication and presentation skills Demonstrate the ability to work with cross-functional teams Familiarity with processors and boot flow would be useful Familiarity with Software development flow including assembly and C is beneficial ACADEMIC CREDENTIALS: BS/MS EE, CE, or CS 8+ / 12+ years of design verification experience OOP coding experience (System Verilog, SpecmanE or C++) and SV Assertions