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ACL Digital
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Physical Design Engineer

Physical Design Engineer

ACL Digital

15 years

0 Lacs

Pune Maharashtra India

Posted:2 days ago| Platform:

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Skills Required

design timing analysis electromigration verification power integrity drive constraints development analyze grid synthesis documentation reports scripting tcl perl python automate technology electrical debugging communication teamwork

Work Mode

On-site

Job Type

Full Time

Job Description

Job Title:

Experience:

Location:

Notice Period:

STA (Static Timing Analysis) and EMIR (Electromigration & IR Drop) Engineer

Key Responsibilities:

Perform full-chip
Static Timing Analysis (STA)
using industry-standard tools (PrimeTime, Tempus, etc.)
Drive STA signoff including constraints development, path analysis, ECO implementation, and timing closure
Conduct
EMIR signoff analysis
using RedHawk, Voltus, or equivalent tools
Analyze power grid design and provide recommendations to mitigate IR drop and electromigration issues
Work closely with RTL, synthesis, and physical design teams to debug and fix timing and power integrity violations
Prepare documentation and reports for timing and EMIR signoff

Required Skills:

Strong expertise in
STA and timing closure
at block and full-chip levels
Solid experience in
EMIR tools
and analysis methodologies
Good understanding of
UPF/CPF-based low power designs
Proficiency with tools like
PrimeTime, RedHawk, Voltus, Tempus, etc.
Scripting skills (TCL, Perl, Python) to automate flows
Experience in advanced technology nodes (7nm, 5nm, 3nm) is a plus

Education:

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field

Preferred Attributes:

Strong problem-solving skills and debugging capabilities
Good communication and teamwork abilities
Ability to work independently under tight timelines
Immediate availability is a strong plus

pls reach out to me - 8754387484/prabhu.p@acldigital.com

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