CPU DFT Scan ATPG Lead

Intel

9 - 14 years

16 - 20 Lacs

bengaluru

Posted:1 week ago| Platform:

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Skills Required

atpg vhdl system verilog verilog dft jtag c++ bist scanning job posting rtl design linux rtl coding perl tcl synthesis matlab sta python version control scan insertion mentoring rtl uvm manufacturing engineering asic design mbist vlsi

Work Mode

Work from Office

Job Type

Full Time

Job Description

You will be part of ACE India , in the P- Core design team driving Intel's latest CPU's in the latest process technology.
As a DFT engineer direct responsibilities of the role, but not limited to, working on various aspects of PCORE DFT including Spyglass DFT, RTL implementation, Verification, Scan, and ATPG.
The candidate must be able to drive the DFT implementation for various features incl Scan, MBIST, TAP, etc.
Previous experience working with manufacturing engineering, pattern delivery, and post-silicon support is a definite plus.

Qualifications:

Candidate must possess a Master's degree in Electronics or Computer Engineering with at least 7 or more years of experience or a bachelor's degree with at least 9 years of experience in DFT.
Strong knowledge of ATPG, various fault models, fault grading.
Knowledge of memory BIST, IJTAG/TAP architecture.
DFT logic generation, integration, and verification.
EDA vendor-supported scan architectures and tools, covering synthesis, timing, DRC, ATPG, GLS (Unit delay and Timing/SDF based), and tester bring uppreferably.
Mentor/Siemens Tessent Shell, TestKompress, ATPG coverage debug.
Experience in Design Verification (DV) using standard simulators e.g. VCS, Verdi waveform viewer.
Post Silicon/ATE Bring-Up Support.
Experience with RTL (Verilog, System Verilog, VHDL)

Job Type:
Experienced HireShift:
Shift 1 (India)

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