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Smart Soc Solutions
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Mixed Signal Verification Engineer

Mixed Signal Verification Engineer

Smart Soc Solutions

8 - 13 years

7 - 11 Lacs

Bengaluru

Posted:1 week ago| Platform:

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Skills Required

design analysis ams system verilog mixed signal verilog soc verification simulation digital design vhdl rtl design axi fpga modelsim rtl coding debugging ahb asic asic verification c ovm uvm asic design gls silicon fpga design vlsi eda tools ncsim

Work Mode

Work from Office

Job Type

Full Time

Job Description

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities:

Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog.

Create and utilize real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations.

Take ownership of Analog/Mixed designs at the chip and/or block level, ensuring successful verification.

Good Understandingof GLS simulations

Collaborate with design engineers to understand design tradeoffs and create high-level models for design analysis.

Perform behavioral modeling for verification simulations to validate the functionality and performance of mixed-signal designs.

Debug and resolve issues arising from verification simulations and work closely with the design team to address any design-related concerns.

Stay updated with the latest advancements in mixed-signal verification methodologies and tools, and drive continuous improvement initiatives.

Job Category VLSI (Silicon engineering)
Job Type Full Time
Job Location IndiaBangalore

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Mixed Signal Verification Engineer