165 Fpga Design Jobs

As an FPGA Design Engineer, you will be responsible for designing, developing, and testing FPGA-based prototypes for advanced telecommunications systems. Your expertise will play a crucial role in accelerating our product development cycles and ensuring the reliability and performance of our solutions. Key Responsibilities: Design and develop FPGA-based prototypes for telecommunications systems. Collaborate with cross-functional teams to define system requirements and specifications. Implement and optimize FPGA designs using VHDL/Verilog or other hardware description languages. Perform simulation, verification, and debugging of FPGA designs. Conduct performance analysis and optimize FPGA implementations for speed, power, and area. Integrate FPGA prototypes with other system components and perform system-level testing. Document design processes, test plans, and results. Stay updated with the latest advancements in FPGA technology and telecommunications standards. Qualifications: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of experience in FPGA design and prototyping, preferably in the telecommunications domain. Proficiency in VHDL, Verilog, and other hardware description languages. Experience with FPGA design tools such as Xilinx Vivado, Altera Quartus, or similar. Strong understanding of digital signal processing (DSP) and telecommunications protocols. Knowledge of high-speed serial interfaces (e.g., PCIe, Ethernet). Familiarity with system-level integration and testing. Excellent problem-solving and debugging skills. Strong communication and teamwork abilities. Preferred Skills: Experience with software-defined radio (SDR) or related technologies. Knowledge of wireless communication standards (e.g., 4G, 5G). Familiarity with embedded systems and microcontroller programming. Experience with scripting languages such as Python or TCL for automation. Join Us for: Opportunity to work on cutting-edge telecommunications technologies. Collaborative and innovative work environment. Competitive salary and benefits package. Professional growth and development opportunities.,

This role involves the development and application of engineering practice and knowledge in the following technologiesElectronic logic programs (FPGA, ASICs); Design layout and verification of integrated circuits (ICs),printed circuit boards(PCBs), and electronic systems; and developing and designing methods of using electrical power and electronic equipment; - Grade Specific Focus on Electrical, Electronics and Semiconductor. Develops competency in own area of expertise. Shares expertise and provides guidance and support to others. Interprets clients needs. Completes own role independently or with minimum supervision. Identifies problems and relevant issues in straight forward situations and generates solutions. Contributes in teamwork and interacts with customers.

Job Description The Manager VLSI and Embedded Systems will lead a high-performance design team responsible for developing analog, digital, and mixed-signal systems for airborne applications. The role demands a strong background in FPGA-based designs, VHDL, embedded programming (C), and full lifecycle electronic system development. You will drive innovation, ensure compliance with aerospace standards, and manage cross-functional project execution. --- Key Responsibilities 1. Leadership & Team Management Lead the VLSI and Embedded Systems team and provide strategic and technical direction. Supervise day-to-day project execution and ensure timely delivery with quality benchmarks. Foster innovation, learning, and collaboration across the design team. 2. Technical Design & Development Architect and design analog, digital, and mixed-signal electronics for embedded systems. Work extensively on VHDL and embedded C for system development, simulation, and testing. Guide PCB and Mechanical CAD teams in component layout and housing/enclosure design. Provide domain expertise in power electronics and engine control (preferred). 3. Project Execution & Cross-Functional Coordination Collaborate with Purchase, Production, QA, and Software teams for seamless integration. Drive project planning, budgeting, and milestone tracking. Manage design reviews and prepare updates for senior leadership. 4. Aerospace Standards & Documentation Lead the preparation of technical documentation as per CEMILAC and aerospace guidelines: ATP, QTP, V&V reports, Design Reviews, Reliability Analysis, FMEA, FMECA. Apply knowledge of DO-254, DO-178, MIL-STD-461/704/810, JSS55555 for qualification. Ensure adherence to airworthiness and safety protocols. 5. Continuous Improvement & Innovation Keep abreast with trends in VLSI, embedded systems, and verification tools. Implement design process improvements for enhanced performance and cost-efficiency. Mentor junior engineers and contribute to team capability development. --- Key Skills & Competencies Analog, digital, and mixed-signal circuit design FPGA design, VHDL, and embedded C programming Compliance with airborne standards: DO-254, DO-178, MIL-STDs Design documentation and validation as per CEMILAC guidelines Project leadership, strong analytical, documentation, and cross-functional collaboration skills --- Qualifications & Experience Education: B.E./B.Tech or M.E./M.Tech in Electronics/Electrical Engineering or related discipline. Experience: 812 years in embedded systems, VLSI design, and aerospace-grade product development. Preferred: Experience in power electronics, FPGA architecture, and subsystem integration. Preferred candidate profile

Job Summary: Seeking an experienced FPGA developer to join our team and work on the design and development of complex FPGA-based systems. The ideal candidate will have a strong background in FPGA design, verification, and implementation, as well as experience working with hardware and software engineers to integrate FPGA designs into larger systems.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation. Development of signoff quality constraints and the development of power intent constraints. May also include running RTL Lint, CLP, MEMBIST, DFT DRC etc. TCL script development in addition to running/analyzing/debugging designs. Hands on with Synopsys DCG/Genus/Fusion Compiler. Hands on with Synopsys Prime Time including constraint development for complex blocks with multiple clock domains. Hands on with Cadence Conformal LEC and Cadence Conformal Low Power including UPF development Experience with either RTL development or Physical Design is also a plus 6+ years experience Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

Company : Mirafra Software Technologies Pvt Ltd Locations : Hyderabad Experience: 6 to 15 yrs Send your resume to: swarnamanjari@mirafra.com or APPLY Or tag/share with someone actively looking! Lets connect the right talent to the right opportunity! 1) Job Description (5 to 10 yrs) Strong in digital design. • Strong in Xilinx Vivado IP & IPI tools till bit-generation. • Knowledge of VHDL/Verilog/System Verilog. • Knowledge of Validating IP/IP Example designs on Xilinx boards, debugging of failures on target boards, board bring up. • Proficiency in Linux environment. • Good communication skills. Basic Job Deliverable : RTL coding, IP design, Modify/update existing IP as per requirements. 2) Job Description (7 to 12yrs) 7 to 12 years of experience in digital design. • RTL coding experience using Verilog and/or System Verilog. • Working experience of AMD/Xilinx FPGA and Vivado. • Experience in Video domain (DisplayPort/MIPI) is preferred. • Candidate shall be working at AMD Sattva site, Hyderabad. 3) Job Description (2 to 4yrs) Design Creation and Analysis profile with RTL, STA, Scripting and FPGA flow (Vivado/ Quartus/ Lattice). Education & Other Requirements B.Tech / M.Tech / BE in Electronics, Electrical, ECE or equivalent

As an FPGA Firmware Engineer, you will be responsible for developing detailed specifications based on requirements and implementing FPGA designs in accordance with those defined requirements and/or specifications. You will collaborate with other members of the design team to evaluate possible alternatives during the development process and determine the best approach based on performance, cost, and resources. Additionally, you will perform simulation activities including timing analysis, behavioral, and functional simulations. Your role will also involve documenting ideas, designs, specifications, and instructions to comply with client standards. As a senior member of the team, you will mentor junior members of the business unit to promote design team abilities and establish good working practices. The ideal candidate should possess a degree in Computer Science, Engineering, or a related field such as Electronics, Electrical, Computer Engineering, or Computer Science Engineering. You should have 5-10 years of experience in FPGA design, FPGA firmware, or related work. Excellent interpersonal and analytical skills are essential, with the ability to work independently and create customer-facing applications. Preferred expertise for this role includes 5+ years of direct hands-on experience with IP integration and/or HLS based implementation for resources and timing optimization. Good interpersonal skills are a must, as you will be required to work between multiple departments in carrying out the duties of this position.,

Candidate must have completed 03-06 months of training in VLSI. Candidate must have knowledge about: VLSI - Design Verification VLSI - Physical Design VLSI - Hardware VLSI - Analog Circuit Analog (Memory Design/Layout) VLSI - DFT RTL

Job Description: We are hiring an RTL Design Engineer with hands-on experience in FPGA-based RTL development. This role is focused on FPGA logic design and does not involve Silicon RTL or hardware testing . Key Responsibilities: RTL coding using Verilog, SystemVerilog, or VHDL Work on FPGA architecture and flow , including logic and digital design Scripting with Tcl and Python Perform synthesis and design stages using Vivado Collaborate with design teams to deliver high-quality IP blocks for FPGA

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: ASIC Design. Experience: 3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: ASIC Synthesis. Experience: 3-5 Years.

Design and development of processor L2 , L3, Non cacheable units and LLC (Last Level Cache) for high-performance IBM Systems. - Design and architect L2 cache and LLC as driven by capacity, latency, bandwidth, and RAS requirements. - Develop the features, present the proposed architecture in the High level design discussions - Develop micro-architecture, Design RTL, Collaborate with Verification, DFT, Physical design, FW, SW teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Lead a team of engineers, guide and mentor team members, represent as Logic Design Lead in global forums. - Estimate the overall effort to develop the feature. - Estimate silicon area and wire usage for the feature. . Required education Master's Degree Preferred education High School Diploma/GED Required technical and professional expertise 8 to 15 years of relevant experience - At least 1 generation of processor L2 cache or LLC design delivery leadership. - Expertise in cache coherence protocols for symmetric multiprocessors (SMP), covering both chip SMP and multi-socket SMP. - Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architectures and implementations. - Working knowledge of memory consistency, store ordering, weakly and strongly ordered memory. - Experience in logical and physical design of caches including directories (tags, set associative memories), data SRAM, design for low latency, multiple parallel finite state machine design,

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 – 10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

As a VLSI Mentor / Guest Faculty specializing in Advanced Digital Systems & Low Power Design at Spandsons Horizon Engineering, you play a crucial role in guiding 5th, 6th, and 7th-semester B.E./B.Tech students in advanced VLSI concepts and practical applications. This contract role, based in Salem, offers a unique opportunity to directly influence the academic and career growth of 60 aspiring engineers. Your key responsibilities include delivering engaging sessions covering topics such as Advanced Digital System Design with Verilog HDL and Low Power VLSI Design. You will also provide hands-on guidance for lab assignments and projects using various tools like Xilinx Vivado, ModelSim, LTspice, and more. Facilitating interactive learning and ensuring alignment with the semester curriculum are essential aspects of this role. To qualify for this position, you need a minimum of 4-5 years of industry experience in VLSI design, proficiency in relevant EDA tools and hardware platforms, excellent communication skills, and a passion for teaching and mentoring. The program details include a total of approximately 60 students, with sessions scheduled on Thursdays and Fridays for 12 hours per week starting on July 24th & 25th. The program will run for Semesters 5, 6, and 7. In addition to a comprehensive program, benefits such as accommodation, food, and the opportunity to impact the next generation of VLSI engineers are provided. Join us at Spandsons Horizon Engineering and be part of a forward-thinking academic institution.,

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As a new graduated Silicon Validation Engineer, you are a dedicated and innovative professional with a passion for advancing technology. You have a strong background in electronics engineering and a keen eye for detail. You thrive in collaborative environments, working seamlessly with R&D teams to drive the success of cutting-edge projects. Your problem-solving skills are exceptional, and you are adept at troubleshooting complex systems and equipment. With a commitment to continuous learning, you stay updated with the latest industry trends and technologies. You are proactive, self-motivated, and ready to take on new challenges in a dynamic and fast-paced environment. Developing test strategies for validation of silicon devices in conjunction with R&D engineering teams. Writing and implementing test programs for National Instruments LabVIEW-based equipment. Performing hands-on testing of devices using National Instruments LabVIEW-based equipment in the Plymouth lab facility. Designing and verifying SystemVerilog RTL targeting FPGA implementations. Creating schematics for test boards and fixtures. Recording and analyzing product test results and equipment logs. Ensuring the reliability and performance of Synopsys PVT Sensors across various applications. Contributing to the development of cutting-edge on-chip sensor products targeting the latest technology processes. Enhancing product quality through meticulous validation and testing procedures. Collaborating with a skilled team of engineers to drive innovation and technological advancements. Providing critical insights through data analysis to inform product improvements. Supporting the optimization of performance, power, and other requirements for a diverse range of applications. University degree/masters or similar, either in Electronics Engineering or related field. Some background of FPGA design using HDL would be beneficial, i.e. SystemVerilog. Basic understanding of the design of digital and analogue circuits for device validation and testing. Elementary understanding of component level device test methods. Some experience of PCB schematic capture using suitable CAD software. A familiarity with programming and scripting skills in one or more of VB script, python, tcl & bash. Ability to do basic statistical and data analysis for silicon devices and test results. You are an analytical thinker with excellent problem-solving abilities. You have strong communication skills and work effectively within a team. Your attention to detail ensures high-quality results, and you are driven by a commitment to continuous improvement. You are adaptable, proactive, and capable of managing multiple tasks efficiently. You will join a dynamic R&D team focused on the development of Synopsys PVT Sensors. This team is comprised of skilled engineers dedicated to pushing the boundaries of technology and delivering innovative solutions. Collaboration and knowledge sharing are key aspects of the teams success, fostering an environment where creativity and technical excellence thrive. We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.,

You are a FPGA design engineer with at least 5 years of experience, located in Vadodara, India. Your main responsibility is to implement control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You should possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include: - Strong knowledge of digital design involving multiple clock domains - RTL design in Verilog and System-Verilog - Creating micro-architecture from high-level specifications - Functional simulation using ModelSIM or similar tools - FPGA design and synthesis, map and route flow, pin assignments, attribute assignments, resource fixing, and design partitioning - Targeting designs for Intel(Altera) or Xilinx FPGAs using Quartus Prime or Vivado - IP creation and parametrization using Vivado or Quartus - Debugging using ChipScope/SignalTap and lab bench oscilloscopes/protocol analyzers - Understanding of static timing analysis and timing closure using SDC - Collaborating with a cross-functional, global team of hardware designers, software engineers, verification and validation engineers - Leading teams to successful project completion within deadlines - Strong problem-solving skills It would be beneficial if you also have expertise in: - Knowledge of TCL scripting and Python - Transceivers and PHY - Power estimation and resource utilization estimation - Soft-processor cores like Microblaze or Nios-II - Understanding of Digital Signal Processing concepts - Proficiency in Matlab or Python for algorithm design - Familiarity with embedded systems/C/C++ About A&W Engineering Works: A&W Engineering Works is committed to developing and deploying innovative solutions to real-world problems. The company specializes in developing complete systems from front-end sensors to back-end applications, covering analog, digital signal processing, and algorithmic data and control paths. The team at A&W Engineering Works has a wide range of expertise in hardware, software, mechanical engineering, and systems development, aiming to solve complex problems efficiently with innovative development techniques and fast prototyping. To apply for this position, please send an email to [email protected] with your resume and cover letter attached, and remember to include the job title in the subject line.,

You are an experienced FPGA design engineer with over 3 years of experience, based in Vadodara, India. Your primary responsibility will be implementing control logic state machines and DSP algorithms in FPGA fabric for high throughput systems. You must possess excellent troubleshooting and debugging skills for both simulation and in-circuit scenarios. Your expertise should include continual integration of unit modules into FPGA top-level design, using SignalTap to debug logic and/or timing issues, constructing bypasses, data taps, and data pattern generators for isolation, managing timing closure and constraints files, and creating basic glue logic between DSP blocks. You should also be capable of power estimation pre and post-implementation, working closely with board designers for optimal pin-out mappings, and collaborating with software team members to develop, execute, and debug unit and system-level verification tests. Your technical skills should encompass working with HDL simulation tools like ModelSim, Verilog HDL/VHDL languages, Xilinx/Altera FPGAs using Quartus II/Vivado/ISE, and SignalTap/Chipscope for debugging. Additionally, you should be comfortable taking ownership of projects and related tasks. Experience with SoC and QSYS, protocols such as AMBA, AXI, Avalon, USB, PCIe, memory interfaces like DDR2/DDR3/DDR4, and control buses like I2C and SPI/QSPI would be beneficial. About A&W Engineering Works, the organization's mission is to develop and deploy innovative solutions to real-world problems. The team at A&W Engineering Works specializes in developing complete systems from front-end sensors to back-end applications, including analog, digital signal processing, algorithmic data, and control paths. The team's expertise spans hardware, software, mechanical, and system development, enabling them to tackle complex challenges with innovative development techniques. To apply for this role, please send your resume and cover letter to [email protected] with the job title in the subject line.,

Excellent understanding of embedded system development and real-time application development. •Hands-on experience in bare-metal code development using C over an embedded platform, D0-178C compliance and certification,FPGA design flow

The culture at our organization is defined by the people who contribute to it. We foster a culture of passion for technology solutions that have a tangible impact on businesses. Additionally, we prioritize the pursuit of individual passions by our team members. Collaborating with us offers you the opportunity to gain a deep understanding of various industries and cutting-edge technologies. This knowledge enables us to develop forward-thinking and impactful solutions. Moreover, being a part of MarvyLogic can facilitate personal growth, leading you towards a more enriching and fulfilling life. To be considered for this role, you should possess the following qualifications: - A minimum of 10 years of experience in FPGA Design and Debug, preferably working with Xilinx Ultrascale+ and Virtex7 - Proficiency in utilizing tools such as Xilinx Vivado/Coregen/Synplify and developing/maintaining Timing/IO constraints (UCF) - Experience with managing multiple high-speed clock domains and integrating third-party IP onto Xilinx transceivers - Familiarity with working on FMC daughter-cards, High-Speed Cables/Connectors, etc. - Extensive debugging experience using Xilinx ILA, Protocol Analyzers, Oscilloscope, Logic Analyzers, etc. - Proficiency in PERL/TCL scripting and database management between FPGA and ASIC RTL - Knowledge of front-end RTL tools such as RTL Simulation, Synthesis, DFT, Timing - Ability to modify/adapt RTL designs for FPGA implementation and optimize designs to achieve FPGA area/performance goals - Collaboration with DV and Firmware/Software teams throughout the validation process, including post-silicon bring-up Your responsibilities in this role will include: - Effectively collaborating and communicating with multi-site teams - Reviewing FPGA netlist releases (block/chip) and overseeing ASIC product life cycle stages, including requirements, design, implementation, testing, and post-silicon validation If you meet the specified qualifications and are ready to take on these responsibilities, we welcome you to apply for this challenging and rewarding opportunity.,

We are looking for experienced FPGA Verification Engineer. As a FPGA Verification Engineer, you will work for a high complexity DWDM equipment for LH/ULH applications. You will work in close collaboration with multi location cross-functional R & D teams. Our work includes everything from product concept to finished product - a process that spans over the entire development cycle. The team takes full responsibility for delivery on time with the right quality. As an FPGA Verification engineer, you will be responsible for designing verification plan, developing environment/testbench, creating test scenarios for running simulations, coverage analysis and lab support during board bring up to ensure first time right quality of Infinera product. Candidate should be capable of handling projects independently and strong will to drive for solutions. Education Necessary: Candidates must have a bachelors degree or higher in EE with very good academics. Roles & Responsibilities: Must have 10 years of experience in developing System Verilog UVM based test environments, developing and implementing test plans at block, sub-chip and chip levels. Must have strong HVL coding skills for Verification and be hands-on with one or more Industry standard simulators such as VCS, NC, MTI used in Verification and waveform based debugging tools. Exposure to UVM (or similar) verification methodologies is required. Familiarity with HDLs such as Verilog and scripting languages such as perl is highly desired. Working knowledge of RTL design is preferred. Should be conversant with technologies like, Ethernet, PCIe etc. Knowledge of telecom protocol is preferred. Structured and thorough with analytical and troubleshooting skills. Good written and oral communication skills are required. Flexible, innovative, self-driven and willing to take own initiatives. Highly motivated team player. We offer: A high pace in development of new products. Tight cooperation with other disciplines. Short product development cycles, Real results of your work, you will see how it affects our products and sales. International possibilities of development and internal advancement. Social and wellness activities and clubs. A friendly and helpful atmosphere. Highly competent and motivated colleagues.

Roles & Responsibilities: Be part of a team to verify or emulate/prototype complex system on a chip designs. Interact with design engineers to identify important verification scenarios. RTL Design / porting of ASIC RTL targeting FPGA prototyping and emulation platforms, such as Synopsys ZEBU, Cadence Palladium or Siemens Veloce Synthesis, PNR and timing analysis of RTL on industry standard prototyping and emulation platforms Qualification, Experience & Skills desired: Bachelor's degree in Electrical/Electronics Engineering with 5+ years of relevant experience, or masters degree in Electrical Engineering Skilled in FPGA design techniques, RTL Design, tools and processes. Minimum 5 years and above experience in digital design/verification, emulation/ FPGA prototyping and system validation. Verilog/SystemVerilog based verification experience at Subsystem and Full chip level. Experienced in transactor-based verification. Verification methodology like UVM/OVM knowhow is a plus. Knowledge of RTL language (e.g., VHDL, Verilog), in-circuit emulation, simulation acceleration and FPGA prototyping. Familiar with emulation/prototyping tools and methodologies. Real experience of mapping complex SOC design into multi-FPGA platforms/emulators and hands on experience with Synopsys ZEBU, Cadence Palladium, Siemens Veloce or HAPS A proven track record with emulation-based verification methodologies including ownership of a suitably complex emulation workflow environment. Well versed in model building for prototyping or emulation. Experience with STA/timing closure, wrapper creation, HDL simulation, synthesis, and memory modelling for prototyping/emulation. Working knowledge of Perl, Python & Shell scripts is a plus Experience with digital systems based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols. Experience with SOC boot flow, writing basic test cases, clocking and platform bring up in Emulators or Silicon desired Interested in and passionate about staying updated with tech trends. Excellent verbal and written communication skills to communicate issues, impact and corrective action.

As an experienced Electronics Engineer, you will be responsible for designing and developing both analog and digital circuits for hardware systems. Your expertise in Analog Circuit Design, Digital Circuit Design, PCB Layout, Microcontroller Programming, Signal Processing, Embedded Systems, Hardware Debugging, and FPGA Design will be crucial in this role. Your day-to-day tasks will include creating PCB layouts and ensuring the proper integration of components, programming microcontrollers to enable various hardware functionalities, and implementing signal processing algorithms for data analysis. You will also be involved in the development and integration of embedded systems, as well as debugging hardware issues to optimize performance. Additionally, you will be expected to design and implement FPGA solutions as needed to meet the requirements of the projects you are working on. Your strong technical skills and attention to detail will be essential in ensuring the successful completion of these tasks. If you are passionate about electronics engineering and have a solid background in the aforementioned qualifications and skills, we encourage you to apply for this exciting opportunity to contribute to cutting-edge hardware development projects.,

You will be responsible for executing customer projects independently with minimum supervision, guiding team members technically in various fields of VLSI Frontend Backend or Analog design. As an individual contributor, you will take ownership of tasks/modules such as RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc., leading the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, delivering on-time quality work approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost accepted by UST Manager and Client. Additionally, you will be expected to write papers, file patents, and devise new design approaches. Your performance will be measured based on the quality of deliverables, timely delivery, reduction in cycle time and cost, number of papers published, number of patents filed, and number of trainings presented to the team. You will be expected to ensure zero bugs in the design/circuit design, deliver clean design/modules for ease of integration, meet functional specifications/design guidelines without deviation, and document tasks and work performed. Furthermore, you will be responsible for meeting project timelines, facilitating other team members" progress by delivering intermediate tasks on time, and seeking help and support in case of any delays. Your role will also involve active participation in team work, supporting team members as needed, anticipating when support may be required, and being able to explain project tasks and support delivery to junior team members. Your creativity and innovation will be showcased through tasks such as automating processes to save design cycle time, participating in technical discussions, training forums, white paper or patent filings, and contributing to technical discussions. Your skill set should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, Makefile, Spice, and familiarity with EDA Tools like Cadence, Synopsys, Mentor tool sets, and various simulators. You should have strong technical knowledge in IP Spec Architecture Design, Micro Architecture, Bus Protocols, Physical Design, Circuit Design, Analog Layout, Synthesis, DFT, Floorplan, Clocks, P&R, STA, Extraction, Physical Verification, Soft/Hard/Mixed Signal IP Design, and Processor Hardening. Additionally, you should possess communication skills, analytical reasoning, problem-solving skills, and the ability to interact effectively with team members and clients. Your knowledge and experience should reflect leadership and execution of projects in areas such as RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and understanding of design flow and methodologies. Independent ownership of circuit blocks, clear communication, diligent documentation, and being a good team player are essential attributes for this role. Overall, your role will involve circuit design and verification of Analog modules in TSMC FinFet technologies, developing circuit architecture, optimizing designs, verifying functionality, performance, and power, as well as guiding layout engineers. Strong problem-solving skills, results orientation, attention to detail, and effective communication will be key to your success in this position.,

1-3 years of experience in RTL DFT Verification (DFx). Good Understanding of JTAG IEEE-1149.1 and IJTAG IEEE P1687 standard. Understanding of using ICL and PDL files for verification and knows to create a testbench. Experience in JTAG RTL verification within any UVM. Able to debug simulation fails effectively utilizing debug tools like Synopsis Verdi. Basics of system Verilog, Basics of UVM, and preferably System Verilog assertions Scripting knowledge of TCL/Perl. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore