156 Mixed Signal Jobs

You will be responsible for developing block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Your role will involve applying your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using various tools and techniques to identify and troubleshoot issues, while keeping updated on new verification methods. Collaborating with multiple internal and external stakeholders will be essential to align on projects, provide updates, and resolve any issues that may arise. Minimum Qualifications: - Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field with 2+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR Associate's degree in Computer Science, Mathematics, Electrical Engineering, or related field with 4+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR High School diploma or equivalent with 6+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, RMAP). You should have solid experience of 3 to 6 years in developing high-speed IO/ESD/Analog layout design, along with expertise in working on FinFet layouts in lower nodes, with a preference for TSMCN 7nm and below. Proficiency in utilizing the best and latest features of Cadence VXL and Calibre DRC/LVS is required. A basic understanding of IO/ESD designs and knowledge of Basic SKILL/PERL will be beneficial. You should be capable of working independently and as part of a team, including coordinating work with contract workforces. Effective communication and collaboration skills with global engineering teams are essential for this role. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities throughout the application and hiring process. Should you require an accommodation, please contact disability-accommodations@qualcomm.com or Qualcomm's toll-free number. Qualcomm expects all employees to adhere to applicable policies and procedures, including those related to security and protecting the company's confidential information. Please note that our Careers Site is intended for individuals seeking jobs at Qualcomm. Staffing and recruiting agencies are not authorized to use this site to submit profiles, applications, or resumes. Unsolicited submissions from agencies will not be accepted. For further information about this role, please reach out to Qualcomm Careers directly.,

•BE/B.Tech in ECE /M.Tech in VLSI with 6 to 9 years experience in Analog Mixed Signal Verification •Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks •Very Good experience in Analog Mixed Signal verification simulation tools •Good experience in System Verilog, UVM methodologies •Able to train the team members and guide them to the solutions for problems •Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch. •Good experience in Gate level netlist simulation •Experience in Python, Perl, Shell scripting is added advantage. •Good communication and documentation skills

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques You are adept at communicating effectively with cross-functional teams to ensure successful project execution You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future, What Youll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment, Collaborate with cross-functional teams to ensure successful project execution, Create and review layout documents to ensure they meet quality standards and are delivered on time, Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release, You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase, Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts, Your expertise will ensure the successful implementation of CMOS and FINFET technologies, Through effective troubleshooting, you will contribute to achieving clean physical verification results, Your attention to detail will ensure that layout documents meet quality standards and deadlines, By managing project schedules and milestones, you will help deliver projects on time, Your collaboration with cross-functional teams will enhance project success and innovation What Youll Need: Bachelor's or Master's degree in Electrical Engineering or a related field, Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout, Proficiency in Analog Layout Flow from device placement to GDS release, Strong knowledge of CMOS and FINFET technologies and semiconductor device physics, Experience with EDA tools for custom mixed-signal layout flows, Understanding of CMOS fabrication technology and deep sub-micron effects on layout, Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout, Passion for learning and exploring new techniques, Who You Are: A proactive leader with excellent communication and mentoring skills, Detail-oriented and committed to delivering high-quality results, Innovative and capable of driving technological advancements, Collaborative and able to work effectively with cross-functional teams, A problem-solver with strong analytical skills, The Team Youll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organization's goals, Show

You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognized for your ability to balance technical depth with practical implementation. Your expertise in I/O development, ESD (Electrostatic Discharge), and Latch-Up (LU) robustness sets you apart, and you are eager to build solutions that power the next generation of high-performance chips. You bring a strong foundation in FinFet, FDSOI, and BCD technologies, and you are excited by the prospect of owning projects end-to-end from conceptual design through to silicon qualification. Your approach is meticulous and data-driven, ensuring each design meets the highest standards of quality and reliability. You are comfortable working across cross-functional teams, collaborating with foundries, and integrating feedback from global stakeholders. Continuous learning excites you, and you embrace opportunities to mentor others, share knowledge, and contribute to a culture of technical excellence. You are motivated by the impact your designs have on real-world products and are committed to delivering robust, scalable, and innovative solutions for Synopsys worldwide customers. What You ll Be Doing: Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes. Owning the full lifecycle of ESD structures from schematic design, simulation, and layout to silicon qualification and production release. Leading and executing I/O development, including I/O ring design, review, and optimization for performance and robustness. Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements. Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity. Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality. Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions. The Impact You Will Have: Elevating the reliability and performance of Synopsys interface IPs, directly influencing the success of global semiconductor customers. Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry. Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions. Accelerating time-to-market for customer products through efficient and high-quality design practices. Fostering a culture of technical excellence and continuous improvement within the analog design team. Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects. What You ll Need: Proven experience in analog circuit design, with a focus on I/O development and ESD/LU robustness. Hands-on expertise with FinFet, FDSOI, and BCD process technologies from leading foundries. Strong background in ESD and Latch-Up qualification methodologies, including testchip development and validation. Proficiency in ESD simulation, ESD network construction, and use of industry-standard tools. Comprehensive understanding of PERC rules and practical experience with PERC verification tools. Experience working with cross-functional teams including foundry, design, and layout groups. Who You Are: An analytical thinker with excellent problem-solving skills and keen attention to detail. A collaborative team player who values diversity, inclusion, and open communication. A proactive learner who stays current with industry trends and emerging technologies. An effective communicator, able to translate complex technical information to diverse audiences. A results-driven individual who is adaptable, resilient, and comfortable with fast-paced, high-impact work. The Team You ll Be A Part Of: You ll join a passionate, multidisciplinary team of analog and mixed-signal engineers dedicated to advancing Synopsys interface IP portfolio. The team is focused on delivering robust, innovative, and high-quality solutions that meet the rigorous demands of a global customer base. Collaboration, continuous improvement, and technical mentorship are at the core of our culture, ensuring you ll have the support and opportunities needed to thrive and grow. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Educational Background:Masters, BachelorsElectrical Engineering , VLSI , Embedded and VLSI , ECE Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Interns Group, Interns Group > Interim Engineering Intern - HW Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Educational Background:Masters, BachelorsElectrical Engineering , VLSI , Embedded and VLSI , ECE Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail myhr.support@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Analog Design, Sr Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12357 Remote Eligible No Date Posted 24/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate engineer eager to make a tangible impact in the world of analog and mixed-signal design. With a strong foundation in electronics or electrical engineering, you thrive in environments that challenge your technical and creative abilities. You are meticulous in your approach, ensuring the highest quality in every design you touch. Your curiosity drives you to stay at the forefront of CMOS technologies and deep submicron process innovations. You possess a collaborative spirit, enjoying teamwork with cross-functional groups to deliver best-in-class solutions. Communication is one of your strengths, enabling you to articulate complex technical concepts clearly and effectively. You are adaptable, excited by emerging technologies like DDR and HBM memory interfaces, and always seeking opportunities to grow your expertise. Above all, you are driven by a desire to contribute to groundbreaking products that set industry standards and improve the way people live and connect. What You ll Be Doing: Design and layout of DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring high performance and reliability. Collaborate closely with DDR/HBM PHY, package, and system engineering teams to align on design specifications and project goals. Develop and optimize analog and mixed-signal circuits in deep submicron CMOS processes. Contribute to the definition and implementation of circuit design flows and methodologies for advanced memory interfaces. Analyze and verify circuit performance against JEDEC and industry standards for DDR interfaces. Document your design work and effectively communicate progress and technical challenges with internal teams. Participate in design reviews, provide constructive feedback, and continuously improve design quality and efficiency. The Impact You Will Have: Drive innovation in the design of high-speed memory interfaces, directly influencing the performance of next-generation electronic devices. Enhance Synopsys reputation as a leader in analog and mixed-signal IP for advanced semiconductor applications. Help deliver robust, high-quality silicon solutions that power cutting-edge technologies worldwide. Facilitate seamless integration of memory interfaces into complex SoC designs, improving time-to-market for customers. Contribute to customer success by ensuring compliance with industry standards and exceeding reliability expectations. Support the continuous improvement of design methodologies and best practices within the team and organization. What You ll Need: BTech or MTech in Electronics or Electrical Engineering. 2 4 years of experience in analog/mixed-signal CMOS circuit design, preferably with exposure to deep submicron process technologies. Strong understanding of CMOS processes, circuit design, and layout methodologies. Familiarity with ASIC design flow and ESD concepts; hands-on experience is a plus. Knowledge of JEDEC requirements for DDR interfaces, DDR timing, ODT, and SDRAM functionality is highly desirable. Proficiency in executing circuit design tasks efficiently while maintaining high product quality. Effective written and verbal communication skills for collaboration with internal teams. Who You Are: Detail-oriented and quality-driven, consistently striving for technical excellence. Collaborative team player eager to contribute and learn in a dynamic, cross-functional environment. Adaptable and resourceful, able to manage multiple priorities and shifting project requirements. Proactive problem-solver with a growth mindset, always seeking opportunities for innovation and improvement. Clear communicator, able to convey complex technical ideas to both peers and non-technical stakeholders. The Team You ll Be A Part Of: You ll join a diverse and talented group of engineers focused on developing industry-leading analog and mixed-signal IP for memory interfaces. Our team collaborates across disciplines to tackle complex technical challenges and deliver innovative solutions. We value open communication, knowledge sharing, and mutual support as we push the boundaries of what s possible in semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Analog Design Engineer with exposure to ADC/DAC/ PLL designs . Job Description In your new role you will: Be a part of the SRSS team in India, where you will: Own and contribute towards designing of Analog I/P . Design and test analog electronic circuits, including sensor interfaces, data converters, multiplexers, active and passive filters, and power distribution systems. Simulate analog or mixed-signal circuits to ensure that performance, noise, timing, and power requirements are satisfied including worst-case and/or statistical design verification and de-rating analysis. Perform the block level and transistor level layout design and optimization of sensor array readout circuits using CAD tools like Cadence Virtuoso and Calibre. Your Profile You are best equipped for this task if you have: Bachelors with 6+ years or Masters with 5+ years of experience. Proficiency in analog / circuit design skills. Good knowledge in Reference, regulator or amplifier designs ,. Have an good understanding on ESD. Good understanding on the clock , jitter phase noise, is an added advantage. Exposure to ADC/DAC/ PLL designs are preferable Proficiency in tools like Cadence virtuoso design environment and Spectre/spice/AMS simulation environment. Know how in handling MATLAB script is desirable. Exposure to unix operating system. for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Title: Lead Engineer Analog and Mixed Signal Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is looking for highly motivated Analog and Mixed Signal Design Engineer to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of analog circuit design blocks like BGR, LDO, OTA, Current mirrors Your Job: Sound foundation in Analog and Mixed signal circuit design in advanced silicon technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 7 years experience or PhDs with 3 years experience from top tier institutes Applicant should have proficient knowledge of Analog circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in analog blocks like OPAMP, OTA, Bandgap References (BGR), LDO, Biasing circuits with temperature compensation and mismatch aware circuit design Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog design flows and knowledge of ADC, DACs is a plus Good publication and patent record Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title: Lead Engineer Analog and Mixed Signal Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is looking for highly motivated Analog and Mixed Signal Design Engineer to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of analog circuit design blocks like BGR, LDO, OTA, Current mirrors Your Job: Sound foundation in Analog and Mixed signal circuit design in advanced silicon technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 7 years experience or PhDs with 3 years experience from top tier institutes Applicant should have proficient knowledge of Analog circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in analog blocks like OPAMP, OTA, Bandgap References (BGR), LDO, Biasing circuits with temperature compensation and mismatch aware circuit design Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog design flows and knowledge of ADC, DACs is a plus Good publication and patent record Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

As an Analog Layout Engineer at AISemiCon, you will play a critical role in the design and development of high-performance analog and mixed-signal integrated circuits (ICs). Your main responsibility will be to create layout designs for analog blocks and ensure their adherence to design rules, specifications, and performance targets. You will collaborate closely with cross-functional teams, including circuit designers, verification engineers, and process engineers, to achieve optimal layout implementation. We are seeking individuals with a strong passion for analog layout, deep expertise in IC design, and a keen eye for detail. The key responsibilities for this role include, but are not limited to: Requirements: Excellent work experience in Analog Layout design in advanced node processes Hands on experience in any or multiple critical blocks such as BGR, LDO, Charge pump, SERDES, PHY, HDMI, PLL, ADC, DAC, LDO, Current Mirrors, Comparator, Differential Amplifier etc. Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process Excellent understanding of Analog Layout concepts (e.g. Matching, Electro- migration, Latch-up, Coupling, Cross-talk, IR-drop, Active and Passive parasitic devices etc. Excellent problem-solving skills in Routing Congestion, Physical Verification in Custom Layout. Work closely with the verification team to address layout-related issues and ensure design robustness. Follow design rules, guidelines, and best practices to ensure design manufacturability and yield. Collaborate with process engineers to understand process requirements and optimize layout designs accordingly. Conduct layout parasitic extraction and work with the simulation team to validate and optimize design performance. Participate in design reviews and contribute to overall design improvements. Stay updated with the latest advancements in analog layout techniques, process technologies, and industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering or a related field. 7-8 Years of proven experience in analog layout design, with expertise in IC design methodologies and tools. Sound knowledge and experience for verification checks like DRC / LVS / ERC / Antenna / LPE / DFM etc. Knowledge of various analog layout techniques, understanding of various circuit principles as affected by Layouts such as speed, capacitance, power, noise, and area Proficiency in industry-standard layout tools, such as Cadence Virtuoso or Synopsys IC Compiler and verification tools in a Linux environment of Cadence EDA tools. Solid understanding of layout design principles, design rules, and process technologies. Familiarity with analog block-level and top-level layout techniques for performance optimization. Knowledge of layout parasitic extraction and simulation methodologies. Excellent attention to detail and problem-solving skills. Effective communication and collaboration skills to work in a cross-functional team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. By using this form you agree with the storage and handling of your data by this website. *

Data Converters (ADC/DAC) and PLL More Details Data Converters (ADC/DAC) and PLL AISEMICON As a Senior Analog/Mixed-Signal Design Engineer at AISemiCon, you will play a crucial role, focusing on high-performance analog- to-digital and digital-to-analog converters and PLL. The successful candidate in this role will do architecture, transistor level design starting from initial specification, through design and layout supervision. We are seeking individuals who have a strong passion for analog and mixed-signal design, possess deep expertise in Data Converters and PLLs, and thrive in solving complex challenges. The key responsibilities for this role include, but are not limited to: Responsibilities: High-performance analog or mixed-signal IC development in advanced CMOS processes Thorough familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design techniques. Collaborate with cross-functional teams to define and architect Data Converter (ADC/DAC) and PLL solutions for high-speed data acquisition and timing generation applications. Design and develop high-performance analog and mixed-signal circuits, including Data Converters and PLLs. Conduct transistor-level design, simulation, and layout of Data Converter and PLL blocks. Perform system-level verification and characterization of Data Converter and PLL designs, including performance analysis, noise analysis, and timing verification. Work closely with the system engineering team to ensure the Data Converter and PLL designs meet the performance requirements and specifications of the target applications. Drive innovation by exploring new techniques, circuit topologies, and emerging technologies in Data Converters and PLLs. Collaborate with customers and partners to understand their requirements and provide customized solutions. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in Data Converter and PLL design, industry standards, and emerging technologies. Qualifications: 5-7 years of experience in designing high performance building block circuits such as Bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools MATLAB understanding would be an added advantage Deep understanding of Data Converter architectures, analog-to-digital and digital-to-analog conversion techniques, and PLL principles. Proficiency in industry-standard EDA tools for IC design, simulation, and layout. Solid knowledge of system-level trade-offs and constraints in areas such as resolution, speed, power consumption, noise, and jitter. Experience with Data Converter and PLL characterization, validation, and debugging. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. By using this form you agree with the storage and handling of your data by this website. *

Developing best-in-class architecture for Analog Mixed Signal IPs and high-speed parallel PHY interface solutions for next generation NAND flash memory controllers in advanced CMOS technology nodes. Interact with cross-functional teams to define requirements/specs, conceive the optimal solution by evaluating architectures, drive implementation, closely work with layout designers in guiding and reviewing the layouts, ensure timely and high-quality deliverables, extend SOC integration support and review and provide support for post-silicon activities from IP characterization to yield improvement and RMA. Provide good technical leadership in problem solving, planning and mentoring junior and senior engineers. Propose innovative design solutions and design methodologies. Fostering innovation culture and developing efficient processes by adopting state-of-the-art technologies. Qualifications Must have Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering Working experience (20+ years) in IO including 5+ years as a project leader S

The detailed JD is given below Requirements : - B.Tech/M.Tech with 5+ Years of industry experience in analog/mixed signal behavioral modeling at various levels of abstraction and full chip verification (AMS and DMS DV) using SV RNM or Custom UDN s. Good understanding of analog design concepts and mixed signal design architectures. Exposure to products that integrate a wide variety of Analog/Mixed-Signal building blocks such as Power Management, PLL/Synthesizers, ADC, DAC, bandgap references, oscillators/clocking circuits, Phase Interpolators, SerDes etc. and related digital control and signal processing. Demonstrated experience of verification plan development, UVM verification environment development/debug and verification of complex mixed signal products at block, Subsystem & chip-top levels. Familiarity with Analog/Mixed-Signal/RF design architectures and debug experience with schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision. Experience of imulations with analog model and digital RTL/Gate+SDFs. Experience and debug with digital simulators such as Cadence Xcelium/DMSO/Synopsys VCS. Experience in developing self-checking testcases, functional/code coverage & formal verification. Tracking of verification metrics and regression management, Metric Driven Verification (MDV) framework using tools such as Cadence vManager. Experience in closing the verification of analog designs using industry standard metrics is a must. Quick to adopt new technologies with good problem-solving skills. Collaborate and work closely with team members from various disciplines (system architects, digital design, analog design, digital DV etc.). Self-motivated and enthusiastic.

Apply to this job We are looking for a highly skilled and experienced DFT Engineer to become part of our team. Our DFT Engineers will build efficient System on Chip (SoC) and IP for data center applications. This role offers the opportunity to work with industry-standard Siemens/Synopsys DFT EDA tools and IEEE standards (1149, 1500, 1687) while contributing to cutting-edge technology. This role includes developing and applying DFT strategies for complex mixed-signal integrated circuits (ICs), ensuring fault coverage and testability. ASIC Implementation, DFT Engineer Responsibilities Develop and implement DFT strategies for mixed-signal ICs, considering factors such as fault coverage, test time, and in-system test Ensure compliance with IEEE standards (1149, 1687) for DFT methodologies and test patterns Conduct fault simulation and coverage analysis to assess the effectiveness of DFT strategies and identify areas for improvement Generate high-quality test patterns using automated test pattern generation (ATPG) tools Verify the correctness of DFT implementation through simulation and hardware testing Collaborate with design/implementation teams to ensure that DFT requirements are met throughout the process Minimum Qualifications Bachelors degree in Electrical Engineering or Computer Engineering 6+ years of experience in DFT for mixed-signal ICs Understanding of DFT concepts, including scan insertion, BIST, and boundary scan In-depth knowledge of DFT EDA tools (Siemens/Synopsys) Familiarity with IEEE standards 1149, 1500, and 1687 Experience with fault simulation and coverage analysis tools Problem-solving and analytical skills Strong communication skills Experience of consistently working under your own initiative, seeking feedback and input where appropriate Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion, and test pattern generation Preferred Qualifications Masters degree in Electrical Engineering or Computer Engineering 10+ years of experience in DFT strategies implementation and development for mixed signal ICs Experience with mixed-signal DFT methodologies Knowledge of scripting languages (e.g., Perl, Python) for automation Experience with hardware testing and debugging About Meta . Equal Employment Opportunity . Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form .

You should hold a B.E/B.Tech/M.E/M.Tech/M.Sc degree in Electronics with a strong academic record. With over 5 years of experience, you must have specialized in developing intricate embedded systems/FPGA based projects. Your role will entail leading and overseeing complex embedded systems projects from inception to completion, guiding junior team members as well as collaborating with them. Proficiency in hardware design & analysis (analog, digital, mixed signal) with adept troubleshooting skills is essential. You should possess exceptional C skills and knowledge of common programming languages like python. Troubleshooting software issues and providing support to team members in overcoming obstacles during their development are key responsibilities. Engaging with customers, managing multiple projects executed by diverse teams, and delivering embedded systems/FPGA based projects are part of the job requirements. Proficiency in using various test & measuring equipment such as oscilloscope, signal generator, logic analyzer is necessary. Establishing and adhering to high-quality systems & procedures, adapting to new technologies, and working independently with minimal guidance are also crucial aspects of this role.,

Analog IP development including circuit design, layout, AMS verification, and characterization. Analog IP development Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs,

You will be responsible for PCB designing and layout design engineering with a focus on high-speed board designing using tools such as Cadence Allegro, Altium, and Mentore Graphics Pads/Expedition. Your role will involve schematic capture, library generation, routing rules creation, signal integrity optimization, and power supply board layout designing. You should have experience in working on complex designs involving RF/Analog and digital technology across multiple logic families. As a PCB Designer, you are expected to have expertise in understanding electrical aspects like SI/Timing/EMI and providing solutions to customers. You should possess in-depth knowledge of PCB fabrication, including HDI, and be familiar with the industry's DFx needs. Additionally, you will be responsible for updating your skillset and supporting the training of your team. The ideal candidate should have 3-8 years of experience in PCB Designing and High-Speed Board Design. You should be proficient in tools such as Cadence Allegro, Altium, and Mentore Graphics Pads/Expedition. Your expected CTC in Lakhs per annum will be a determining factor for this role. This is a full-time position based in Bangalore, JP Nagar, with benefits such as food provision, health insurance, and Provident Fund. The work schedule is during day shifts with additional perks like a performance bonus and shift allowance. If you meet the experience requirements and possess the necessary skills in PCB designing and layout, we encourage you to apply for this opportunity.,

Participate in DDR/HBM Memory Interface I/O circuit and layout design, including GPIO and special IO s. Collaborate closely with the DDR/HBM PHY team, package engineers, and system engineers to ensure all design specifications are met. Support the execution of assigned circuit design tasks to achieve optimal product quality and efficiency. Engage in technical discussions and share creative solutions with cross-functional internal development teams. What You ll Need: Currently pursuing a bachelor s or master s degree in electronic engineering, Electrical Engineering, Computer Engineering, or a related field (preferably in the penultimate or final year of study). Knowledge of CMOS processes and deep submicron process technology challenges. Experience with CMOS circuit design and layout methodology & flow; a basic understanding of analog/mixed signal circuitry, with familiarity in basic ESD concepts considered an advantage. Familiarity with the ASIC design flow. Understanding of JEDEC requirements for DDR interfaces & standards, DDR timing, ODT, and SDRAM functionality is a plus. Strong written and verbal communication skills for effective collaboration within development teams.

Analog Devices is looking for Senior Design Verification Engineer to join our dynamic team and embark on a rewarding career journey Analyzing customer needs to determine appropriate solutions for complex technical issues Creating technical diagrams, flowcharts, formulas, and other written documentation to support projects Providing guidance to junior engineers on projects within their areas of expertise Conducting research on new technologies and products in order to recommend improvements to current processes Developing designs for new products or systems based on customer specifications Researching existing technologies to determine how they could be applied in new ways to solve problems Reviewing existing products or concepts to ensure compliance with industry standards, regulations, and company policies Preparing proposals for new projects, identifying potential problems, and proposing solutions Estimating costs and scheduling requirements for projects and evaluating results

You are a passionate engineer eager to make a tangible impact in the world of analog and mixed-signal design. With a strong foundation in electronics or electrical engineering, you thrive in environments that challenge your technical and creative abilities. You are meticulous in your approach, ensuring the highest quality in every design you touch. Your curiosity drives you to stay at the forefront of CMOS technologies and deep submicron process innovations. You possess a collaborative spirit, enjoying teamwork with cross-functional groups to deliver best-in-class solutions. Communication is one of your strengths, enabling you to articulate complex technical concepts clearly and effectively. You are adaptable, excited by emerging technologies like DDR and HBM memory interfaces, and always seeking opportunities to grow your expertise. Above all, you are driven by a desire to contribute to groundbreaking products that set industry standards and improve the way people live and connect. What You ll Be Doing: Design and layout of DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring high performance and reliability. Collaborate closely with DDR/HBM PHY, package, and system engineering teams to align on design specifications and project goals. Develop and optimize analog and mixed-signal circuits in deep submicron CMOS processes. Contribute to the definition and implementation of circuit design flows and methodologies for advanced memory interfaces. Analyze and verify circuit performance against JEDEC and industry standards for DDR interfaces. Document your design work and effectively communicate progress and technical challenges with internal teams. Participate in design reviews, provide constructive feedback, and continuously improve design quality and efficiency. The Impact You Will Have: Drive innovation in the design of high-speed memory interfaces, directly influencing the performance of next-generation electronic devices. Enhance Synopsys reputation as a leader in analog and mixed-signal IP for advanced semiconductor applications. Help deliver robust, high-quality silicon solutions that power cutting-edge technologies worldwide. Facilitate seamless integration of memory interfaces into complex SoC designs, improving time-to-market for customers. Contribute to customer success by ensuring compliance with industry standards and exceeding reliability expectations. Support the continuous improvement of design methodologies and best practices within the team and organization. What You ll Need: BTech or MTech in Electronics or Electrical Engineering. 2 4 years of experience in analog/mixed-signal CMOS circuit design, preferably with exposure to deep submicron process technologies. Strong understanding of CMOS processes, circuit design, and layout methodologies. Familiarity with ASIC design flow and ESD concepts; hands-on experience is a plus. Knowledge of JEDEC requirements for DDR interfaces, DDR timing, ODT, and SDRAM functionality is highly desirable. Proficiency in executing circuit design tasks efficiently while maintaining high product quality. Effective written and verbal communication skills for collaboration with internal teams. Who You Are: Detail-oriented and quality-driven, consistently striving for technical excellence. Collaborative team player eager to contribute and learn in a dynamic, cross-functional environment. Adaptable and resourceful, able to manage multiple priorities and shifting project requirements. Proactive problem-solver with a growth mindset, always seeking opportunities for innovation and improvement. Clear communicator, able to convey complex technical ideas to both peers and non-technical stakeholders. The Team You ll Be A Part Of: You ll join a diverse and talented group of engineers focused on developing industry-leading analog and mixed-signal IP for memory interfaces. Our team collaborates across disciplines to tackle complex technical challenges and deliver innovative solutions. We value open communication, knowledge sharing, and mutual support as we push the boundaries of what s possible in semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a safer, sustainable and more connected world. Job Overview The Sr. R&D/Product Development Engineer will be responsible for Design & Development of RF circuits/modules for RFoF (Radio Frequency Over Fiber) products for Aerospace, Defense & Marine Market requirements. The Sr Engineer will work closely with global and local cross functional teams to develop products by translating a customer requirements into a product requirement, work through the development cycle including testing, approval and release into Production. Responsibilities Design and analysis of RF and/or Mixed Signal hardware, define RF link architecture Conduct detailed electrical design, supporting prototype and final hardware build & test Carry out component selection, schematic capture and PCB layout of parts Lead RF hardware projects from design to test to delivery through proper design methodology. Ensure on time delivery and first time right approach in all the project deliverables. Work with local and global counterpart / stake holder for ensuring quality deliverable and project execution. Interface with system, mechanical, software, and other engineers for ensuring design and task completion Work closely with third party vendor / supplier to define the technical requirements for the product and project execution. Mentor the new team members on design and development of RF product design Required Skills Education/ Knowledge: BE/BTech with specialization in Electronics & Communications Engineering Min 10 years of experience in RF Microwave board design and development Critical experience: Experience with RF Microwave design for aerospace & defense applications Handson with LNA and RF PA design and functional testing RF link loss analysis for transceivers and RADAR applications Experience with ADS or Microwave Office, Cadence, Sonnet and HFSS software applications Familiarity with standard test equipment such as oscilloscopes, power meters, logic analyzers, signal/spectrum analyzers, etc. Familiarity with EMI/EMC requirements, qualification processes and electronics documentation Knowledge of RF module applications such as RADAR, Satcom, C5ISER, EW Familiarity with optical transceivers will be an added advantage COMPETENCIES Technical capabilitiesExpert functional/domain knowledge Strong Technical Aptitude with Willingness to learn new Technologies quickly. Competencies

Analog Layout Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech ESSENTIAL DUTIES AND RESPONSIBILITIES: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas

Lead Analog Layout Engineer Experience8 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Ability to handle a team Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas