242 Mixed Signal Jobs - Page 5

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . Analog Devices (ADI) has just over $9 billion in revenue with offices around the world. As a global leader in the design and manufacturing of analog, mixed signal, power management and DSP integrated circuits, ADI is known for helping to solve its customers toughest engineering challenges. With a commitment to engineering for good, ADI strives to create a more sustainable future, while also focusing on its employees through mentoring programs, employee networks and continuous learning opportunities. At ADI, you will learn from the brightest minds who are here to help you grow and succeed. You will make an impact through work on meaningful projects alongside a team of experts. ADI s culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards Job Req Type: Experienced Required Travel: No Shift Type: 1st Shift/Days

Senior Staff Engineer - Analog Layout Hyderabad, Telangana, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10892 Remote Eligible No Date Posted 14/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You ll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. Create and review layout documents to ensure they meet quality standards and are delivered on time. Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release. You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase. Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation What You ll Need: Bachelors or Masters degree in Electrical Engineering or a related field. Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: A proactive leader with excellent communication and mentoring skills. Detail-oriented and committed to delivering high-quality results. Innovative and capable of driving technological advancements. Collaborative and able to work effectively with cross-functional teams. A problem-solver with strong analytical skills. The Team You ll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts. The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organizations goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Analog Mixed Signal Design, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 11938 Remote Eligible No Date Posted 14/07/2025 We Are: You Are: You are a passionate and detail-oriented engineer with a strong foundation in CMOS analog and mixed-signal circuit design. You thrive in collaborative, high-impact environments and are motivated by the challenge of developing cutting-edge silicon solutions. With a solid background in deep submicron process technologies, you understand the nuances of DDR interfaces and the importance of robust, scalable, and high-performance circuit design. You are adept at balancing innovation with reliability, ensuring that your designs meet stringent quality and efficiency standards. Your experience enables you to approach complex problems methodically, and you are always eager to stay ahead of technology trends, continuously learning and applying new knowledge to your work. You value open communication and are comfortable working across diverse, global teams. You believe that inclusion, diversity, and mutual respect are essential to driving the best outcomes. Whether you re mentoring junior engineers, collaborating with peers, or interacting with cross-functional partners, you demonstrate professionalism, empathy, and a drive for excellence. Above all, you are excited to contribute to solutions that power the smart, connected world of tomorrow. What You ll Be Doing: Designing and developing advanced DDR I/O circuits for next-generation SoCs, focusing on performance, power efficiency, and reliability. Executing end-to-end circuit design tasks, including schematic capture, simulation, layout, and design validation. Collaborating with cross-functional teams to integrate analog and mixed-signal IP blocks into larger system architectures. Ensuring compliance with JEDEC standards for DDR interfaces, including timing, ODT, and SDRAM functionality. Conducting design reviews, analyzing process variations, and implementing robust design-for-manufacturability strategies. Documenting design methodologies, contributing to continuous improvement, and sharing best practices within the team. Providing technical guidance and mentorship to junior engineers and interns. The Impact You Will Have: Enable the rapid integration of high-quality analog IP into complex SoC designs, reducing time-to-market for customers. Drive design innovation that meets the evolving demands of performance, power, and area in advanced semiconductor technologies. Ensure the delivery of robust and reliable DDR I/O solutions that meet or exceed industry standards. Support Synopsys position as a global leader in silicon IP by delivering differentiated, high-performance products. Contribute to customer success by addressing application-specific requirements and providing technical expertise. Promote a culture of knowledge sharing, technical excellence, and continuous improvement within the engineering team. What You ll Need: BTech (with 5+ years of experience) or MTech (with 3+ years of experience) in Electrical/Electronics Engineering or related field. Strong understanding of CMOS process technologies and deep submicron design challenges. Proficiency in analog and mixed-signal circuit design, including layout methodologies and flow. Experience with DDR interface design, JEDEC standards, DDR timing, ODT, and SDRAM functionality (a plus). Familiarity with ASIC design flow and ESD concepts. Demonstrated ability to execute complex design tasks efficiently and with high quality. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator, both written and verbal, comfortable interacting with global teams. Self-motivated, proactive, and adaptable to rapidly changing project requirements. Team player who values diversity, inclusion, and knowledge sharing. Continuous learner, eager to adopt new tools, methodologies, and industry best practices. The Team You ll Be A Part Of: You ll join a dynamic, collaborative team of analog and mixed-signal designers focused on delivering state-of-the-art DDR I/O and silicon IP solutions. Our team thrives on innovation, technical excellence, and a supportive culture that encourages growth, creativity, and cross-functional collaboration. Together, we tackle complex challenges and enable Synopsys to lead in the rapidly evolving world of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title: Sr Engineer - Analog Mixed Signal About GlobalFoundries: Introduction: GlobalFoundries is looking for a highly motivated Engineer in Analog and RF circuit design to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Your Job: Sound foundation in analog and RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: Fresh Masters/MS/MTech from top tier institutes with good academic credentials Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents appreciated Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND

Title: Sr Engineer - Analog Mixed Signal About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is looking for a highly motivated Engineer in Analog and RF circuit design to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Your Job: Sound foundation in analog and RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: Fresh Masters/MS/MTech from top tier institutes with good academic credentials Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents appreciated Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation.

Responsibilities: Develops, modifies, verifies, troubleshoots, and evaluates analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems. Assists in building evaluation boards for analog and mixed signal electronic products and performing ESD, Surge tests. Conducts circuit simulation and analysis to validate designs. Performs signal integrity analysis and parasitic extraction and analysis to identify and minimize issues that could impact circuit performance Help in product characterizations and product verifications with final reports. Selects components and equipment based on analysis of specifications and reliability. Documents design features, test plans, specifications, block diagrams, and schematics. Minimum Qualifications: 7+ years of relevant industry experience in Analog and mixed signal electronic products Degree in Electrical Engineering Fluent spoken and written English Solid understanding and enthusiasm for analog circuit design Desired Qualifications Experience with ORCAD, Cadence, Altium electronic circuit layout software. Has experience working with Laptop computers/Power Management Products/ESD Protection products. Familiar with power electronic circuits and basic circuit operations. Know how to use lab equipment such as Oscilloscope, Source Meter, Electronic load, ESD gun, Surge tester and TLP machine.

Title System Software Engineer 2 CTC 15 to 25 lacs Experience 3 to 8 years Location Bangalore Job Requirements: Proven experience in board design through full development life cycle and configuration management for managing associated documentation (BOMs, schematics, drawings, etc.) Hands-on experience on test measurement equipment like oscilloscopes, multi-meters, power supplies Familiar with the Power, Mixed-Signal systems, Digital interfaces, and related HW design methodologies. Strong board design skills with experience in Mixed-Signal systems, High-speed serial interfaces(PCIe,SERDES,10G Ethernet), microprocessor subsystems, FPGA-based design and power distribution design concepts. Solid hands-on experience in Schematic capture tools like Altium and OrCAD Capture. Familiarity with PCB CAD Layout tools like Allegro Knowledge to understand SI-PI simulations is required Strong knowledge in board debugging Able to communicate clearly, organize effectively, and document work thoroughly while working with local and on-site teams. Familiar with the typical data and control interfaces. Examples include UART, USB, SPI, I2C, Ethernet, SDIO, PCIe, etc.

Title/Position: Analog LayoutEngineer Experience: 4-8 years Location: Bangalore / Hubli About us: Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, spec to the product. With 3500+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Tessolve offers a highly competitive compensation and benefits along with an electric work environment to scale one s intellect, skills and growth. Qualification : BE/BSC/Diploma Technical Skillset required: 4-8 years experience in Mixed Signal and Analog Layout. Conversant with Cadence Tools and Mentor Tools(Calibre) Experience with higher nodes like 180/150/130nm and below preferable. Experience on Dongbu PDK. Experience with layout of Analog blocks (reference, amplifier, data converters) is critical Experience with BCD process. Tessolve offers a highlycompetitive compensation and benefits along with an electric work environmentto scale one s intellect, skills, creates and environment for people who thrivefor success and grow with the organizations growth. Tessolve has somethingunique to offer to everyone depending on their interest levels. Disclaimer: At Tessolve, we are committedto fostering a workplace that embraces and celebrates diversity in all itsforms. We believe that diverse teams drive innovation, creativity, and success.We are dedicated to creating an inclusive environment where all employees,regardless of their race, color, religion, gender, gender identity orexpression, sexual orientation, national origin, genetics, disability, age, orveteran status, feel valued and respected. We believe in fair and equitabletreatment for all employees and aim to eliminate any biases or barriers thatmay hinder personal or professional growth.

Skills requried: • In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 16nm and lower technology nodes. - Should have experience in Analog and Mixed Signal Design • Should have experience in handling >5M instance count , 1.5GHz frequency designs . • Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency. • Must have hands-on experience on PnR Suite from Cadence & Synopsys (Innovus & ICC2) • Strong experience on Static Timing Analysis (PrimeTime - SI) , EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre). • Understanding the practical application of methodologies and Physical Design Tools, Flow Automation, and Improvements. • Experience in complex SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techniques.

Job Requirements Bachelor or master Degree with 3-10 years of Analog Layout experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable: Mixed signal/analog/high speed layout, e. g. PLL, IO, RF, PMIC, OSC, DC-DC convertor, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc). Experiences in advanced technology node under 16nm/14nm/7nm. 5nm/3nm will be an added advantage. Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc. ). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc. ). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in SKILL automation and circuit Design background is a plus. Good communication skills and willingness to work with global team. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment Work Experience Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc. ). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc. ). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in SKILL automation and circuit Design background is a plus.

This is a full-time on-site role for an AMS Verification Engineer at UANDWE, Inc. in Bengaluru. As an AMS Verification Engineer, you will have complete ownership of AMS verification for complex mixed signal blocks such as PLL, DFE, transmitters, receivers, etc. It is essential for you to understand the JDEC spec for DDR interface and define verification methodology. Your responsibilities will include test planning, creating testbenches, and verification using Cadence tool mixed signal design flow. Knowledge of RNM (real number model) modelling would be a plus. You will collaborate closely with Logic and Analog design teams to comprehend the requirements and provide feedback on the results. Additionally, you will be responsible for creating schedules, tracking progress, and identifying and addressing issues and risks to project management. To qualify for this role, you should hold a Masters or Bachelor's degree in Electronics Engineering, VLSI, or Microelectronics from a reputed university. You should have a minimum of 7 years of industry experience in AMS verification. Strong written and verbal communication skills are required, as well as the ability to work effectively as a team player with cross-functional teams.,

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Job Overview: As an Analog Mixed-Signal IC Layout Lead Engineer, you will play a critical role in designing advanced node Bi-CMOS / CMOS products. You will be responsible for managing chip top-level layout and integration along with block level layout design and ensuring successful tapeout. You will work to build state-of-the art high speed circuits minimizing layout parasitics, while applying techniques to reduce skew and crosstalk. Meeting EM/IR compliance requirements is essential. You will ensure strict adherence to DRC, LVS, ANT, and density rules. Additionally, awareness of ESD and latch-up design practices is expected to ensure robust and reliable layout implementations. You will apply a solid foundation in device physics, along with demonstrating a strong three-dimensional understanding of device layout. You will collaborate with a dynamic, cross-functional team of analog designers and layout engineers across multiple time zones. We are looking for a highly motivated, team-oriented individual who thrives in a collaborative environment. Basic Qualifications: Bachelor s degree or advanced diploma in Electrical Engineering (EE) Required Experience: 5+ years of experience in high-speed analog IC layout using Cadence Virtuoso Prior experience with BiCMOS layout is strongly preferred Proven experience handling at least one chip top-level through tapeout Proficiency in layout extraction and parasitic analysis for high-speed circuits Awareness of EMIR and antenna DRC rule-compliant layout practices Experience with Cadence SKILL and TCL scripting is highly recommended We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

R&D Manager - Hardware Job Profile: Lead and manage the hardware design and development team within the R&D department. Define hardware architecture and develop electronic circuit designs, including analog, digital, mixed-signal, and embedded systems. Oversee prototype development, testing, and validation of hardware components. Collaborate closely with software, firmware, mechanical, and systems teams to ensure seamless integration. Drive innovation by researching emerging technologies and incorporating best practices in hardware design. Establish and enforce hardware development processes, standards, and documentation. Manage hardware-related project timelines, resources, and budgets. Troubleshoot hardware issues and guide the team in resolving design challenges. Liaise with suppliers, manufacturing, and quality teams to facilitate smooth transition from R&D to production. Mentor and develop team members to build a high-performing hardware engineering group. Ensure compliance with relevant industry standards and regulatory requirements. Prepare technical reports, presentations, and documentation for internal and external stakeholders.

Develop Detailed Documentation for Verification Strategy and Test Plan for IP, Subsystem and SoC. Directed and Random Verification at IP, Subsystem and SoC Level for complex ARM / RISC-V processor based MCU, MPU products, Mixed Signal SoCs, Processors, Memory Subsystems, Connectivity Platforms, Analog, Security Acceleration, General Peripherals. Perform Functional and Code Coverage Analysis. Experience and Skills Required 5 to 15 years of experience in IP SoC Verification. Expertise in Verilog, System Verilog, UVM, Constrained Random Verification, Formal Verification, Mixed Signal Verification, Post-Layout Gate Level Simulations, Code Coverage and Functional Coverage analysis. Development of Verification IP and Testbenches. Experience with AMS simulations desired. Must have strong debug and analytical capabilities, root cause analysis. In-depth understanding of SoC Design Flow, RTL Implementation, Analog Circuit models. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

Job Description: We are looking for a highly motivated Mixed-Signal Design Verification Engineer with 3+ years of experience in analog/mixed-signal verification. The ideal candidate should possess strong fundamentals in analog and digital design processes, along with hands-on experience in mixed-signal modeling and testbench setup. Responsibilities: Develop and maintain mixed-signal testbenches from scratch Write and manage Analog Mixed Signal models using VerilogAMS and real number modeling Debug mixed-signal simulations and analyze waveform results Utilize Synopsys tools (CustomSim/Primesim XA, Waveview) and Cadence Spectre environment Automate workflows using Unix shell scripting and Python Desired Skills: Strong knowledge of analog building blocks and top-level integration Expertise in mixed-signal simulation performance optimization Proficient in Unix/Linux environments Strong scripting and automation capabilities Excellent communication and problem-solving skills

Company Overview Connectpro operates in the human-resources industry, specializing in recruitment and talent acquisition. Role And Responsibilities As a senior analog design engineer at Connectpro, you will be responsible for taking a subsystem of analog design through all phases of the design process. This includes: Creating the architecture of the analog subsystem Providing technical leadership to the team during execution Designing, simulating, and supervising the layout and verification processes Evaluating and debugging silicon samples You will be working with the latest Cadence analogue design tools including Virtuoso Composer, Verilog, HSPICE, and other PC-based tools like Matlab. The circuits you will be working on involve mixed signal blocks such as switched capacitor amplifiers, PLL, RAM, high-speed interfaces, references, IO circuits, data converters, and digital building blocks. Your role will also involve ensuring timely execution and collaborating with cross-functional teams like PE/TE. Experience with custom layout and analog verification is a plus. Candidate Qualifications To be successful in this role, you should possess the following qualifications: Bachelor's degree with 5-8 years of experience in CMOS, analog/power/mixed-mode IC design using tools similar to the ones mentioned above Strong fundamentals in CMOS analog design Excellent communication skills Ability to interact effectively with cross-functional teams Understanding of the semiconductor development flow Skills: hspice,semiconductor development flow,adc,,pll,icdesign,data converters,analog,layout/verification,dac,mixed signal,team management,cadence analogue design tools,custom layout,analog/power/mixed-mode ic design,simulation,evaluation/debug,amplifiers and filters,matlab,interact with cross functional teams,switched capacitor amplifiers,pmic,cmos process,cmos,,ram,ams,virtuoso composer,architecting,design,dll,,digital building blocks,references,analog verification,cmos,io circuits,hispeed interfaces,communication skills,verilog,analog design,

Minimum qualifications: Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience. 5 years of experience in DFT specification definition architecture and insertion. 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent). Experience with ASIC DFT synthesis, STA, simulation, and verification flow. Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, and debug of silicon issues, etc.). Preferred qualifications: Master's degree in Electrical Engineering, or a related field. Experience in IP integration (e.g., memories, test controllers, TAP, and MBIST). Experience in SoC cycles, including silicon bring-up and silicon debug activities. Experience in fault modeling. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will be responsible for defining, implementing, and deploying advanced Design for Testing (DFT) methodologies for digital, mixed-signal chips, or IPs. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design, insert, and verify the DFT logic. You will prepare for post-silicon and co-work/debug with test engineers. You will be responsible for reducing test cost, increasing production quality, and enhancing yield. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Develop DFT strategy and architecture, including hierarchical DFT/Memory Built-In Self Test (MBIST), IJTAG/TAP, and Hi-Speed IO. Demonstrate ownership from DFT logic, pre-silicon verification, to co-work with test engineers post silicon. Insert DFT logic, including boundary scan, scan chains, DFT Compression, Logic Built-In Self Test (BIST), Test Access Point (TAP) controller, Clock Control block, and other DFT IP blocks. Insert and hook up MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces. Document DFT architecture and test sequences, including boot-up sequence associated with test pins. Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high test quality and support post-silicon test team.

Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 5 years of experience in characterizing standard-cells or memory. 5 years of experience in static timing analysis and simulation. Preferred qualifications: Master's degree in VLSI Integration, Computer Engineering, Electronics Engineering, or a related field. Experience in spice and statistical circuit simulators, including FineSim, HSpice, Spectre, and Solido. Experience in Practical Extraction and Report Language (PERL)/Shell/Transaction Control Language (TCL) scripting or similar languages. Understanding of Complementary Metal-Oxide-Semiconductor (CMOS) circuits and timing concepts (e.g., setup, hold). Ability to automate repeatable tasks to improve efficiency/productivity using the scripting languages. Proficiency with industry-standard Electronic Design Automation (EDA) tools for implementation and signoff. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google Silicon team develops custom silicon solutions that provide differentiated user experiences in Google hardware products and optimize performance and power for the use cases. This includes SoCs and other mixed signal, logic, and sensor integrated circuits for our product portfolio. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Work with Post-Si teams to improve and debug Vmin and yield related issues. Explore and specify new custom circuit opportunities for optimized Power Performance Area (PPA) for high-performance, low-power subsystems. Work with the testchip teams on latest process nodes to build, validate and characterize custom IPs. Build automation for circuit design simulation and analysis. Work with cross-functional teams on circuit design, physical design and sign-off methodology teams.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3 to 7 years experienced professional in Digital / Mixed Signal design and analysis. This is a central role driving the dseign and development of complex DDR PHY IP for next-gen SoCs — from kickoff to silicon. What you'll work on1. Critical path design and analysis for high-speed IP 2. Cell profiling for advanced technology nodes 3. Signal & power integrityelectrical spec signoff and mitigation 4. System spec creation & jitter budgeting (on-die + off-die) 5. Timing bottleneck analysis and PPA improvements 6. Building automation to accelerate complex IP development 7. Strong interpersonal skills to collaborate with various functions and domain leads on IP development and execution

About Tessolve: Tessolve offers a unique combination of design, test, and product engineering services, enabling our customers to bring products from concept to high-volume production. With a strong presence in semiconductor engineering, we provide a robust environment for growth, learning, and career development. Job Description: We are looking for a skilled and motivated Analog Layout Engineer with 1 3 years of experience in deep sub-micron analog/mixed-signal layout design. The ideal candidate will be responsible for implementing transistor-level layout of analog and mixed-signal blocks while ensuring best practices in layout techniques for matching, parasitic reduction, and reliability. Job Title: Analog Layout Engineer Experience: 1 to 3 Years Location: Bangalore Key Responsibilities: Ownership of full-custom analog layout blocks from schematics to verified layout. Work closely with circuit design engineers to understand requirements and deliver robust layouts. Perform layout verification using DRC, LVS, ERC, and PEX tools. Support block-level and top-level integration. Optimize layout for performance, area, power, and reliability across different PDKs (90nm, 65nm, 28nm, etc.). Deliver high-quality GDSII on schedule. Required Skills & Experience: 1 to 3 years of hands-on experience in analog layout design . Strong understanding of analog design fundamentals and layout techniques (matching, shielding, symmetry, etc.). Experience in Cadence Virtuoso layout tools and verification tools like Calibre or Assura. Good knowledge of CMOS process and parasitic effects . Exposure to layout of blocks such as op-amps, bandgap references, data converters, PLLs, LDOs, etc., is a plus. Strong communication skills and ability to work collaboratively in a team environment. Preferred Qualifications: Bachelor s/Master s degree in Electronics, ECE, VLSI, or related discipline . Understanding of ESD/Latch-up rules and reliability best practices. Experience in scripting (SKILL, Python) is a plus.

Analog & Mixed-Signal Validation Engineer Job Description In your new role you will: As an Analog & Mixed-Signal Validation Engineer for power productsyou will responsible to measure datasheet parameters for PowerIC s(Controllers, drivers, current sensors, power switches) Debug issues related to IC functioning and parametric failures, and root causing the issues with help of design team. Usage of different type of instruments used in LAB (DMM, Oscilloscopes, Power Supplies, AFG etc) Development of Python Scripts for Test Automation. Collating measurements data and analysing it to find anomalies, trends and identify potential issues in design. Designing of the boards required for testing Power ICs considering power and signal integrity aspects. Work with Test/Product teams in debugging and correlating the results between the ATE and Bench platforms. Your Profile You are best equipped for this task if you have: Master s /bachelor s degree in Electrical/Electronic Engineering or equivalent field of studies. 0-1 years of experience in Analog and Power products characterization Good Analytical skills and understanding of Analog Circuits Excellent problem-solving and communication skills. Ability to work effectively in a collaborative team environment. Detail-oriented with a commitment to quality and precision. Ability to develop Python scripts Contact: garima.chauhan@infineon.com We are on a journey to create the best Infineon for everyone.

Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency power conversion for applications using GaN devices. Job Description In your new role you will: Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency powerconversion for applications using GaN devices. Design and verify pre-silicon analog/mixed-signal integrated circuitblocks, including incorporating features for testing and quality assurance, and providing support for top-level integration. Assist in defining the requirements for analog and mixed-signalblocks, aligning them with IP Module architecture, and ensuring compliance with requirements through documentation. Estimate effort and planning design work packages to meet project milestones. Provide essential support to physical design engineers, post-silicon verification, production testing, and other critical activities extending beyond the design phase. Your Profile You are best equipped for for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone.

We are looking for test engineers with 4+years of experience for test solutions development in ETS / V93K tester platform for power products. Job Description In your new role you will: Test solutions development in ETS / V93K tester platform for power products. Test hardware development for engineering test hardware and production load boards, probe cards. Work with design, product, application and test engineers on developing test solutions for automotive test coverage . Involve in new products Silicon bring up, yield debug, characterization,product qual activities and release design to production. Your Profile You are best equipped for for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone.