156 Mixed Signal Jobs - Page 2

We are seeking a highly skilled and motivated Mixed Signal Verification Engineer to join our team with 8+ years of expeirence. As a Mixed Signal Verification Engineer, you will be responsible for developing and implementing testbenches, checkers, and tests using System Verilog. You will also play a key role in creating and utilizing real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Ownership of Analog/Mixed designs at the chip and/or block level will be an important aspect of this role. Responsibilities: Develop and build Mixed-Signal testbenches, checkers, and tests using System Verilog. Create and utilize real-numbered analog behavioral models in System Verilog/Verilog-AMS for verification simulations. Take ownership of Analog/Mixed designs at the chip and/or block level, ensuring successful verification. Good Understandingof GLS simulations Collaborate with design engineers to understand design tradeoffs and create high-level models for design analysis. Perform behavioral modeling for verification simulations to validate the functionality and performance of mixed-signal designs. Debug and resolve issues arising from verification simulations and work closely with the design team to address any design-related concerns. Stay updated with the latest advancements in mixed-signal verification methodologies and tools, and drive continuous improvement initiatives. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore

We are seeking a skilled PCB Design Engineer with 4 to 7 years of hands-on experience in Cadence Allegro tools. The selected candidate will be responsible for end-to-end PCB design, from schematic translation to manufacturing support. Key Responsibilities: Design complex multilayer PCBs using Cadence Allegro and related tools. Collaborate with electrical engineers to convert schematics into optimized PCB layouts. Define board stack-ups, impedance control, and layout constraints. Perform signal integrity (SI), power integrity (PI), and DFA/DFT/DFM analysis. Generate and review fabrication and assembly documentation (Gerber files, BOMs, pick & place files, assembly drawings). Create and maintain PCB design libraries. Ensure compliance with regulatory standards (e.g., IPC, RoHS, UL). Required Skills and Qualifications: Proficiency in PCB CAD tools, especially Cadence Allegro. Strong understanding of high-speed design principles and layout best practices. Familiarity with EMI/EMC considerations and thermal management. Experience with HDI, mixed-signal, and RF PCB designs. Knowledge of IPC standards (e.g., IPC-2221, IPC-7351). Strong attention to detail and analytical skills. Experience with DFx (Design for Excellence) methodologies.

Analog Design Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 12206 Remote Eligible No Date Posted 16/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an enthusiastic and detail-oriented engineer passionate about analog and mixed-signal circuit design. With a strong foundation in CMOS technologies and a keen interest in deep submicron process challenges, you thrive in collaborative, fast-paced environments. You enjoy diving deep into technical problems, leveraging your academic background in electronics or electrical engineering to design innovative solutions. You are adept at balancing creativity with precision, ensuring your designs meet rigorous standards for quality, performance, and reliability. You communicate effectively, both in writing and verbally, making it easy for you to share ideas and work closely with cross-functional teams. Your curiosity compels you to stay updated on the latest industry advancements, and you re always eager to learn new methodologies or tools. You value diversity and inclusive teamwork, and you actively contribute to a positive and supportive work culture. With 1 3 years of practical experience, you are ready to take on new challenges, grow your skills, and make a tangible impact on industry-leading products. What You ll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and special IOs, ensuring robust performance and compliance with stringent standards. Collaborating closely with the DDR/HBM PHY team, package engineers, and system engineers to meet and exceed design specifications and integration requirements. Developing and optimizing circuit layouts, applying advanced CMOS design methodologies and best practices to enhance yield and manufacturability. Conducting simulations, analysis, and verification of analog and mixed-signal circuits to ensure functionality, performance, and reliability. Supporting the ASIC design flow, from concept through tape-out, and assisting in debugging and resolving design issues as they arise. Documenting design processes, decisions, and results, contributing to knowledge sharing and continuous improvement within the team. Engaging in technical discussions and reviews, providing input on design trade-offs and innovative approaches. The Impact You Will Have: Drive the development of high-performance memory interface solutions, directly influencing the capabilities of next-generation semiconductor products. Enhance the efficiency and quality of circuit designs, contributing to faster time-to-market and reduced development costs. Strengthen Synopsys reputation for reliable and innovative analog/mixed-signal IP by delivering robust and manufacturable designs. Facilitate seamless integration and collaboration across multidisciplinary teams, ensuring holistic product success. Support the adoption of new technologies and design methodologies, keeping Synopsys at the forefront of industry trends. Enable customers to achieve superior system performance and energy efficiency through your expert design contributions. Help expand Synopsys portfolio of market-leading memory interface solutions, supporting growth and customer satisfaction. What You ll Need: Solid knowledge of CMOS processes and deep submicron technology challenges. Experience with CMOS circuit design, layout methodology, and flow; understanding of analog/mixed-signal circuits. Familiarity with ASIC design flow and EDA tools. Basic understanding of ESD concepts; knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality is a plus. Ability to execute assigned circuit design tasks efficiently, ensuring high product quality. Strong written and verbal communication skills for effective collaboration. Who You Are: Collaborative team player who thrives in a diverse and inclusive environment. Detail-oriented with strong analytical and problem-solving skills. Proactive learner with a passion for innovation and continuous improvement. Adaptable, open to feedback, and resilient in the face of challenges. Effective communicator, able to articulate complex ideas clearly to technical and non-technical stakeholders. The Team You ll Be A Part Of: You ll join a dynamic, multidisciplinary group of engineers focused on developing cutting-edge memory interface solutions for the world s leading semiconductor companies. The team values creativity, technical excellence, and open collaboration. By working together, you ll contribute to delivering high-impact analog and mixed-signal IP that powers advanced computing, AI, and connectivity applications. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

MaxLinear is seeking a Director Of Customer Programs Management to join our team. In this role, you will focus on the following: Customer Programs Management Coordinate, execute, track and deliver key customer projects from initiation through completion. drive the execution of the customer program while aligning with the internal product line and Customer support stake holders Lead and drive internal teams to execute to customer plans including specific responsibilities of each team, release schedule, program milestones and deliverables, terms of acceptance, etc Coordinate with Platform programs in the broadband business unit; Platform is the integration of multiple MaxLinear SoC products to address key opportunities (such as PON and DOCSIS gateways and clients) in the broadband business Work closely with customers in understanding project requirements, identify and cultivate a successfully implementing business projects. Be a trusted advisor to the customer Identify and resolve operational and services related issues to ensure customer satisfaction Inform senior management and customers on project status, schedules and key issues on regular basis Provide timely responses to all customer-driven performance inquiries Provide customer input represented in both technical and business terms with descriptive requirements to ensure the value of the project is realized Build and strengthen long-lasting, strategic relationships with customer decision makers and influencers Develop a strong and trusted relationship with customers through timely and accurate communications Contribute to the improvement of the SOC / platform execution and other MaxLinear processes around customer elements; Quality, RFPs, and Voice of the Customer Qualifications Experience in customer facing roles with lead OEMs and Carriers Experience managing multiple customer programs from inception to implementation, building strong relationships with driving quality and meeting deadlines Experience in leading a cross-functional and global team Experience creating and making highly effective presentations to senior management Good understanding of SOC/FPGA development, embedded SW development, and systems integration flow with strengths in one of the areas Strong organizational, project management, and execution skills Analytical and detailed with good judgment and decision-making skills Able to prioritize in a fast-paced environment and work effectively Excellent oral and written communications skills in English; additional language is an advantage Able travel to customer and regional sales sites BS in Electrical Engineering or related + 8 years of experience, or MS + 6 years of experience, or Ph.D. + 3 years of experience Company Overview MaxLinear is a global, NASDAQ-traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, striving to improve the world s communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications. We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world s most challenging communication technology problems in the most efficient and effective manner. MaxLinear began by developing the world s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn t achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel s Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers needs. Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Waltham, Massachusetts; Vancouver, Canada; Valencia, Spain; Bangalore, India; Villach, Austria; Munich, Germany; Israel; and Singapore. We have approximately 1,500 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Experience2 to 4 years The candidate should have good understanding of analog and mixed signal circuits with experience in high-speed links such as DDR PHY and/or Serdes Experience with high-speed digital circuits, memories and lab. testing is desirable Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE is desirable Knowledge of DDR protocols is desirable Ability to work in a dynamic environment and interact well with cross-functional teams such as design, boards, ATE etc. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . Analog Devices (ADI) has just over $9 billion in revenue with offices around the world. As a global leader in the design and manufacturing of analog, mixed signal, power management and DSP integrated circuits, ADI is known for helping to solve its customers toughest engineering challenges. With a commitment to engineering for good, ADI strives to create a more sustainable future, while also focusing on its employees through mentoring programs, employee networks and continuous learning opportunities. At ADI, you will learn from the brightest minds who are here to help you grow and succeed. You will make an impact through work on meaningful projects alongside a team of experts. ADI s culture values aligned goals, work-life balance, continuous and life-long learning opportunities, and shared rewards Job Req Type: Experienced Required Travel: No Shift Type: 1st Shift/Days

Senior Staff Engineer - Analog Layout Hyderabad, Telangana, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 10892 Remote Eligible No Date Posted 14/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You ll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. Create and review layout documents to ensure they meet quality standards and are delivered on time. Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release. You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase. Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation What You ll Need: Bachelors or Masters degree in Electrical Engineering or a related field. Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: A proactive leader with excellent communication and mentoring skills. Detail-oriented and committed to delivering high-quality results. Innovative and capable of driving technological advancements. Collaborative and able to work effectively with cross-functional teams. A problem-solver with strong analytical skills. The Team You ll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts. The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organizations goals. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Analog Mixed Signal Design, Staff Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 11938 Remote Eligible No Date Posted 14/07/2025 We Are: You Are: You are a passionate and detail-oriented engineer with a strong foundation in CMOS analog and mixed-signal circuit design. You thrive in collaborative, high-impact environments and are motivated by the challenge of developing cutting-edge silicon solutions. With a solid background in deep submicron process technologies, you understand the nuances of DDR interfaces and the importance of robust, scalable, and high-performance circuit design. You are adept at balancing innovation with reliability, ensuring that your designs meet stringent quality and efficiency standards. Your experience enables you to approach complex problems methodically, and you are always eager to stay ahead of technology trends, continuously learning and applying new knowledge to your work. You value open communication and are comfortable working across diverse, global teams. You believe that inclusion, diversity, and mutual respect are essential to driving the best outcomes. Whether you re mentoring junior engineers, collaborating with peers, or interacting with cross-functional partners, you demonstrate professionalism, empathy, and a drive for excellence. Above all, you are excited to contribute to solutions that power the smart, connected world of tomorrow. What You ll Be Doing: Designing and developing advanced DDR I/O circuits for next-generation SoCs, focusing on performance, power efficiency, and reliability. Executing end-to-end circuit design tasks, including schematic capture, simulation, layout, and design validation. Collaborating with cross-functional teams to integrate analog and mixed-signal IP blocks into larger system architectures. Ensuring compliance with JEDEC standards for DDR interfaces, including timing, ODT, and SDRAM functionality. Conducting design reviews, analyzing process variations, and implementing robust design-for-manufacturability strategies. Documenting design methodologies, contributing to continuous improvement, and sharing best practices within the team. Providing technical guidance and mentorship to junior engineers and interns. The Impact You Will Have: Enable the rapid integration of high-quality analog IP into complex SoC designs, reducing time-to-market for customers. Drive design innovation that meets the evolving demands of performance, power, and area in advanced semiconductor technologies. Ensure the delivery of robust and reliable DDR I/O solutions that meet or exceed industry standards. Support Synopsys position as a global leader in silicon IP by delivering differentiated, high-performance products. Contribute to customer success by addressing application-specific requirements and providing technical expertise. Promote a culture of knowledge sharing, technical excellence, and continuous improvement within the engineering team. What You ll Need: BTech (with 5+ years of experience) or MTech (with 3+ years of experience) in Electrical/Electronics Engineering or related field. Strong understanding of CMOS process technologies and deep submicron design challenges. Proficiency in analog and mixed-signal circuit design, including layout methodologies and flow. Experience with DDR interface design, JEDEC standards, DDR timing, ODT, and SDRAM functionality (a plus). Familiarity with ASIC design flow and ESD concepts. Demonstrated ability to execute complex design tasks efficiently and with high quality. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator, both written and verbal, comfortable interacting with global teams. Self-motivated, proactive, and adaptable to rapidly changing project requirements. Team player who values diversity, inclusion, and knowledge sharing. Continuous learner, eager to adopt new tools, methodologies, and industry best practices. The Team You ll Be A Part Of: You ll join a dynamic, collaborative team of analog and mixed-signal designers focused on delivering state-of-the-art DDR I/O and silicon IP solutions. Our team thrives on innovation, technical excellence, and a supportive culture that encourages growth, creativity, and cross-functional collaboration. Together, we tackle complex challenges and enable Synopsys to lead in the rapidly evolving world of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title: Sr Engineer - Analog Mixed Signal About GlobalFoundries: Introduction: GlobalFoundries is looking for a highly motivated Engineer in Analog and RF circuit design to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Your Job: Sound foundation in analog and RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: Fresh Masters/MS/MTech from top tier institutes with good academic credentials Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents appreciated Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Title : Principal Engineer - Analog and Mixed-Signal Circuit Design About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Reference Design team, Bangalore, is looking for a talented and motivated candidate to work in the broad area of Analog and Mixed-Signal circuit design The candidate should have strong background in: CMOS Analog design fundamentals. Example circuit blocks include OTA, Charge Pump, Bandgap Reference, Ring Oscillator, LC-VCO, etc. Hands on experience with Cadence Virtuoso Schematic and Layout editors Candidate is also expected to have a good understanding of MOS device operation Your Job : Design the various analog/mixed-signal circuits to meet target specifications. Layout of the designed circuits and understand the impact of parasitics on the circuit specifications Measure the design on hardware and analyze the results Analyze the impact of device characteristics on circuit-level performance Understand the critical circuit specifications which are important for achieving system-level performance Help in automation and other efficiency projects Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications : Requires PhD with Specialization in Electronics (VLSI, Microelectronics and related fields) from a reputed university, with good academic records Must be self-motivated and excellent team player Must have good technical verbal and written communication skills and ability to work with cross functional global teams Be able to collaborate with program and technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desired Patents and publications will be a good advantage. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Strong ability to learn and explore new technologies, opportunities, and continuous improvement. Ability to interact effectively with both external and internal customers at all levels and from various cultural backgrounds. #NCGProgramIND

Title: Sr Engineer - Analog Mixed Signal About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: GlobalFoundries is looking for a highly motivated Engineer in Analog and RF circuit design to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Your Job: Sound foundation in analog and RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: Fresh Masters/MS/MTech from top tier institutes with good academic credentials Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in AMS blocks current mirror, BGR, LDO, OTA, TIAs, mismatch insensitive circuit Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents appreciated Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. #NCGProgramIND GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. To ensure that we maintain a safe and healthy workplace for our GlobalFoundries employees, please note that offered candidates who have applied for jobs in India will have to be fully vaccinated prior to their targeted start date. For new hires, the appointment is contingent upon the provision of a copy of their COVID-19 vaccination document, subject to any written request for medical or religious accommodation.

Responsibilities: Develops, modifies, verifies, troubleshoots, and evaluates analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems. Assists in building evaluation boards for analog and mixed signal electronic products and performing ESD, Surge tests. Conducts circuit simulation and analysis to validate designs. Performs signal integrity analysis and parasitic extraction and analysis to identify and minimize issues that could impact circuit performance Help in product characterizations and product verifications with final reports. Selects components and equipment based on analysis of specifications and reliability. Documents design features, test plans, specifications, block diagrams, and schematics. Minimum Qualifications: 7+ years of relevant industry experience in Analog and mixed signal electronic products Degree in Electrical Engineering Fluent spoken and written English Solid understanding and enthusiasm for analog circuit design Desired Qualifications Experience with ORCAD, Cadence, Altium electronic circuit layout software. Has experience working with Laptop computers/Power Management Products/ESD Protection products. Familiar with power electronic circuits and basic circuit operations. Know how to use lab equipment such as Oscilloscope, Source Meter, Electronic load, ESD gun, Surge tester and TLP machine.

Title System Software Engineer 2 CTC 15 to 25 lacs Experience 3 to 8 years Location Bangalore Job Requirements: Proven experience in board design through full development life cycle and configuration management for managing associated documentation (BOMs, schematics, drawings, etc.) Hands-on experience on test measurement equipment like oscilloscopes, multi-meters, power supplies Familiar with the Power, Mixed-Signal systems, Digital interfaces, and related HW design methodologies. Strong board design skills with experience in Mixed-Signal systems, High-speed serial interfaces(PCIe,SERDES,10G Ethernet), microprocessor subsystems, FPGA-based design and power distribution design concepts. Solid hands-on experience in Schematic capture tools like Altium and OrCAD Capture. Familiarity with PCB CAD Layout tools like Allegro Knowledge to understand SI-PI simulations is required Strong knowledge in board debugging Able to communicate clearly, organize effectively, and document work thoroughly while working with local and on-site teams. Familiar with the typical data and control interfaces. Examples include UART, USB, SPI, I2C, Ethernet, SDIO, PCIe, etc.

Title/Position: Analog LayoutEngineer Experience: 4-8 years Location: Bangalore / Hubli About us: Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, spec to the product. With 3500+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. Tessolve offers a highly competitive compensation and benefits along with an electric work environment to scale one s intellect, skills and growth. Qualification : BE/BSC/Diploma Technical Skillset required: 4-8 years experience in Mixed Signal and Analog Layout. Conversant with Cadence Tools and Mentor Tools(Calibre) Experience with higher nodes like 180/150/130nm and below preferable. Experience on Dongbu PDK. Experience with layout of Analog blocks (reference, amplifier, data converters) is critical Experience with BCD process. Tessolve offers a highlycompetitive compensation and benefits along with an electric work environmentto scale one s intellect, skills, creates and environment for people who thrivefor success and grow with the organizations growth. Tessolve has somethingunique to offer to everyone depending on their interest levels. Disclaimer: At Tessolve, we are committedto fostering a workplace that embraces and celebrates diversity in all itsforms. We believe that diverse teams drive innovation, creativity, and success.We are dedicated to creating an inclusive environment where all employees,regardless of their race, color, religion, gender, gender identity orexpression, sexual orientation, national origin, genetics, disability, age, orveteran status, feel valued and respected. We believe in fair and equitabletreatment for all employees and aim to eliminate any biases or barriers thatmay hinder personal or professional growth.

Skills requried: • In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 16nm and lower technology nodes. - Should have experience in Analog and Mixed Signal Design • Should have experience in handling >5M instance count , 1.5GHz frequency designs . • Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency. • Must have hands-on experience on PnR Suite from Cadence & Synopsys (Innovus & ICC2) • Strong experience on Static Timing Analysis (PrimeTime - SI) , EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre). • Understanding the practical application of methodologies and Physical Design Tools, Flow Automation, and Improvements. • Experience in complex SOC integration, Low Power and High-Speed Design and Advanced Physical Verification Techniques.

Job Requirements Bachelor or master Degree with 3-10 years of Analog Layout experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experience in one or more of the following areas is preferable: Mixed signal/analog/high speed layout, e. g. PLL, IO, RF, PMIC, OSC, DC-DC convertor, Temperature sensor, SRAM, TCAM, ROM, MRAM, ESD Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc). Experiences in advanced technology node under 16nm/14nm/7nm. 5nm/3nm will be an added advantage. Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc. ). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc. ). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in SKILL automation and circuit Design background is a plus. Good communication skills and willingness to work with global team. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment Work Experience Must have expertise on Totem EMIR & Self-heating effects, Star RC extraction, and Calibre PV checks (DRC, LVS, Antenna, ERC, PERC etc. ). Good Understanding of layout fundamentals (Matching, EM, ESD, Latch up, coupling, crosstalk etc. ). Experience in top-level floorplan, hierarchical layout methodologies Programming skills in SKILL automation and circuit Design background is a plus.

This is a full-time on-site role for an AMS Verification Engineer at UANDWE, Inc. in Bengaluru. As an AMS Verification Engineer, you will have complete ownership of AMS verification for complex mixed signal blocks such as PLL, DFE, transmitters, receivers, etc. It is essential for you to understand the JDEC spec for DDR interface and define verification methodology. Your responsibilities will include test planning, creating testbenches, and verification using Cadence tool mixed signal design flow. Knowledge of RNM (real number model) modelling would be a plus. You will collaborate closely with Logic and Analog design teams to comprehend the requirements and provide feedback on the results. Additionally, you will be responsible for creating schedules, tracking progress, and identifying and addressing issues and risks to project management. To qualify for this role, you should hold a Masters or Bachelor's degree in Electronics Engineering, VLSI, or Microelectronics from a reputed university. You should have a minimum of 7 years of industry experience in AMS verification. Strong written and verbal communication skills are required, as well as the ability to work effectively as a team player with cross-functional teams.,

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Job Overview: As an Analog Mixed-Signal IC Layout Lead Engineer, you will play a critical role in designing advanced node Bi-CMOS / CMOS products. You will be responsible for managing chip top-level layout and integration along with block level layout design and ensuring successful tapeout. You will work to build state-of-the art high speed circuits minimizing layout parasitics, while applying techniques to reduce skew and crosstalk. Meeting EM/IR compliance requirements is essential. You will ensure strict adherence to DRC, LVS, ANT, and density rules. Additionally, awareness of ESD and latch-up design practices is expected to ensure robust and reliable layout implementations. You will apply a solid foundation in device physics, along with demonstrating a strong three-dimensional understanding of device layout. You will collaborate with a dynamic, cross-functional team of analog designers and layout engineers across multiple time zones. We are looking for a highly motivated, team-oriented individual who thrives in a collaborative environment. Basic Qualifications: Bachelor s degree or advanced diploma in Electrical Engineering (EE) Required Experience: 5+ years of experience in high-speed analog IC layout using Cadence Virtuoso Prior experience with BiCMOS layout is strongly preferred Proven experience handling at least one chip top-level through tapeout Proficiency in layout extraction and parasitic analysis for high-speed circuits Awareness of EMIR and antenna DRC rule-compliant layout practices Experience with Cadence SKILL and TCL scripting is highly recommended We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

R&D Manager - Hardware Job Profile: Lead and manage the hardware design and development team within the R&D department. Define hardware architecture and develop electronic circuit designs, including analog, digital, mixed-signal, and embedded systems. Oversee prototype development, testing, and validation of hardware components. Collaborate closely with software, firmware, mechanical, and systems teams to ensure seamless integration. Drive innovation by researching emerging technologies and incorporating best practices in hardware design. Establish and enforce hardware development processes, standards, and documentation. Manage hardware-related project timelines, resources, and budgets. Troubleshoot hardware issues and guide the team in resolving design challenges. Liaise with suppliers, manufacturing, and quality teams to facilitate smooth transition from R&D to production. Mentor and develop team members to build a high-performing hardware engineering group. Ensure compliance with relevant industry standards and regulatory requirements. Prepare technical reports, presentations, and documentation for internal and external stakeholders.

Develop Detailed Documentation for Verification Strategy and Test Plan for IP, Subsystem and SoC. Directed and Random Verification at IP, Subsystem and SoC Level for complex ARM / RISC-V processor based MCU, MPU products, Mixed Signal SoCs, Processors, Memory Subsystems, Connectivity Platforms, Analog, Security Acceleration, General Peripherals. Perform Functional and Code Coverage Analysis. Experience and Skills Required 5 to 15 years of experience in IP SoC Verification. Expertise in Verilog, System Verilog, UVM, Constrained Random Verification, Formal Verification, Mixed Signal Verification, Post-Layout Gate Level Simulations, Code Coverage and Functional Coverage analysis. Development of Verification IP and Testbenches. Experience with AMS simulations desired. Must have strong debug and analytical capabilities, root cause analysis. In-depth understanding of SoC Design Flow, RTL Implementation, Analog Circuit models. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

Job Description: We are looking for a highly motivated Mixed-Signal Design Verification Engineer with 3+ years of experience in analog/mixed-signal verification. The ideal candidate should possess strong fundamentals in analog and digital design processes, along with hands-on experience in mixed-signal modeling and testbench setup. Responsibilities: Develop and maintain mixed-signal testbenches from scratch Write and manage Analog Mixed Signal models using VerilogAMS and real number modeling Debug mixed-signal simulations and analyze waveform results Utilize Synopsys tools (CustomSim/Primesim XA, Waveview) and Cadence Spectre environment Automate workflows using Unix shell scripting and Python Desired Skills: Strong knowledge of analog building blocks and top-level integration Expertise in mixed-signal simulation performance optimization Proficient in Unix/Linux environments Strong scripting and automation capabilities Excellent communication and problem-solving skills

Company Overview Connectpro operates in the human-resources industry, specializing in recruitment and talent acquisition. Role And Responsibilities As a senior analog design engineer at Connectpro, you will be responsible for taking a subsystem of analog design through all phases of the design process. This includes: Creating the architecture of the analog subsystem Providing technical leadership to the team during execution Designing, simulating, and supervising the layout and verification processes Evaluating and debugging silicon samples You will be working with the latest Cadence analogue design tools including Virtuoso Composer, Verilog, HSPICE, and other PC-based tools like Matlab. The circuits you will be working on involve mixed signal blocks such as switched capacitor amplifiers, PLL, RAM, high-speed interfaces, references, IO circuits, data converters, and digital building blocks. Your role will also involve ensuring timely execution and collaborating with cross-functional teams like PE/TE. Experience with custom layout and analog verification is a plus. Candidate Qualifications To be successful in this role, you should possess the following qualifications: Bachelor's degree with 5-8 years of experience in CMOS, analog/power/mixed-mode IC design using tools similar to the ones mentioned above Strong fundamentals in CMOS analog design Excellent communication skills Ability to interact effectively with cross-functional teams Understanding of the semiconductor development flow Skills: hspice,semiconductor development flow,adc,,pll,icdesign,data converters,analog,layout/verification,dac,mixed signal,team management,cadence analogue design tools,custom layout,analog/power/mixed-mode ic design,simulation,evaluation/debug,amplifiers and filters,matlab,interact with cross functional teams,switched capacitor amplifiers,pmic,cmos process,cmos,,ram,ams,virtuoso composer,architecting,design,dll,,digital building blocks,references,analog verification,cmos,io circuits,hispeed interfaces,communication skills,verilog,analog design,

Minimum qualifications: Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience. 5 years of experience in DFT specification definition architecture and insertion. 3 years of experience using electronic design automation (EDA) test tools (e.g., Spyglass, Tessent). Experience with ASIC DFT synthesis, STA, simulation, and verification flow. Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, and debug of silicon issues, etc.). Preferred qualifications: Master's degree in Electrical Engineering, or a related field. Experience in IP integration (e.g., memories, test controllers, TAP, and MBIST). Experience in SoC cycles, including silicon bring-up and silicon debug activities. Experience in fault modeling. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will be responsible for defining, implementing, and deploying advanced Design for Testing (DFT) methodologies for digital, mixed-signal chips, or IPs. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design, insert, and verify the DFT logic. You will prepare for post-silicon and co-work/debug with test engineers. You will be responsible for reducing test cost, increasing production quality, and enhancing yield. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities Develop DFT strategy and architecture, including hierarchical DFT/Memory Built-In Self Test (MBIST), IJTAG/TAP, and Hi-Speed IO. Demonstrate ownership from DFT logic, pre-silicon verification, to co-work with test engineers post silicon. Insert DFT logic, including boundary scan, scan chains, DFT Compression, Logic Built-In Self Test (BIST), Test Access Point (TAP) controller, Clock Control block, and other DFT IP blocks. Insert and hook up MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces. Document DFT architecture and test sequences, including boot-up sequence associated with test pins. Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high test quality and support post-silicon test team.