242 Mixed Signal Jobs - Page 3

Description Enphase Energy is a global energy technology company and a leading provider of solar, battery, and electric vehicle charging products. Founded in 2006, our innovative microinverter technology revolutionized solar power, making it a safer, more reliable, and scalable energy source. Today, the Enphase Energy System enables users to make, use, save, and sell their own power. Enphase is also one of the most successful and innovative clean energy companies in the world, with more than 80 million products shipped across 160 countries. Join our dynamic teams designing and developing next-gen energy technologies and help drive a sustainable future! Enphase is looking for experienced SoC Verification engineer to join our team in Bangalore India. The team is working on next generation Control ASIC in 22nm technology. This ASIC uses the ARM CM4 core, so experience with that core is a must. This SOC includes safety and security features into this next generation of MCU so a deep understanding of these SoC challenges is required. Similar to many other SOCs, our Control ASIC includes the CPU as mentioned above, a large Analog Front End (AFE) consisting of references, clocks, multiple ADCs, DAC functions, and analog muxes for the needed measurements in the Inverter, a Power Line Communications Modem (PLC), our proprietary Power Production control block and a host of other peripherals. This position is in our ASIC Engineering Team Reporting to the Senior Director of ASIC Engineering in Bangalore India. Responsibilities Working with our Internal/ Contract verification resources, IP designers and the Full Chip RTL engineers you will verify the new SOC design. You will also have responsibility set the verification methodology and verify the RT L developed by Enphase engineers and 3 rd party IP. Requirements Deep understanding and experience in SoC architecture and verification Specific experience verifying the ARM CM4 and all the surrounding IP, like: AHB, AXI, RAM and ROM controllers, DMA controllers. As our new MCUs will include security features for the first time, experience with the ARM Protection units is preferred. As these Control ASICs from Enphase contain a large AFE, experience with verifying high speed and high accuracy analog systems with a mixed signal methodology is an added advantage. Hands on experience with RISC-V verification will be an added advantage. Hands-on experience with UVM using SystemVerilog, Coverage driven verification methods, formal verification methods for IP/SoC functional verification is highly preferred. Knowledge of all the RTL verification methods, Gate level verifications, and mixed signal methodologies. Experience and ability to bring complex SOCs into production This position is based in Bangalore Credentials Proven track record based on at least 15+ years of experience

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills. Mandatory Key Skills VHDL,RTL coding,Mentor DfT tools,Cadence tools,scan insertion,JTAG,ATPG,DRC,coverage analysis,simulation debug,timing,SDF,LBIST,Mixed Signal Radar IC,proactive,collaborative,detail-oriented,independent judgment,debug,root cause analysis,Verilog*

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools. The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF. Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable Must be proactive, collaborative and detail-oriented capable of exercising independent judgment The engineer with experience on debug and root cause the problem in simulation failures Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills. Mandatory Key Skills JTAG,ATPG DRC,LBIST,RTL coding,VHDL,DFT

We are looking for a highly skilled and experienced Lead Engineer to join our team and contribute to the verification of mixes Signal. The ideal candidate should have a deep understanding of the Cadence, AMS along with expertise in system-level development and debugging What You Will Do Proficient in Verilog-AMS, System Verilog, and UVM methodologies Experience with Cadence Spectre or similar AMS simulation tools Strong understanding of analog circuit design principles (op-amps, transistors, etc.) What You Need to Be Successful Proficient in Verilog-AMS, System Verilog, and UVM methodologies Bonus Points if You Have Experience with Cadence Spectre or similar AMS simulation tools Strong understanding of analog circuit design principles (op-amps, transistors, etc.) What Makes You Eligible An accomplished leader with a minimum of 8+ years of experience in software design & development and a Bachelor's Masters degree Excellent communication skills (written/verbal) & Team spirit Risk taker with passion for innovation Autonomous working to explore new technologies *Mandatory Key Skills analog circuit design,software design,software development,Cadence Spectre,mixed signal verification*,Cadence*,AMS*,Verilog*,System Verilog*

General Summary Qualcomm is a company of inventors revolutionizing the CPU market in an age of innovation. As an SRAM Mask Layout Designer , you will be part of a high-performance CPU team, collaborating with top engineering talent to deliver designs that push the limits of performance, energy efficiency, and scalability. This role offers a dynamic and creative environment, with opportunities to impact next-generation products used around the world. In this role, you will develop block or macro-level layouts and floorplans for high-performance custom memories, ensuring alignment with design schematics and project requirements. You will apply industry best practices, work with cutting-edge technologies, and contribute to building world-class silicon products. Minimum Qualifications Education & Experience: High school diploma or equivalent and 5+ years of relevant experience OR Bachelor's degree in Electrical Engineering or related field and 5+ years of relevant experience OR Master's degree in Electrical Engineering or related field and 3+ years of relevant experience Technical Expertise: Hands-on experience with custom SRAM layout Familiarity with industry-standard custom design tools and flows Experience with deep sub-micron technologies (e.g., FinFET/nanosheet processes at 5nm or below) Proficiency in layout design of library cells, datapaths, and memories Knowledge of Cadence Virtuoso and Calibre LVS/DRC tools Understanding of layout floorplanning and hierarchical assembly Preferred Qualifications Understanding of device parasitics and reliability considerations in layout Familiarity with critical circuit layout styles Ability to write SKILL code for layout automation Knowledge of EMIR improvements in layout Strong communication skills to collaborate effectively across teams Roles and Responsibilities Design layout for custom memories and digital circuits based on schematics Interpret and apply design rule manuals for optimal layout compliance Manage the complete layout process, from floorplanning to physical verification Use verification tools to run LVS, DRC, ERC , and analyze results Execute layout fixes based on feedback from verification tools and circuit designers Work independently and deliver layout tasks with minimal supervision Provide realistic schedules and ensure timely completion of layout projects Contribute to strategic decisions and optimization related to memory layout

Performs functional logic verification of an FPGA to ensure design will meet specification requirements Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs Replicates, root causes, and debugs issues in the pre-silicon environment Finds and implements corrective measures to resolve failing tests Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features May also collaborate with systems and software engineers to support integration testing of the FPGA Documents test plans and drives technical reviews of plans and proofs with design and architecture teams Maintains and improves existing functional verification infrastructure and methodology Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e g , gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Run IO PHY tests with AMS (Digital/Analog Mixed Signal Simulation). Collaborates and communicates with Architects, micro architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Qualifications Candidate should have a BS, MS or PhD in Electrical or Computer Science Engineering or related field with 8+ years of technical experience. Related technical experience should be in/with: Pre Silicon Validation/Verification. JESD 79-5 DDR5, JESD209-5 LPDDR5, JESD 209-4 LPDDR4, DDR PHY Interface (DFI 5.1) Tessent SSN scan OVM/UVM, System Verilog, constrained random verification methodologies

About The Role About The Role : 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence VLE/VXL, PVS, Assura and Calibre DRC/ LVS is necessary. Understanding layout effects on the circuit such as speed, capacitance, power, and area etc. Ability to understand design constraints and implement high-quality layouts. Multiple Tape out support experience and collaborating with cross functional teams will be an added advantage. Good people skills and critical thinking abilities to resolve the issue technically and professionally. Excellent communication. Responsible for timely execution with high quality of layout design. Multiple foundries experience is an added plus. Minimum Educational Qualification : Educational Bachelor"s, Electrical or Electronics Engineering or equivalent Role And Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, EM, quality check and documentation. Responsible for on-time delivery of block-level/top-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work Should have good experience in working with cross-functional team. Ensure standard processes and procedures are followed to resolve all client queries. Handle technical escalations through effective diagnosis and troubleshooting of client queries Manage and resolve technical roadblocks/ escalations to timely deliverable with high quality. Troubleshoot all client queries in a user-friendly, courteous, and professional manner. Offer alternative solutions to clients (where appropriate) with the objective of retaining customers" and clients" business. Build people capability to ensure operational excellence and maintain superior customer service levels of the existing account/client. Contribute to effective project-management. Effectively communicating with engineering teams in different Geographical locations to assure the success of the layout project. Works in the area of Software Engineering, which encompasses the development, maintenance and optimization of software solutions/applications.1. Applies scientific methods to analyse and solve software engineering problems.2. He/she is responsible for the development and application of software engineering practice and knowledge, in research, design, development and maintenance.3. His/her work requires the exercise of original thought and judgement and the ability to supervise the technical and administrative work of other software engineers.4. The software engineer builds skills and expertise of his/her software engineering discipline to reach standard software engineer skills expectations for the applicable role, as defined in Professional Communities.5. The software engineer collaborates and acts as team player with other software engineers and stakeholders.

Work Profile : - Work on development of custom Analog circuit boards for applications related to RF, interfaces etc. - Implement new features and bug fixes - Verify analog/mixed-signal integrated circuits - Develop test cases to verify new features and bug fixes - Review and update the user manuals for software tools. - Supporting digital modelling of analog circuits for mixed-signal verification - Creating design specifications and circuit schematics - Work both independently and in a team environment, with the opportunity to provide technical leadership to other members of the engineering team - Create and/or modify specification documents detailing system design and enhancements to meet marketing requirements - Collaborate with others in the creation of technical reports, whitepapers, and user documentation Requisites : - EE/EEE/ECE graduate, undergraduate degree from reputed Tier 1 or Tier 2 colleges . - Strong knowledge of analog integrated circuit design fundamentals - Proven experience taking designs from concept to production - Experience in analog/mixed-signal IC design & verification - Understanding of BJT, CMOS and Op-Amp technologies. - Good understanding of analog/mixed-signal design flows (Cadence, Synopsys) - Transistor and system level simulation skills - Discrete time and continuous time signal processing skills - Strong lab and silicon validation skills - Verilog based digital design and test bench development, is a plus - Strong communication skills, both written and verbal.

Support electrical design activities for Line Replaceable Units (LRUs) including functional partition analysis, schematic capture, and PCB layout support. Perform electrical design verification including logic compatibility, AC/DC loading, margin analysis, timing verification, component-level thermal analysis, and power analysis. Participate in prototype builds, board bring-up, and validation of designs against specifications. Provide troubleshooting support for ESD/EMI/ENV issues, propose and implement countermeasures. Collaborate with cross-functional engineering teams in Irvine, Osaka, and offshore locations. Prepare and maintain electrical design documentation, including test plans and technical reports. Act as a bridge between offshore teams and on-site engineering staff. Support urgent issue resolution in high-pressure environments. Coordinate with cross-functional teams to ensure design, validation, and verification tasks are completed.

Design of RF Analog & Mixed Signal, IC and board. Person should good knowledge of RF/Analog IC design or PCB design. Good knowledge of electronic circuit design concepts and VLSI design tools like Agilent- ADS and Cadence tools will be preferred.

We are on the lookout for talented and passionate Analog and Mixed-Signal circuit design professionals. If you thrive in a dynamic environment and are eager to contribute your expertise to innovative projects, we want to hear from you! Join us in shaping the future of technology. In your new role, you will: Design analog and mixed-signal modules in CMOS and Power Technologies, with a particular focus on DC-DC converters for power management ICs Design analog and mixed-signal system resource blocks, including POR, Bandgap, LDO, Oscillator Assist in defining the requirements for analog and mixed-signal blocks, aligning them with IP Module architecture, and ensuring compliance with requirements through documentation. Provide essential support to physical design engineers, post-silicon validation, production testing, and other critical activities extending beyond the design phase. Ability to lead the project, mentor the team, and execute the project working with a cross-functional team You are best equipped for this task if you have: A Master s Degree in Electrical/Electronic Engineering, Physics, or an equivalent field of study Experience in analog and mixed-signal circuit design, particularly in CMOS and Power Technologies Good Analytical skills and a good understanding of Analog Design Familiarity with high-efficiency power conversion, such as DC-DC converters, is highly desirable Experience in post-silicon debug Proficiency in computer-aided design tools and methodologies #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in

Perform full-custom analog layout design for blocks such as PLLs, ADCs, DACs, SerDes, High-Speed IOs, Power Management Circuits, and Standard Cells. Work on deep sub-micron process nodes (TSMC 3nm to 16nm) ensuring compliance with foundry rules. Execute layout of matched devices, current mirrors, differential pairs, and high-precision analog/mixed-signal circuits. Perform floorplanning, placement, routing, parasitic extraction, and LVS/DRC verification . Collaborate with circuit designers to ensure performance, reliability, and yield requirements are met. Work on layout optimization for area, performance, and manufacturability (DFM) . Support design reviews and contribute to timely tape-outs . Interface with foundries and EDA vendors when required. Requirements 6-8 years of hands-on experience in Analog Layout Design . Experience in TSMC nodes (3nm / 5nm / 7nm / 12nm / 16nm) . Strong expertise in layout techniques for high-speed, low-power, and high-precision analog circuits. Proficiency in Cadence Virtuoso, Calibre (LVS/DRC), Assura, Mentor tools . Good understanding of matching, shielding, symmetry, guard rings, and latch-up prevention techniques . Knowledge of parasitic effects, EM/IR drop, and reliability constraints . Strong debugging and problem-solving skills. Excellent communication and teamwork skills. Good to Have Experience with RF and Mixed-Signal layout . Prior experience working in analog IP development or product companies . Exposure to FinFET layout challenges (TSMC 7nm and below) . Familiarity with global tape-out cycles .

Skills/Experience: Independent layout development of High Speed blocks like SerDes, Rx, Tx, , PLL, ADC, LDO, Bandgap etc Strong debug skills and good communication Education Qualification: BE/B-Tech/ME/M-Tech degree in Electronics and Communication, Electrical Engineering, or related field.

Must to have skills: Hands on Hardware Design / PCB / EMI EMC / Mixed Signal/Design and implementation of Digital, Analog hardware/HW Architect/High speed/Signal integrity/ debugging/RF designs/board bring up/design reviews Required Candidate profile Team Handling experience Project Deliveries Multinational client handling Multiprojects environment

As a PCB Design Engineer with at least 5 years of experience in PCB design, you will play a crucial role in our company's design team. Your primary responsibility will be to create and implement PCB layouts for a variety of electronic devices, including automotive, IOT, wearables, and more. It will be your duty to ensure that all designs meet the specified design, performance, cost, and manufacturability requirements. Joining our Printed Circuit Board (PCB) and Flexible Printed Circuit Board (FPC) design team, you will be involved in the layout design of various components such as FPGA, high-speed digital, ADC, DACs, Amplifiers, fast switching current sources, DRAM, Flash, PMICs, high voltages, motor control, and high-speed serial interfaces, among others. To excel in this role, you must have a minimum of 5 years of experience in PCB design, with a proven history of designing PCB layouts. Proficiency in using Cadence Allegro PCB Design tool is essential, while experience with Altium tool will be considered an advantage. Additionally, you should possess skills in Analog, digital, and mixed signal board designs, along with familiarity with Backdrill and HDI technology. An understanding of Automotive standards for reliability and safety compliance is preferred, as well as knowledge of PCB design principles, including high-speed and high-density designs, power delivery, and signal integrity. You should also be well-versed in PCB manufacturing processes, industry standards, fabrication, assembly, and testing, while having a grasp of schematic design rules, DFM, and DFT practices. Effective communication skills are crucial for this role, as you will be required to collaborate efficiently with cross-functional teams to ensure the successful implementation of PCB layouts for electronic devices.,

Minimum of ten years of hands-on Test Development experience (DFT, EDA tools, etc..) Solid knowledge & experience in defining test solutions for multi-million gate SOC (Scan & MBIST) with Mixed Signal IPs (PLL, High Speed SERDES, DDR) Knowledgeable in full SOC design and manufacturing cycle with specialized/direct experience in multiple areas; RTL/Custom Logic design, Synthesis, P&R, STA, Integration, Verification, Characterization and ATE test Strong understanding of relationships between Hardware, Firmware and Software in FPGA and/or multi-processors SOC. Past experience in leading the team to successful silicon bring-up and problem solving in a complex system Strong planning, project, and people management skills required. Must have experience developing managers and individual contributors Experienced hands-on technical manager not afraid to dig into details to provide technical direction Proven track record of delivering results and meeting quality, cost, and time-to-market objectives Ability to collaborate with overseas colleagues to define strategy, plan, and execute across the larger, global organization Stakeholder influencing and people skills must be excellent. Needs to be able to set aggressive goals and manage risks effectively Must have a thorough understanding of tool development methodology. Ability to manage software development tasks associated with specifying, developing, scheduling, and debugging according to current and future tool requirements. Role: Product Design Engineer Industry Type: Electronic Components / Semiconductors Department: Engineering - Hardware & Networks Employment Type: Full Time, Permanent Role Category: Hardware Education UG: Any Graduate PG: Any Postgraduate

You should hold a B.E/B.Tech/M.Sc/M.Tech degree in Electronics with a strong academic background. Ideally, you should possess at least 5 years of extensive experience in developing intricate embedded systems/FPGA based projects. Your role will involve overseeing complex embedded systems projects from initiation to completion, providing guidance to junior team members, and collaborating closely with them. Proficiency in hardware design encompassing analog, digital, and mixed signal components coupled with adept troubleshooting abilities is essential. Additionally, you must demonstrate exceptional skills in C programming and familiarity with common languages like python. Troubleshooting software issues and offering support to team members encountering obstacles in their development process are crucial aspects of the role. Customer interaction, handling multiple projects simultaneously, and completion of numerous embedded systems/FPGA based projects are expected. Proficiency in utilizing various test and measuring equipment such as oscilloscope, signal generator, and logic analyzer is required. Establishing and adhering to high-quality systems and operational procedures, adapting to new technologies as per organizational needs, and working autonomously with minimal guidance are key attributes for success in this role.,

4-8 years experience in Mixed Signal and Analog Layout. Conversant with Cadence Tools and Mentor Tools(Calibre) Experience with higher nodes like 180/150/130nm and below preferable. Experience on Dongbu PDK. Experience with layout of Analog blocks (reference, amplifier, data converters) is critical Experience with BCD process.

As a Sr. Principal Digital Design Engineer at OnSemi in Bengaluru, India, you will be an integral part of the Power Management product development team, focusing on designing innovative solutions for consumer, industrial, and automotive applications. Your responsibilities will include collaborating with various product lines for RTL implementation of power converter controller designs, digital design architecture, low power design, synthesis, timing analysis, and physical design interface using state-of-the-art RTL2GDS flows. You will work closely with a dynamic team of engineers, design architects, digital verification, project management, and analog design teams across different geographies. Your role will involve implementing micro-architecture to RTL, supporting pre-silicon platforms, owning the technical outcome of Power Management ICs, and leading customer support, production issues, system development, and failure analysis. To excel in this role, you should possess a Bachelor's degree in Electrical Engineering with 12 years of experience or a Master's degree with 10 years of experience in Digital Design, Architecture, and ASIC/Mixed signal chip developments. A deep understanding of the digital design flow, RTL design, CDC, synthesis, timing analysis, system Verilog, Verilog, TCL, Perl/Python/XML programming languages, and various protocols is essential. Onsemi (Nasdaq: ON) is dedicated to driving disruptive innovations in automotive and industrial markets, aiming to accelerate change in megatrends such as vehicle electrification, sustainable energy grids, industrial automation, and 5G infrastructure. With a focus on intelligent power and sensing technologies, Onsemi is committed to creating a safer, cleaner, and smarter world. To learn more about our company benefits, visit: https://www.onsemi.com/careers/career-benefits Join us at Onsemi to be part of a high-performance team that fosters innovation and offers a positive recruitment experience, cultivating a strong brand as an exceptional workplace.,

You will be responsible for developing block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Your role will involve applying your understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. You will conduct analyses, tests, and verify designs using various tools and techniques to identify and troubleshoot issues, while keeping updated on new verification methods. Collaborating with multiple internal and external stakeholders will be essential to align on projects, provide updates, and resolve any issues that may arise. Minimum Qualifications: - Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field with 2+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR Associate's degree in Computer Science, Mathematics, Electrical Engineering, or related field with 4+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - OR High School diploma or equivalent with 6+ years of experience in designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience. - 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, RMAP). You should have solid experience of 3 to 6 years in developing high-speed IO/ESD/Analog layout design, along with expertise in working on FinFet layouts in lower nodes, with a preference for TSMCN 7nm and below. Proficiency in utilizing the best and latest features of Cadence VXL and Calibre DRC/LVS is required. A basic understanding of IO/ESD designs and knowledge of Basic SKILL/PERL will be beneficial. You should be capable of working independently and as part of a team, including coordinating work with contract workforces. Effective communication and collaboration skills with global engineering teams are essential for this role. Qualcomm is an equal opportunity employer and is committed to providing accessible processes for individuals with disabilities throughout the application and hiring process. Should you require an accommodation, please contact disability-accommodations@qualcomm.com or Qualcomm's toll-free number. Qualcomm expects all employees to adhere to applicable policies and procedures, including those related to security and protecting the company's confidential information. Please note that our Careers Site is intended for individuals seeking jobs at Qualcomm. Staffing and recruiting agencies are not authorized to use this site to submit profiles, applications, or resumes. Unsolicited submissions from agencies will not be accepted. For further information about this role, please reach out to Qualcomm Careers directly.,

•BE/B.Tech in ECE /M.Tech in VLSI with 6 to 9 years experience in Analog Mixed Signal Verification •Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks •Very Good experience in Analog Mixed Signal verification simulation tools •Good experience in System Verilog, UVM methodologies •Able to train the team members and guide them to the solutions for problems •Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch. •Good experience in Gate level netlist simulation •Experience in Python, Perl, Shell scripting is added advantage. •Good communication and documentation skills

We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques You are adept at communicating effectively with cross-functional teams to ensure successful project execution You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future, What Youll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment, Collaborate with cross-functional teams to ensure successful project execution, Create and review layout documents to ensure they meet quality standards and are delivered on time, Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release, You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase, Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts, Your expertise will ensure the successful implementation of CMOS and FINFET technologies, Through effective troubleshooting, you will contribute to achieving clean physical verification results, Your attention to detail will ensure that layout documents meet quality standards and deadlines, By managing project schedules and milestones, you will help deliver projects on time, Your collaboration with cross-functional teams will enhance project success and innovation What Youll Need: Bachelor's or Master's degree in Electrical Engineering or a related field, Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout, Proficiency in Analog Layout Flow from device placement to GDS release, Strong knowledge of CMOS and FINFET technologies and semiconductor device physics, Experience with EDA tools for custom mixed-signal layout flows, Understanding of CMOS fabrication technology and deep sub-micron effects on layout, Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout, Passion for learning and exploring new techniques, Who You Are: A proactive leader with excellent communication and mentoring skills, Detail-oriented and committed to delivering high-quality results, Innovative and capable of driving technological advancements, Collaborative and able to work effectively with cross-functional teams, A problem-solver with strong analytical skills, The Team Youll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organization's goals, Show

You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognized for your ability to balance technical depth with practical implementation. Your expertise in I/O development, ESD (Electrostatic Discharge), and Latch-Up (LU) robustness sets you apart, and you are eager to build solutions that power the next generation of high-performance chips. You bring a strong foundation in FinFet, FDSOI, and BCD technologies, and you are excited by the prospect of owning projects end-to-end from conceptual design through to silicon qualification. Your approach is meticulous and data-driven, ensuring each design meets the highest standards of quality and reliability. You are comfortable working across cross-functional teams, collaborating with foundries, and integrating feedback from global stakeholders. Continuous learning excites you, and you embrace opportunities to mentor others, share knowledge, and contribute to a culture of technical excellence. You are motivated by the impact your designs have on real-world products and are committed to delivering robust, scalable, and innovative solutions for Synopsys worldwide customers. What You ll Be Doing: Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes. Owning the full lifecycle of ESD structures from schematic design, simulation, and layout to silicon qualification and production release. Leading and executing I/O development, including I/O ring design, review, and optimization for performance and robustness. Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements. Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity. Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality. Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions. The Impact You Will Have: Elevating the reliability and performance of Synopsys interface IPs, directly influencing the success of global semiconductor customers. Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry. Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions. Accelerating time-to-market for customer products through efficient and high-quality design practices. Fostering a culture of technical excellence and continuous improvement within the analog design team. Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects. What You ll Need: Proven experience in analog circuit design, with a focus on I/O development and ESD/LU robustness. Hands-on expertise with FinFet, FDSOI, and BCD process technologies from leading foundries. Strong background in ESD and Latch-Up qualification methodologies, including testchip development and validation. Proficiency in ESD simulation, ESD network construction, and use of industry-standard tools. Comprehensive understanding of PERC rules and practical experience with PERC verification tools. Experience working with cross-functional teams including foundry, design, and layout groups. Who You Are: An analytical thinker with excellent problem-solving skills and keen attention to detail. A collaborative team player who values diversity, inclusion, and open communication. A proactive learner who stays current with industry trends and emerging technologies. An effective communicator, able to translate complex technical information to diverse audiences. A results-driven individual who is adaptable, resilient, and comfortable with fast-paced, high-impact work. The Team You ll Be A Part Of: You ll join a passionate, multidisciplinary team of analog and mixed-signal engineers dedicated to advancing Synopsys interface IP portfolio. The team is focused on delivering robust, innovative, and high-quality solutions that meet the rigorous demands of a global customer base. Collaboration, continuous improvement, and technical mentorship are at the core of our culture, ensuring you ll have the support and opportunities needed to thrive and grow. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Noida View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Preferred Qualifications: Bachelor's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. Qualcomm is looking for an energetic, creative and self-driven engineer to work in Modem , Multimedia , Connectivity , Computer Vision and Image Processing , software implementation and hardware acceleration. The work will directly influence the various subsystems within the SoC. The ideal candidate would have very strong problem solving and analytical skills combined with creativity and a passion for innovation. They would be able to carry forward that new idea, concept, and/or application that will propel systems to new levels of effectiveness and efficiency. At Qualcomm you will perform detailed technical analysis, translate ideas into models, SW and/or HW and work closely with other teams to help deliver real products. At Qualcomm, the sky's the limit. College Graduates play important roles everywhere in the company. Many of our 27,000+ employees join us right out of school because we're working on the cutting edge in wireless. Complex wireless devices are only as powerful as the software that runs them. As a software engineer, you will develop, implement and maintain multimedia, gaming and application software for the world's leading-edge mobile devices. We know our employees ideas change the world. For more than three decades, weve been a global leader in mobile technology, continually pushing the boundaries of whats possible. Working with customers across industries "” from automotive to health care, from smart cities to robotics"” we continue to accelerate innovation and unlock new possibilities in a time where everything is connected. By joining the Qualcomm family, you too can bring the future forward faster. SOC & Hard Macro Physical Design SOC Validation & Debug RF & Analog Layout RF/Analog/Mixed Signal/Power IC Design Low Power Design Board and FPGA Design\ Digital ASIC Design Design/SOC Verification CAD Solution Engineer Design for Test (DFT) CPU Design Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Educational Background:Masters, BachelorsElectrical Engineering , VLSI , Embedded and VLSI , ECE Must have educational background in one or more of the following areas: Verifying SoC with embedded RISC/DSP processors, communications/ networking ASICs. Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting. RTL design experience and/or strong OO programming knowledge Knowledge of wireless/wired communications and protocols or graphics/video multi-media is a plus. Knowledge in PLL, LNA, OpAmp, CMOS, ADC/DAC, Cadence, SpectreRF, or Layout is required in RF/Analog/Mixed Signal IC Design. Excellent analytical and problem solving skills. Ability to collaborate and work in teams. Good verbal and written communication skill Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.