DFT Engineer

Shashwath Solution

6 - 8 years

25 - 40 Lacs

bengaluru

Posted:3 hours ago| Platform:

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Skills Required

jtag atpg scan insertion verilog dft bist scanning vhdl rtl design drc fpga linux rtl coding debugging ic shell scripting perl tcl system verilog synthesis sta mixed signal python rtl root cause analysis cadence radar mbist simulation software

Work Mode

Work from Office

Job Type

Full Time

Job Description

The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools.

The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF.

Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable

Must be proactive, collaborative and detail-oriented capable of exercising independent judgment

The engineer with experience on debug and root cause the problem in simulation failures

Self-motivation, flexibility, with strong interpersonal skills. Effective communication skills, oral and written skills.

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Shashwath Solution

Information Technology

Bangalore

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DFT Engineer