Key Responsibilities: Develop and maintain CPU infrastructure, including simulation environments, test frameworks, and verification flows. Collaborate with CPU microarchitecture, RTL, and verification teams to ensure functional correctness and performance targets. Implement and optimize CPU test suites, benchmarks, and low-level software for hardware validation. Work on performance analysis, profiling, and optimization of CPU cores and subsystems. Integrate CPU subsystems with SoC infrastructure, including memory, interconnects, and peripherals. Automate testing and validation workflows using scripting/programming languages (Python, Perl, Shell). Support silicon bring-up, debugging, and post-silicon validation of CPU blocks. Document design, test plans, and validation results for internal and cross-functional teams. Collaborate with hardware, firmware, and software teams for seamless integration and troubleshooting
Key Responsibilities: Develop and execute gate-level simulations (GLS) for IP and SoC verification. Implement verification environments using SystemVerilog and Universal Verification Methodology (UVM). Write and validate SystemVerilog Assertions (SVA) to ensure functional correctness. Collaborate with design teams to understand specifications and develop test plans. Conduct coverage-driven constrained random validation to ensure thorough verification. Perform functional verification for AMBA standard interfaces including AXI, AHB, APB, and OCP. Use scripting tools for automation of verification tasks and regression testing. Debug and resolve functional issues identified during verification cycles. Maintain detailed documentation of verification plans, test results, and bug reports
Responsibilities: Own RTL design for SoC-level blocks or large subsystems from specification to silicon bring-up. Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog. Collaborate with physical design teams on synthesis, timing closure, power and area optimization, DFT hooks, and ECOs. Drive block/subsystem integration and ensure seamless bring-up. Work closely with verification teams to define test plans, assertions (SVA), and coverage goals. Support silicon validation, post-silicon debug, and drive closure of design bugs. Apply low-power design techniques (UPF, retention, isolation) and adhere to clock/reset design best practices. Work on standard bus protocols such as AXI, ACE, AHB, and APB for interconnects, memory subsystems, and I/O integration. Deliver production ASIC tapeouts, owning critical blocks like interconnects, coherency, memory subsystems, high-speed I/O, security, or power-management islands. Enhance design productivity using scripting languages such as Tcl and Python to automate RTL development tasks.
Key Responsibilities: Design, implement, and simulate integrated circuitry using Verilog and SystemVerilog. Develop FPGA designs using tools such as Xilinx Vivado and Altera Quartus; experience with Synopsys Synplify or Protocompiler is a plus. Define timing constraints, perform floorplanning, and conduct static timing analysis to ensure robust designs. Work with high-speed interfaces such as Ethernet, DDR, and LPDDR memory. Implement and integrate peripheral protocols including I2C, SPI, and UART. Collaborate with embedded software teams when required to support processor-driven FPGA designs. Troubleshoot, debug, and optimize FPGA designs to meet functional and performance requirements. Document design processes, simulation results, and maintain clear communication with team members. Participate in team discussions and contribute to improving design methodologies and practices.
Key Responsibilities: Develop and maintain frontend components using HTML and JavaScript. Write clean, efficient, and maintainable Python code for backend services, automation scripts, and REST API integrations. Develop, maintain, and troubleshoot shell scripts; knowledge of Groovy is a plus. Work extensively on Ubuntu Linux environments for development, deployment, and automation tasks. Integrate and consume REST APIs for internal and external services. Design, implement, and maintain relational and NoSQL databases, including MySQL and MongoDB. Utilize development and CI/CD tools such as Jenkins, Git, Gerrit, and version control workflows. Monitor application performance and infrastructure using Grafana, Prometheus, and similar tools. Prepare dashboards, reports, and insights using PowerBI for business and operational metrics. Collaborate with cross-functional teams to design and deliver scalable solutions.
Key Responsibilities: Develop and maintain Android Framework components, HAL modules, and device drivers. Work on Android HAL development in domains such as Audio, Graphics, Camera, or Power management. Design and implement robust, efficient, and maintainable C/C++ code using object-oriented design principles. Collaborate with system and application teams to integrate and optimize Android components. Ensure compliance with CTS/VTS and support defect resolution. Work with multimedia frameworks such as OpenMAX and Codec2 (desirable). Perform system-level debugging and troubleshooting of embedded Android platforms. Contribute to performance optimization, reliability improvements, and feature development across Android subsystems.