About Marvell . Your Team, Your Impact Marvells Custom compute silicon engineering group is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD), solid state drive (SSD) and accelerators electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect Design and execute post silicon validation tests for SSD Chipsets, during R&D processes. Develop, port and execute bare metal SW to validate Storage SoCs. Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and power The candidate will also review and prepare test plans and test results documentation. Develop testing and benchmarking applications. Analyze the test results and generate professional validation reports. Provide technical support to Field Application Engineers who support customers. Provide technical support to Test Engineers who design tests for mass production. What Were Looking For Bachelor s or Master s degree in Electrical , Electronics or Computer Engineering, or a related field with 7+ years of experience. We are looking for hardware validation/applications engineer with experience in Solid States Drive. The candidate should have prior experience interacting with customers. Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture. Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications Understanding of SSD controller is preferred Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus Good communication skills in English, written and spoken. Candidate should be flexible, proactive and have the ability to work in a team Should be able to work on a given task independently. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact Marvell is rapidly growing its compute business with innovative new controllers, adapters, accelerators, software development kits and full turnkey firmware offerings. We are an ambitious team within a multi-site, multi-cultural company. Marvell develops challenging products and a unique high tech environment that encourages continued learning and growth. As part of this growth, we are expanding our FW development teams in Pune. What You Can Expect As a senior member of the development team, you will collaborate with various teams, including SoC Design, SoC Validation, SQA, Field Application Engineers, and customers. Your responsibilities will encompass firmware design, implementation, qualification, and customer support, contributing as part of a global firmware team. Based in Pune, you will work closely with teams across different locations worldwide. What Were Looking For Education: BTech/MTech in Engineering with 8 to 16 years of relevant experience Technical Expertise: Strong background in software/firmware engineering. Experience in developing storage products. Hands-on experience with firmware development in an SoC environment. Proficiency in C programming and embedded firmware tools/techniques. Familiarity with C++ and Python is a plus. Key Skills & Competencies: Ability to work in a dynamic, fast-paced environment. Capability to technically lead the development of independent modules in a large firmware stack. Strong communication skills in English. Preferred Experience: Secure boot and related security firmware protocols. Firmware development for PCIe HBA products. Working with NVMe, PCIe, Security, and TCG/Opal. Agile development methodologies. Knowledge of processor architectures, such as ARM. Designing and supporting firmware for mass production. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

About Marvell . Your Team, Your Impact Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system level knowledge, Marvells infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for multiple market segments. What You Can Expect Collaborate with the Architecture team to define the micro-architecture of the chip. Develop specifications and micro-architecture for one or more blocks. Implement RTL coding using best practices. Work with physical design teams for synthesis and timing signoff. Partner with verification teams on test plans, coverage analysis, and debugging. Support post-silicon validation for production qualification. Coordinate with project managers on task allocation and mentorship. Engage with multiple design centers to enhance methodologies. Collaborate with software teams to ensure compatibility with software use cases. Mentor and provide technical guidance to junior engineers. What Were Looking For Bachelor s degree in Computer Science, Electrical Engineering or related fields and 12-15 years of related professional experience or Master s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10-12 years of experience. Micro-architecture experience for complex Custom/ASIC products. Strong logic design and debugging skills; expertise in AHB, AXI, I2C, UART. Hands-on RTL design, synthesis, timing closure, formal verification, and gate-level simulations. Knowledge of PCIe, SPI, USB, DDR2/DDR3 is a plus. Proficiency in front-end design tools and methodologies. Scripting skills in Perl, Tcl, UNIX shell are a plus. Strong leadership, communication, and problem-solving skills. Ability to thrive in a fast-paced environment and drive team success Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

About Marvell . Your Team, Your Impact Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world s data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep system level knowledge, Marvells infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for multiple market segments. What You Can Expect Lead DV efforts for blocks, subsystems, and top-level verification. Develop and maintain UVM-based verification environments. Define and review test plans with architecture and design teams. Verify designs using directed and constrained random techniques. Maintain regression, debug failures, and analyze coverage. Drive verification to meet coverage targets. Contribute to next-gen data processing and hardware accelerator verification. Focus on networking domain verification for future solutions. Ensure design closure using innovative and automated techniques. What Were Looking For Bachelor s or Master s degree in Computer Science, Electrical Engineering, or a related field with 8+ years of professional experience. Strong experience with Verilog, SystemVerilog, and UVM. Expertise in unit and subsystem verification, modern verification concepts. Proficiency in SystemVerilog, C, C++, and scripting (Perl, Tcl, Python preferred). Strong debugging skills and verification flow optimization. Collaborate with design teams on specs, test plans, and verification strategies. Develop and maintain UVM-based testbenches for ASIC SoCs. Execute verification, maintain regressions, and debug failures. Excellent verbal and written communication skills. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

About Marvell . Your Team, Your Impact At Marvell, we are looking for an Application & API Security Professional who will be instrumental in protecting the company s digital assets. The ideal candidate will lead the application security program, oversee the identification and remediation of security vulnerabilities, and report on the effectiveness of the program to IT and business groups. What You Can Expect Provide application security guidance to the IT teams and third parties involved in application development and maintenance. Embed security practices into the Software Development Life Cycle (SDLC) and CI/CD pipelines. Design Application and API security standards for Marvell, based on OWASP Top 10, OWASP API Top 10 and CIS Top 20 Perform ongoing governance and follow-through with applications and API owners to ensure implementation of threat-based requirements. Establish External web applications and API inventory management and governance at Marvell. Develop and implement ongoing monitoring and incident response procedures for the existing and new APIs. Validate implementation of application and API security controls against outputs of vulnerability testing tools to enable auditability and verifiability. Collaborate with internal development teams to build/advocate security controls in Application Programming Interface (API), performing Threat Modeling, Static Application Security Testing (SAST), Software Composition Analysis(SCA) Perform security risk assessments and audits for web applications and APIs. Provide recommendations around security measures to protect applications and APIs from threats such as SQL injection, XSS, CSRF, and other OWASP Top 10 vulnerabilities. Perform vulnerability risk profiling and prioritization of vulnerabilities. Provide insight to management on common API misconfigurations, identify gaps in API development processes Support and consult with development and IT support teams in the areas of application and API security. Work with application and IT teams to review the application and API security architecture, API Gateway, WAF, and Firewall policies to block threat actors. Educates development team on application and API security procedures and standards Stay up to date with the latest security threats, vulnerabilities, and industry best practices. What Were Looking For 8+ years of experience with Bachelor s or Master s degree in Information Technology or related field . Knowledge and working experience in application threat modeling and remediation of OWASP API Top 10, CIS Top 10, SANS Top 25, etc. Experience conducting risk assessments and performing threat modeling of applications. Strong understanding of security vulnerabilities, web application security, and secure coding practices Hands-on experience performing application and API security assessments, static and dynamic security assessments with tools such as Burpsuite, OWASP ZAP, AppScan, WebInspect, Fortify, Veracode, Checkmarx, etc. Knowledge of the SSDLC process and its components; Rest API technology and the API Gateway concept. Being familiar with issues related to authorization, authentication, or session management (SAML, OAuth, SSO, etc. ). Experience with API management platforms, security tools, and security frameworks. Experience with service-oriented architectures and web services security. Has practical experience in auditing various OS, DB, Networ, k and Security technologies Strong understanding of Unix/Linux/Mac/Windows, operating systems, including bash and Powershell Relevant certifications (OSCP, CISSP, CSSLP, GIAC GWAPT, CASP) will be an added advantage Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

. Your Team, Your Impact Marvell is a leading provider of innovative technologies, including high end Packet Processors running SONiC for Data Centers SONiC is an open source network operating system based on Linux that runs on switches from multiple vendors and ASICs. SONiC offers a full-suite of network functionality, like BGP and RDMA, that has been production-hardened in the data centers of some of the largest cloud-service providers. It offers teams the flexibility to create the network solutions they need while leveraging the collective strength of a large ecosystem and community. This Group is responsible for developing and qualifying SONiC based Platform for Marvell Packet Processors targeted for Data Center. What You Can Expect Hands-on experience in routing/switching abstraction interfaces like FPA, SAI or any OCP Hands-on experience with Network Operating system , SONiC or similar. Experience in handling Tier-1 customer requirements Datacenter or similar. Experience scripting languages such as Unix shell, Python, Perl or similar. Experience in management of high complex switching/routing lab infrastructure for Development activities. Experience in handling fault tolerant switch management areas such as High availability, DB persistency, Hitless software upgrade, In-Service software upgrade, etc Hands-on experience in L4 protocols such as TCP, UDP, etc Hands-on experience working with open source software Knowledge in Data center switches/network management areas - CLI, SNMP, Yang Models etc What Were Looking For Bachelors/Masters in CS/ECE/EE with 6 to 15 years of relevant work experience as Individual contributor (Technical leader/Architect) Extensive experience in handling complex data structures and algorithms in routing/switching software. Extensive technical depth in L2 and L3 Ethernet switching and routing protocols. Extensive experience in OS development experience in Switching/Routing ASIC Hands on experience on switch/router embedded system software development Experience architecting innovative, scalable Linux based Embedded products. Extensive experience in network programming languages such as C or equivalent. Extensive experience in Linux/Unix/FreeBSD/ network programming skills such as TCP/IP, socket programming Extensive experience in understanding requirements/architect/design of networking communications standard bodies like IEEE, IETF etc. Ability to deliver high quality features with extensive automation coverage, including experience applying test driven development methodology Demonstrated experience in developing multiple products from conception to shipping in Switching/Routing. Ability to communicate technical concepts to a wide range of audiences spanning executives to junior engineers Proven knowledge in SDLC of high complex and large software development - Waterfall, Agile, Extreme programming, or similar. Proven knowledge in Source version control of R&D internal and customer releases along with Continuous Integration methodologies. Working experience in L2 switching/forwarding areas such as LAG, VLAN, xSTP, LLDP, Link OAM, ARP, VxLAN, DC fabric switching, etc. Working experience in L3 unicast/multicast routing protocols such as RIP, OSPF, IGMP, BGP, ISIS, etc. Working experience in areas like ACL, QoS, Policers, TCAM, etc. Experience in chassis or pizza box-based switching/routing products. Working experience in UT framework such as google test or similar. Good experience in software repository tools GIT, SVN and Perforce Good experience in traffic testing tools IXIA, Wireshark, Scapy, Tcpdump or similar Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

About Marvell . Your Team, Your Impact The Central Engineering Foundational IP team is responsible for Layout design of SerDes IPs and Foundational IPs. What You Can Expect As a key member of Marvells Central Engineering team, you will play a leading role on developing next-generation high speed SerDes IPs. We work with leading edge finfet technologies to produce best-in- class analog IPs which enable us to move, store, process and secure the worlds data faster and more reliably than anyone else. What Were Looking For Bachelors or Masters Degree and or PhD in Electrical/Electronics Engineering, Microelectronics or related fields. 4 to 8 years of related professional experience. Good understanding of advanced semiconductor technology process and device physics. Full-custom circuit layout/verification and RC extraction experience. Experiences in one or more of the following area is preferable : Mixed signal/analog/high speed layout, e. g. SerDes, ADC/DAC, PLL, etc. Familiar with Cadence Virtuoso environment and various industry physical verification tools (DRC, LVS, DFM, etc). Experiences in advanced technology node under 32nm/28nm/16nm/14nm and FinFET is preferable. Experience with EMIR analysis, ESD, antenna and related layout solutions. Good communication skills and willingness to work with global team. Good learning competency, self-motivated, and ability to work in diverse areas in a flexible and dynamic environment. Programming skills, automation and circuit Design background is a plus. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact The team is responsible for the post-silicon validation of high-speed transceiver ASICs for coherent optical communications within Marvell s Coherent DSP Business Unit. The team develops software validation platforms, performs post-silicon validation of hardware and firmware components of the ASIC, develops and documents user interfaces for customers, and provides technical support to Marketing, Applications, and customers. What You Can Expect The Marvell Cloud Platform team is looking to hire a QA engineer whose role is to design and execute test plans and test cases that ensure the delivery of high-quality product to customer. Successful candidates must have a strong passion for the latest technologies and strong problem solving and troubleshooting skills. Work closely with peers in a team of skilled engineers designing and developing networking software for Switch Products. Roles and Responsibilities include - Understanding, analyzing and reviewing system requirements, functional specifications, technical design documents. Plan, create and execute test plans based on functional spec documents. Automate and execute test suites with highest quality. Ability to work and co-ordinate with teams across the different verticals. Establish Quality Assurance Engineer strategy and best practices. Stay current with industry trends in testing strategies. What Were Looking For Bachelors/Masters degree in Computer Science, Electrical Engineering or related fields and 6-15 years of related professional experience Ability to create comprehensive test plans and test cases, define testing strategies. Strong understanding of networking concepts and in-depth L2, L3 knowledge. Experience with Python and other object-oriented scripting/programming languages. Experience working with Traffic generators like IXIA and Spirent. Strong communication skills. Experience working on SONiC NOS is an added advantage. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

About Marvell . Your Team, Your Impact We are seeking a highly skilled and motivated Staff IO Layout Engineer to join our Central Engineering, Foundational IP team. This team contributes to the development of General Purpose IOs (GPIO), LVDS, NANDIO, HSIO, and IO ESD solutions across different process nodes, addressing the needs of hyperscale data centers, automotive, and other advanced applications. What You Can Expect Physical layout and verification of high speed I/O circuits, General Purpose I/Os, ESD structures with the latest process nodes using Cadence tools. Provide technical expertise and mentoring to team members Work effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etc. Ability to plan and work independently and coordinate with cross-functional teams Contribute to overall team through tool testing, script development, flow documentation, training, etc. Drive layout reviews and ensure compliance with quality standards and design rules Help with releasing I/O IP libraries. Keep abreast of technology and tool developments and bring new ideas to the team. What Were Looking For Bachelors or Masters Degree and or PhD in Electrical/Electronics Engineering, Microelectronics or related fields with 4 to 8 years of related professional experience. Good understanding of custom layout best practices and layout dependent effects in lower technology. Work experience in deep sub-micron technologies, GAA , FINFET and FDSOI technology Hands-on layout experience in GPIO, NAND IO, High-speed IOs: DDR, USB, LVDS Have high level proficiency/knowledge of industry standard EDA tools Proficiency in PDK understanding, foundry guidelines, and tape-out process Have high level proficiency in the interpretation of CALIBRE DRC, ERC, LVS, EMIR , PERC reports. Scripting skills in PERL, TCL or SKILL are considered a plus Independent with strong analytical skills, creative thinking and self-motivated. Excellent communication skills and able to work with cross-functional teams. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact We are seeking a highly skilled and motivated Senior Staff IO Layout Engineer to join our Central Engineering, Foundational IP team. This team contributes to the development of General Purpose IOs (GPIO), LVDS, NANDIO, HSIO, and IO ESD solutions across different process nodes, addressing the needs of hyperscale data centers, automotive, and other advanced applications. What You Can Expect Own the overall layout execution of the assigned IO projects Physical layout and verification of high speed I/O circuits, General Purpose I/Os, ESD structures with the latest process nodes using Cadence tools. Provide technical expertise and mentoring to team members Work effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etc Drive layout reviews and ensure compliance with quality standards and design rules Contribute to overall team through tool testing, script development, flow documentation, training, etc Help with releasing I/O IP libraries Keep abreast of technology and tool developments and bring new ideas to the team What Were Looking For Bachelors or Masters Degree and or PhD in Electrical/Electronic Engineering, Microelectronics or related fields with 9 to 14 years of related professional experience Good understanding of custom layout best practices and layout dependent effects in lower technology Work experience in deep sub-micron technologies, GAA , FINFET and FDSOI technology Hands-on layout experience in GPIO, NAND IO, High-speed IOs: DDR, USB, LVDS Have high level proficiency/knowledge of industry standard EDA tools Proficiency in PDK understanding, foundry guidelines, and tape-out process Have high level proficiency in the interpretation of CALIBRE DRC, ERC, LVS, EMIR, PERC reports Proven experience leading layout teams and delivering successful tape-outs Scripting skills in PERL, TCL or SKILL are considered a plus Possess strong analytical skills, creative thinking and self-motivated Excellent communication skills and able to work with cross-functional teams. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact Global HR Operations and People Analytics organization is the backbone for Marvells HR organization that enables best in class employee experience, delivers operational efficiency at scale, drives large company-wide cross-functional HR projects, and enables HR and business leaders with key talent insights to drive Marvells talent strategy. What You Can Expect Ensure day-to-day employee experience is positive and efficient through HR service channels. This includes addressing employee queries, resolving issues promptly, and continuously improving HR services to enhance overall satisfaction. Oversee local compliance and regulatory requirements, ensuring all HR practices adhere to legal standards. This involves staying updated on labor laws, conducting regular audits, and implementing necessary changes to maintain compliance. Facilitate smooth onboarding processes for new employees, ensuring they have the necessary resources and support to integrate successfully into the organization Facilitate smooth transitions for departing employees, ensuring all exit procedures are handled efficiently Provide comprehensive support for employee benefits, addressing queries and resolving issues to ensure employees understand and utilize their benefits effectively Ensure timely and accurate payroll administration in partnership with Payroll team, including handling payroll queries and discrepancies as needed Maintain and support accurate HR data in Workday, ensuring data integrity and accessibility. This includes regular updates, troubleshooting issues, and training employees on effective use of the system. Develop and manage HR metrics and reporting systems to track key performance indicators (KPIs) and provide insights into HR operations. This includes analyzing HR data to identify trends, areas for improvement, and opportunities for optimization. Generate regular reports on HR metrics such as employee turnover, engagement, and compliance, and present findings to senior management. Use data-driven insights to inform HR strategies and decision-making, ensuring alignment with organizational goals. Implement processes for continuous monitoring and improvement of HR metrics, ensuring the organization remains agile and responsive to changing needs. Lead and manage the HR operations team across the India sites. This includes providing direction, support, and mentorship to team members, fostering a collaborative and high-performing team environment. Partner and collaborate with Legal, Finance, IT, and Facilities functions on a regular basis to ensure cohesive and efficient HR operations What Were Looking For Marvell is seeking a Senior Manager, HR Operations to oversee HR operations across our India sites in Bangalore, Hyderabad, and Pune. This role is pivotal in ensuring a seamless employee experience through efficient HR service channels, managing local compliance and regulatory requirements, and overseeing various HR processes. The role will report into the Head of Global HR Operations and People Analytics. As part of the HR Operations leadership team, you will have the opportunity to design and transform employee experience and influence the way we operate across HR Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-AB3

About Marvell Marvell s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell Custom Compute Storage - CCS BU has been at the forefront of developing and delivering leading-edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast growing product lines, Marvell technology is powering the next generation data processing and workload acceleration platforms for the Carrier, Cloud/Enterprise and Automotive Compute market segments.The team focusses on the Custom ASIC business, Cloud AI solutions Enterprise/Career solutions including the CXL product line. What You Can Expect As a Senior Director, you ll be responsible for collaborating with various teams to develop strategies, pushing the IP roadmap, and supporting multiple SOCs. This starts at the product definition phase with architecture and marketing then continues through execution of all efforts required including supporting productization. You ll provide leadership in the development of highest value-add IP, subsystem SoC plans and strategies with cutting edge process, speed and performance designs. The planning and execution need to be rationalized with budget and market timing requirements. Experience and judgement in determining the value of the tasks defined and executed by the team is important. This is a fast-paced, intellectually challenging position, and you ll work with thought leaders in multiple technology looking for ways to improve the value and quality of the effort while keeping cost in budget. Manage and continue to build a team of complex sub-system, co-processors, accelerator and SoC engineers. The managed team includes design, verification, and collaborating with the Physical Design, DFT Validation teams. Develop methodologies and infrastructure with evolving technology challenges including cutting edge semiconductor process, I/O s, networking bandwidth, embedded cores, and co-processors. Work with architecture, SoCs, software, firmware, program management and post-silicon design teams for plan development and execution. Provide technical mentoring for team members. Actively engage in efforts to find improvements in methodologies, techniques, and automation Own schedules and reporting of progress metrics What Were Looking For 25 years of relevant industry experience in Semiconductor design development Demonstrated ability to lead a multi-disciplinary team, show initiative, collaborate and communicate effectively with team members across functions cultures. Experience in all phases of design from concept through productization. Understand appreciate the complexity of data centers, server class or networking chipsets prior experience with successful first silicon success. Ability to recruit and retain engineering talent. Demonstrated mentoring of junior staff. BS degree or higher in EE or CE or CS with 25+ years or more of RTL and/or verification experience 10 + years of experience managing a Design/DV/Emulation related teams. Preferred Qualifications: Experience with Full chip design, development emulation of complex designs targeting Datacenters, Servers, Enterprise/Networking domain. Expert in developing IP, subsystem, Chiplets and SOCs Experience with one or more high-speed IO technologies: DDR, PCIe, CXL, Ethernet Management of cross-site teams Knowledge of industry standard SOC components (bus fabrics, I/O devices, processors) Knowledge of HW-SW co-development and silicon validation cycle Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-AB3

About Marvell . Your Team, Your Impact The Custom and Compute Solutions Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. What You Can Expect Define the sub system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification writeup Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers Implement a specification using RTL coding techniques and best practices Work with third party vendors to define customization requirements of third party IPs (controller, PHY, etc. ) Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff. Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation and emulation, performance and power analysis and debug Help develop and/or evaluate design and verification methodologies and participate in improving existing ones Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning Provide mentorship to the more junior team member What Were Looking For Bachelor s degree in Computer Science, Electrical Engineering or related fields and 12 -20 years of related professional experience. Master s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10-18 years of experience. Experience in creating architectural, micro-architectural, and register specifications. Verilog/System Verilog RTL coding with System Verilog assertions Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up) Expertise in high speed protocols (Ethernet). Should have worked on Full Chip Integration of Complex SoC design. Has worked on complex chips such as network processors, CPUs , GPUs , NOCs , Switches , Machine Learning SoCs etc. owning full chip, subsystem and block level architecture and design Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning accelerators Experience with scripting in Perl/Python/Shell Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

About Marvell . Your Team, Your Impact Marvells Custom Compute & Storage (CCS) Business Unit is at the forefront of developing high-performance data processing silicon platforms, driving innovation across a range of fast-growing product lines. These platforms power next-generation data processing and workload acceleration for the Carrier, Cloud/Enterprise, and Automotive Compute markets. The team specializes in custom ASIC solutions and Cloud AI, including the DDR/HBM product line. Marvells Custom Compute Silicon Engineering group is also a leader in storage technologies, offering ultra-fast read channels, high-performance processors, advanced transceivers, efficient analog designs, and powerful cryptographic engines. These solutions serve the HDD, SSD, and accelerator markets, and power storage systems in PCs, servers, cloud, and enterprise environments. What You Can Expect Understand design specifications and implementations, define the verification scope, and develop test plans, tests, and verification infrastructure to ensure design correctness. Implement and analyze SystemVerilog assertions and coverage metrics (code, toggle, functional). Work with the verification team to develop, execute, and analyze verification test cases and provide solutions to issues. Collaborate with architects, designers, and pre- and post-silicon verification teams to achieve project goals. Adhere to quality standards and best practices in test and verification. Ensure a thorough understanding of verification processes and methodologies. What Were Looking For Bachelor s degree in Computer Science, Electrical/Electronic Engineering, or a related field with 6+ years of experience in Hardware Verification or a related field. Strong hands-on experience in SystemVerilog and UVM methodologies. 2+ years of experience working with DDR/HBM technologies. Good understanding of AMBA protocols (AXI, AHB, APB). Proficiency in SystemVerilog, C, and C++ programming. Experience in scripting languages such as Perl, Python, or Tcl. Strong communication and interpersonal skills. Ability to collaborate effectively with cross-functional teams. Excellent problem-solving and analytical thinking. Strong technical decision-making abilities. Proven track record of delivering results on time. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

About Marvell . Your Team, Your Impact The Data Centre Engineering Group develops Custom Silicon products tailored for the Data Centre market, focusing on cutting-edge Accelerated Infrastructure solutions for Networking, Switching, Connectivity, and Compute. The team works on high-performance and scalable architectures, ensuring optimized performance, power efficiency, and reliability to meet evolving data center demands. By collaborating across multiple teams, the group delivers best-in-class silicon solutions that drive innovation in next-generation data center applications. What You Can Expect Responsible for IP/Subsystem Verification. Define Test Plan, Testbench Architecture, and develop testbenches. Execute Design Verification (Testbench/test sequence development, debug, regression, coverage closure, gate-level simulations). Support Silicon bring-up activities. Debug failures in simulation and perform root-cause analysis What We're Looking For Bachelor s or Master s degree in Computer Science, Electrical Engineering with 8+ years of experience in Digital Pre-Silicon Verification. Experience in leading IP, Subsystem, or SoC-level verification. Strong understanding of SoC/Subsystem design verification concepts and architectures. Hands-on experience with Verilog, SV-UVM, and SoC-level testbenches. Experience in setting up and debugging functional and gate-level simulations. Ability to translate functional requirements into verification plans. Proficiency in developing verification environments and regression setups. Expertise in coverage analysis and closure. Strong interpersonal and communication skills. Ability to collaborate and influence design verification methodologies. Quick adaptability to new technologies with strong problem-solving skills. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

The CCS Groups Firmware (FW) team in Pune is dedicated to developing cutting-edge products with a strong focus on the data center domain. As part of a larger global firmware development organization, the Pune team plays a key role in advancing firmware technologies. As a Senior Staff Manager - Firmware , you will lead a growing team responsible for developing end-to-end firmware solutions for some of our most advanced technologies. This role requires strong leadership and technical expertise to drive firmware development in alignment with Marvell s product roadmap. Lead and mentor a high-performing firmware development team. Collaborate with Architecture and Customer Support teams to translate market and customer needs into product requirements. Plan, manage, and execute release schedules, ensuring timely delivery of high-quality firmware. Drive product definition and requirement changes, effectively managing schedule, feature, and cost trade-offs . Oversee direct and matrix management of firmware engineers. Maintain frequent communication with customers to drive optimal firmware development. Plan, present, and track firmware development schedules to ensure seamless execution. Manage capital equipment purchases, lab space forecasting, and budget planning . Hire, retain, and develop top firmware talent while fostering a culture of continuous learning. Work closely with Firmware Simulation, Firmware Validation, SoC, System Architecture, and cross-functional teams to ensure product success. Collaborate with teams across global locations within and outside of Marvell . This role requires a strategic mindset, strong leadership skills, and deep technical expertise to drive innovation and execution in firmware development. What Were Looking For Education: BE/B.Tech/BSc or ME/M.Tech/MSc in Electrical Engineering, Computer Engineering, or a related field. Technical Expertise: Strong background in software/firmware engineering. 15+ years of experience in software design, development, and testing. Experience developing firmware for PCIe storage products. Proficiency in C, C++, Python, and embedded firmware tools/techniques. Knowledge of NVMe, PCIe, Security, and TCG/Opal. Familiarity with processor architectures, such as ARM. Leadership & Project Management: 5+ years of experience leading and managing software/firmware teams. Strong technical project management skills, including scheduling, risk assessment, and execution. Expertise in tracking and management tools, with the ability to work in a fast-paced, agile environment. Communication & Collaboration: Strong written and verbal communication skills in English, with the ability to provide regular updates to execution teams and key customers. Proven ability to collaborate across teams, including System Architecture, SoC Design, and Marketing. Ability to work effectively in a dynamic and fast-paced environment.

Design and execute post silicon validation tests for SSD Chipsets, during R&D processes. Develop, port and execute bare metal SW to validate Storage SoCs. Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and power The candidate will also review and prepare test plans and test results documentation. Develop testing and benchmarking applications. Analyze the test results and generate professional validation reports. Provide technical support to Field Application Engineers who support customers. Provide technical support to Test Engineers who design tests for mass production. What Were Looking For Bachelor s degree in Electrical , Electronics or Computer Engineering, or a related field with 12+ years of experience. Master s degree in Electrical , Electronics or Computer Engineering, or a related field with 10+ years of experience. We are looking for hardware validation/applications engineer with experience in Solid States Drive. The candidate should have prior experience interacting with customers. Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture. Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications Understanding of SSD controller is preferred Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus Expertise with typical lab tools: Emulators, Oscilloscopes, Logic Analyzers Experience in analog characterization for power and high speed characterization is an added advantage. Good communication skills in English, written and spoken. Candidate should be flexible, proactive and have the ability to work across disciplines and manage time across several demands Should be able to work on a given task independently.

About Marvell . Your Team, Your Impact You are responsible for delivering the cyber security risk & compliance-related activities defined as per Marvell s internal and external standards, frameworks, and attestations. As a Cybersecurity Risk & Compliance Professional, you will play a critical role in developing and implementing a world-class information security risk and compliance program to meet industry-leading practices and customer security compliance. You ll have a deep understanding of the information security risk standards, frameworks, and methodologies we can use to strengthen our risk and compliance posture. What You Can Expect Responsible for executing day to day cyber security risk, compliance, and assurance activities. Support the global cyber security certifications such as ISO 27001, ISO 27017, and TISAX. Evaluating control effectiveness and review evidence of controls by applying audit, compliance, security, and regulatory framework knowledge and experience, including, but not limited to review of ISO 27001, ISO 27017, NIST CSF, TISAX, NIST 800-171 as well as knowledge of controls related to Privacy, Compliance, Cyber and other risk domains. Effectively develop thorough testing procedures, plan and execute the testing working with relevant stakeholders, document the testing workpapers, develop a summary report, capture observations / findings, recommend action plans, obtain agreement from stakeholders on management response plans, track remediation, and execute remediation testing. Drive the implementation of the cyber security projects and assessments in the areas of governance and risk Ensure relevant security controls are embedded in the project delivery process by providing appropriate insights to project teams. Collaborate with internal and external stakeholders assessing cyber security controls. Support the collection of any necessary evidence, coordination of walkthroughs / meetings, and any needed logistics to facilitate the assessment / audit effort. Timely report status and metrics to the cyber security management team. Complete work per agreed timelines with high quality. Support extended cyber security team s efforts What Were Looking For Bachelor s degree in Information Technology or a related field 5-8 years of experience in cyber security audit and/ or compliance. Strong implementation or assessment experience of NIST Cyber Security Framework standards and requirements. Proven track record and experience in executing information security-related projects in a global company Experience in supporting cyber security audits by internal audit or other third parties (i. e. ISO 27001, ISO 27017, and TISAX). Experience with infrastructure operations and processes associated with IT service management in an enterprise-level organization Experience presenting to large audiences. Very good oral and written communication skills in English Preferred Certifications: CISA, CISSP, CISM, CRISC, ISO27001 Lead Implementor and Auditor, SANS Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact In this position, you will join the Central Engineering team, where you will play a crucial role in establishing ESD requirements and validating ESD solutions for Foundational IP, SerDes IP, and SOCs during the ESD qualification process. You will work closely with the Physical Design, Electrical Engineering, and SOC (System on Chip) teams to provide support from the initial design phase through failure analysis, issue root cause determination, and the development of corrective actions. Being part of interface design team, you will have opportunities for the development of IO circuit to customer specifications including the generation and delivery of final EDA views for the IP. Typical circuits to be developed include biasing blocks, over-voltage/over-current protection circuits, regulators, amplifiers, switches, and a range of closed loop feedback circuits What You Can Expect Provide co-design support with both ESD simulations of circuits to maximize both performance and ESD protection robustness. Perform ESD design reviews and provide the required technical guidance for analog, foundational IP, SOCs, and qualification test chips for multiple technology nodes ranging from 45nm to 2nm across major foundry platforms. Validate and characterize ESD circuits using ICV PERC, Calibre PERC, TLP-based SPICE simulation, and any other industry methods and tools. Design enablement of ESD protection schemes for analog design like SerDes. This will include understanding ESD protection design, latch-up, transient latch-up as well as ESD design verification and EDA tools. Continue the development of best practices for ESD in the technologies being supported. Development and support of EDA tools for ESD design checking. Development of circuits like Driver, Receiver, Overvoltage protection circuits, Fail safe I/O, Bandgap and Voltage Regulators. What Were Looking For Bachelor s or Master s degree and/or PhD in Electrical/Electronic Engineering, Microelectronics or related fields and 5-12 years of related professional experience. Expertise in custom circuit design, handling layout effect in advanced FinFET process design rules, process variability and circuit reliability issues that affect power, speed, area, and yield. Advanced knowledge of on-chip ESD protection circuit design Advanced knowledge of CAD design tools such as Cadence and SPICE Applicant should have sufficient design experience to be able to effectively review designs and communicate ESD design deficiencies to product design engineering. Advanced knowledge of ESD relevant device physics such as snapback and other high-level injection phenomenon/device operations Fully familiar with industry ESD test standards and latest developments. Experience with verifying ESD analysis for IP and SoC level using industry standard tools and methodologies. Exposure and experience with the Custom ESD PERC code development will have added advantage to this role. Experience with simulation skills using cadence including PEX, Monte Carlo, and Corner analysis. Derive design specifications from customer requirement. Requires effective communication between multiple sites and ability to work with multiple groups. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-KP1

About Marvell . Your Team, Your Impact Goal of Section: Convey impact of the business group they will be joining on Marvell and the world. Questions To Answer In This Section: What can t Marvell do if they do not have this team to execute? What projects is this team responsible for delivering? What do they work on every day? Why should you work on this team vs another team doing the same project at another company? How is this technology used in the world that most people would recognize? What You Can Expect The new hire will start with documenting software drivers, that are published in HTML. We are tracking software updates in JIRA. An engineer, usually an application engineer, will document the change and the technical writer needs to be able to track the documentation progress and then format it into the correct location in the user guide. Today we use FrameMaker as the main authoring tool, so the technical writer takes the engineering update, and places it in the correct location in the user guide, taking care of the formatting aspects. The new hire needs to understand if the content makes sense, " so the outcome is understood by the customer. Every update to the documentation goes through a review by a few engineers. What Were Looking For The ideal candidate will have experience working in engineering environments and be proficient in various documentation tools. Skilled technical writer with a background in creating engineering documents for both hardware and software. The candidate must know and work with Adobe FrameMaker, Microsoft Word, Power Point, Excel and Visio. A candidate must be familiar with structured technical writing methodology (DITA) Nice to have requirement is HTML publishing, Doxygen, knowledge of CSS The technical writers in our group must be able to manage their time and handle more than one task at a time. Interact directly with engineers, sit with them, understand and document their explanation. Should also be able to get engineering design documents and create customer-facing documents out of them. Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-RS1

About Marvell . Your Team, Your Impact Marvell Automotive delivers high-performance semiconductor solutions including Ethernet networking, storage, and connectivity technologies that power advanced vehicle systems, enabling data-intensive applications like ADAS, autonomous driving features, and modern infotainment platforms. Their specialized automotive-grade chipsets meet rigorous industry standards for reliability, durability, and functional safety, while supporting the growing computational requirements of software-defined vehicles and connected car ecosystems. Their integrated approach allows automotive manufacturers to reduce system complexity and accelerate time-to-market while addressing evolving demands for higher bandwidth, lower latency, and enhanced security. What You Can Expect Build and maintain BSP on Automotive Ethernet Switch Platforms Develop and maintain different kinds of Abstraction Layers on Switch platform Debug system issues on Switch platforms, including coordinating with HW team Occasionally travel to coordinate with other teams Optimize Firmware running on Ethernet Switch What Were Looking For Bachelor s degree in Computer Science, Electrical Engineering, or related fields with 7-8 years of professional experience, or a Master s degree with 5-6 years of experience. Experience in working with Board Support Packages on ARM-based platforms. Should have participated in at least 2 device bring-ups. Strong team and communication skills, with the ability to work effectively with remote teams. Experience with embedded device drivers and communication protocols (e. g. , SPI, I2C, MDIO, UART). Proficient in C programming. Hands-on experience with embedded diagnostics tools such as oscilloscopes, logic analyzers, and JTAG. Working knowledge of hardware design schematics. Familiarity with version control systems (e. g. , git) and build environments (IDE, gmake). Excellent English language skills. Strong multitasking abilities. Preferred: Experience with any of the RTOSs like FreeRTOS, Zephyr, ThreadX Experience in debugging multiple MCU platforms Experience in working with teams across multiple geographies Strong knowledge of ARM sub-system Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1