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As an Analog Layout Engineer at AISemiCon, you will play a critical role in the design and development of high-performance analog and mixed-signal integrated circuits (ICs). Your main responsibility will be to create layout designs for analog blocks and ensure their adherence to design rules, specifications, and performance targets. You will collaborate closely with cross-functional teams, including circuit designers, verification engineers, and process engineers, to achieve optimal layout implementation. We are seeking individuals with a strong passion for analog layout, deep expertise in IC design, and a keen eye for detail. The key responsibilities for this role include, but are not limited to: Requirements: Excellent work experience in Analog Layout design in advanced node processes Hands on experience in any or multiple critical blocks such as BGR, LDO, Charge pump, SERDES, PHY, HDMI, PLL, ADC, DAC, LDO, Current Mirrors, Comparator, Differential Amplifier etc. Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process Excellent understanding of Analog Layout concepts (e.g. Matching, Electro- migration, Latch-up, Coupling, Cross-talk, IR-drop, Active and Passive parasitic devices etc. Excellent problem-solving skills in Routing Congestion, Physical Verification in Custom Layout. Work closely with the verification team to address layout-related issues and ensure design robustness. Follow design rules, guidelines, and best practices to ensure design manufacturability and yield. Collaborate with process engineers to understand process requirements and optimize layout designs accordingly. Conduct layout parasitic extraction and work with the simulation team to validate and optimize design performance. Participate in design reviews and contribute to overall design improvements. Stay updated with the latest advancements in analog layout techniques, process technologies, and industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering or a related field. 7-8 Years of proven experience in analog layout design, with expertise in IC design methodologies and tools. Sound knowledge and experience for verification checks like DRC / LVS / ERC / Antenna / LPE / DFM etc. Knowledge of various analog layout techniques, understanding of various circuit principles as affected by Layouts such as speed, capacitance, power, noise, and area Proficiency in industry-standard layout tools, such as Cadence Virtuoso or Synopsys IC Compiler and verification tools in a Linux environment of Cadence EDA tools. Solid understanding of layout design principles, design rules, and process technologies. Familiarity with analog block-level and top-level layout techniques for performance optimization. Knowledge of layout parasitic extraction and simulation methodologies. Excellent attention to detail and problem-solving skills. Effective communication and collaboration skills to work in a cross-functional team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. By using this form you agree with the storage and handling of your data by this website. *

IP Architect CXL / UCIe / USB / DDR / HBM, RISC-V CPU, NoC More Details IP Architect CXL / UCIe / USB / DDR / HBM, RISC-V CPU, NoC AISEMICON Job Description: As an IP Architect at AISemiCon, you will be responsible for designing and architecting intellectual property solutions for various industry standards and architectures. We are seeking IP architects with expertise in either CXL, UCIe, USB, DDR, HBM, RISC-V CPU, and or NoC to join our team. You will collaborate closely with cross-functional teams, including hardware, software, and verification, to define and develop IP solutions that meet the requirements of our customers. We are looking for individuals who are passionate about IP design, possess deep technical expertise, and thrive in solving complex challenges. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect IP solutions for industry standards and architectures respectively, such as CXL, UCIe, USB, DDR, HBM, RISC-V CPU, and NoC. Conduct feasibility studies and performance analysis to determine optimal IP architectures and specifications. Design and review IP specifications, microarchitecture, and system-level documentation. Work closely with the implementation team to ensure successful integration and functionality of the IP solutions. Drive innovation by exploring new technologies, methodologies, and industry trends relevant to IP design. Collaborate with customers and partners to understand their requirements and provide customized IP solutions. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in IP design, industry standards, and emerging technologies. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in IP architecture and design, with expertise in industry standards and architectures such as CXL, UCIe, USB, DDR, HBM, RISC-V CPU, and NoC. Deep understanding of hardware and software interactions in IP design and the unique requirements of industry standards. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints in areas such as power, performance, area, and latency. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of providing cutting-edge semiconductor IP solutions. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

As a SoC Architect 5G at AISemiCon, you will play a crucial role in designing and architecting system-on-chip (SoC) solutions tailored for 5G applications. You will collaborate closely with cross-functional teams, including hardware, software, and verification teams, to define and implement SoC architectures that meet the unique requirements of 5G wireless systems. We are seeking individuals who have a strong passion for 5G technology, possess deep expertise in SoC design, and are excited about creating innovative solutions from scratch. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect SoCs optimized for 5G wireless communication applications. Conduct feasibility studies and performance analysis to determine optimal SoC architectures, subsystems, and interfaces for 5G systems. Develop and review specifications, microarchitecture, and system-level design documentation for 5G-focused SoCs. Work closely with hardware and software teams to ensure successful integration and functionality of the SoCs. Drive innovation by exploring new technologies, methodologies, and industry trends relevant to 5G and SoC design. Optimize SoC designs for high data throughput, low latency, power efficiency, and other key metrics specific to 5G applications. Collaborate with customers and partners to understand their requirements and provide SoC solutions that meet their 5G connectivity needs. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in SoC design for 5G and emerging industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in SoC architecture and design, with a specific focus on 5G applications. Deep understanding of hardware and software interactions in SoCs and the unique requirements of 5G wireless systems. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints in areas such as power, performance, area, and latency. Familiarity with wireless communication protocols, such as 5G NR, mmWave, and beamforming, is highly desirable. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of driving the evolution of 5G wireless communication. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

As a SoC Architect HPC at AISemiCon, you will be responsible for designing and architecting system-on-chip (SoC) solutions optimized for high-performance computing applications. Collaborating closely with cross-functional teams, including hardware, software, and verification, you will define and implement SoC architectures that meet the unique requirements of HPC systems. We are seeking individuals who are passionate about HPC, possess deep expertise in SoC design, and thrive in solving complex challenges. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect SoCs optimized for high-performance computing applications. Conduct feasibility studies, performance analysis, and power modeling to determine optimal SoC architectures, subsystems, and interfaces for HPC systems. Develop and review specifications, microarchitecture, and system-level design documentation for HPC-focused SoCs. Work closely with hardware and software teams to ensure successful integration and functionality of the SoCs. Drive innovation by exploring new technologies, methodologies, and industry trends relevant to HPC and SoC design. Optimize SoC designs for high computational performance, memory bandwidth, power efficiency, and other key metrics specific to HPC applications. Collaborate with customers and partners to understand their requirements and provide SoC solutions that meet their HPC needs. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in SoC design for HPC and emerging industry standards. Qualifications Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in SoC architecture and design, with a specific focus on high-performance computing applications. Deep understanding of hardware and software interactions in SoCs and the unique requirements of HPC systems. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints in areas such as power, performance, area, and latency. Familiarity with parallel computing architectures, accelerators, and memory hierarchies is highly desirable. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

Join AISemiCon as a SerDes Engineer and drive the design and development of high-speed SerDes circuits for data communication. Collaborate with cross-functional teams to implement efficient and reliable SerDes architectures. We are looking for passionate individuals with expertise in SerDes design who enjoy tackling complex challenges. Responsibilities include defining and implementing SerDes architectures and collaborating with various teams. The key responsibilities for this role include, but are not limited to: Responsibilities Design of High Speed SERDES products on leading-edge technology nodes (FinFET or higher nodes) Design and development of SerDes IPs from specification (jitter budget, power budget, etc.) Interface with various engineering teams within the product line including verification, layout, validation, test, systems to successfully execute new products Participate in technical leadership of the team in the areas of circuit design and SERDES architectures. Collaborate with cross-functional teams to define and architect SerDes solutions for high-speed data communication applications. Design and develop high-speed SerDes circuits, including transmitters, receivers, equalizers, clock and data recovery (CDR), and analog front-end blocks. Conduct transistor-level design, simulation, and layout of SerDes blocks. Perform system-level verification and characterization of SerDes designs, including eye diagram analysis, jitter measurements, and link performance analysis. Work closely with the system engineering team to ensure the SerDes meets the performance requirements and specifications of the target applications. Drive innovation by exploring new SerDes techniques, circuit topologies, and emerging technologies. Collaborate with customers and partners to understand their requirements and provide customized SerDes solutions. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in SerDes design, industry standards, and emerging technologies. Qualifications (MTech/MS/PhD) with a minimum of 5-7 years of experience with High Speed SerDes analog design, and system architectures Design experience in some of the following High Speed SERDES circuit blocks: Driver, Receivers ( CTLE-DFE/ ADC based receivers ) , Phase Interpolators. Design of High Speed SERDES products on leading-edge technology nodes (FinFET or higher nodes) Design and development of SerDes IPs from specification (jitter budget, power budget, etc.) Low jitter PLL, High Speed Clock Distribution and modeling of digitally assisted analog adaptive loops Familiarity with CDR architectures Proficient at partitioning chip level requirements to specifications at the block level. Strong written and verbal communication skills. Proactive, collaborative, and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. Strong team player. Ability to function independently, be self-driven. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

As an Architect SoC Architects Automation at AISemiCon, you will be responsible for designing and architecting system-on-chip (SoC) solutions tailored for automation applications. You will collaborate closely with cross-functional teams, including hardware, software, and verification teams, to define and implement SoC architectures that meet the unique requirements of automation systems. We are seeking individuals who have a strong passion for automation, possess deep expertise in SoC design, and are excited about creating innovative solutions from scratch. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect SoCs optimized for automation applications. Conduct feasibility studies and performance analysis to determine optimal SoC architectures, subsystems, and interfaces for automation systems. Develop and review specifications, microarchitecture, and system-level design documentation for automation-focused SoCs. Work closely with hardware and software teams to ensure successful integration and functionality of the SoCs. Drive innovation by exploring new technologies, methodologies, and industry trends relevant to automation and SoC design. Optimize SoC designs for real-time processing, low-latency communication, and reliability considerations specific to automation applications. Collaborate with customers and partners to understand their requirements and provide SoC solutions that meet their automation needs. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in SoC design for automation and emerging industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in SoC architecture and design, with a specific focus on automation applications. Deep understanding of hardware and software interactions in SoCs and the unique requirements of automation systems. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints in areas such as power, performance, area, and latency. Familiarity with communication protocols, real-time operating systems, and hardware acceleration techniques for automation is highly desirable. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. We look forward to reviewing your application and discussing how you can contribute to our mission of revolutionizing automation through semiconductor technology. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

As an Architect SoC at AISemiCon, you will be responsible for designing and architecting complex system-on-chip (SoC) solutions for a range of applications, including IoT, automotive, 5G, and high-performance computing (HPC). You will collaborate with cross-functional teams, including hardware, software, and verification engineers, to define and implement SoC architectures that meet the project requirements. We are seeking individuals who have a passion for innovation and are excited about the opportunity to create products from scratch. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect SoCs for various applications, such as IoT, automotive, 5G, and HPC. Conduct feasibility studies and performance analysis to determine optimal SoC architectures, subsystems, and interfaces. Develop and review specifications, microarchitecture, and system-level design documentation for SoCs. Work closely with hardware and software teams to ensure successful integration and functionality of the SoCs. Drive innovation by exploring new technologies, methodologies, and industry trends relevant to SoC design. Optimize SoC designs for power, performance, area, and other key metrics. Collaborate with customers and partners to understand their requirements and provide SoC solutions that meet their needs. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in SoC design and emerging industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in SoC architecture and design. Expertise in one or more application domains, such as IoT, automotive, 5G, or HPC. Strong understanding of hardware and software interactions in SoCs. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints, including power, performance, area, and latency. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of shaping the future of semiconductor technology. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

As an Architect CPU at AISemiCon, you will play a vital role in designing and architecting high-performance and energy-efficient central processing units (CPUs). You will collaborate with cross-functional teams, including microarchitecture, verification, and software teams, to define and develop state-of-the-art CPU architectures. We are seeking individuals who are passionate about CPU design, have a deep understanding of microarchitecture, and enjoy solving complex challenges. The key responsibilities for this role include, but are not limited to: Key Responsibilities: Collaborate with cross-functional teams to define and architect CPU microarchitecture for next-generation semiconductor products. Conduct feasibility studies, performance analysis, and power modeling to determine optimal CPU architectures and design choices. Develop and review specifications, microarchitecture, and RTL designs for CPUs. Work closely with the design and verification teams to ensure successful implementation and integration of CPUs. Optimize CPU designs for performance, power efficiency, and area. Collaborate with software teams to ensure seamless software-hardware integration and optimize CPU performance. Explore new technologies, methodologies, and industry trends in CPU design to drive innovation and enhance performance. Provide technical guidance and mentorship to junior members of the team. Collaborate with customers and partners to understand their requirements and provide CPU solutions that meet their needs. Stay updated with the latest advancements in CPU architecture and emerging industry standards. Qualifications: Bachelor s, Master s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in CPU architecture and design. Strong understanding of microarchitecture concepts, including pipeline design, cache subsystems, branch prediction, and out-of-order execution. Proficiency in industry-standard design and verification tools. Solid knowledge of system-level trade-offs and constraints, including performance, power, area, and latency. Experience with instruction set architecture (ISA) design and optimization is a plus. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of revolutionizing semiconductor technology. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

Power Management IC Design (PMIC) More Details Power Management IC Design (PMIC) AISEMICON The Analog Design Engineer will lead the design of Power Management IC products. We are looking for a person who possesses technical expertise in DC-DC converters (Buck/Boost). Experience of Power Management IC design / knowledge of Power converters architecture is must requirement for this role. Responsibilities Development of Power Management Products with emphasis on switching converters Buck, Boost and LDO design. Knowledge of Power converter architectures Buck, Boost etc. Thorough knowledge of Analog design- OpAmp, Comparators, Bandgap References, Oscillators etc. Responsible to architecture and analysis for control loops Responsible for analog design, IC floor plan, integration and layout supervision through all stages of IC development Qualifications: Masters/PhD in Electronics/VLSI Understanding of process technologies and device behavior which are important for high voltage, high power operation and reliability issues. 5-7 years of experience. Strong written and verbal communication skills. Proactive, collaborative, and creative approach to innovation, technical development and consensus facilitation to influence optimal project results. Strong team player. Ability to function independently, be self-driven Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. Apply for this position Allowed Type(s): .pdf By using this form you agree with the storage and handling of your data by this website. *

Data Converters (ADC/DAC) and PLL More Details Data Converters (ADC/DAC) and PLL AISEMICON As a Senior Analog/Mixed-Signal Design Engineer at AISemiCon, you will play a crucial role, focusing on high-performance analog- to-digital and digital-to-analog converters and PLL. The successful candidate in this role will do architecture, transistor level design starting from initial specification, through design and layout supervision. We are seeking individuals who have a strong passion for analog and mixed-signal design, possess deep expertise in Data Converters and PLLs, and thrive in solving complex challenges. The key responsibilities for this role include, but are not limited to: Responsibilities: High-performance analog or mixed-signal IC development in advanced CMOS processes Thorough familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design techniques. Collaborate with cross-functional teams to define and architect Data Converter (ADC/DAC) and PLL solutions for high-speed data acquisition and timing generation applications. Design and develop high-performance analog and mixed-signal circuits, including Data Converters and PLLs. Conduct transistor-level design, simulation, and layout of Data Converter and PLL blocks. Perform system-level verification and characterization of Data Converter and PLL designs, including performance analysis, noise analysis, and timing verification. Work closely with the system engineering team to ensure the Data Converter and PLL designs meet the performance requirements and specifications of the target applications. Drive innovation by exploring new techniques, circuit topologies, and emerging technologies in Data Converters and PLLs. Collaborate with customers and partners to understand their requirements and provide customized solutions. Provide technical guidance and mentorship to junior members of the team. Stay updated with the latest advancements in Data Converter and PLL design, industry standards, and emerging technologies. Qualifications: 5-7 years of experience in designing high performance building block circuits such as Bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. Strong intuitive and analytical understanding of transistor-level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling, and/or synthesis of digital control blocks Familiar with Cadence schematic capture, virtuoso, Spectre and/or HSPICE circuit simulation tools MATLAB understanding would be an added advantage Deep understanding of Data Converter architectures, analog-to-digital and digital-to-analog conversion techniques, and PLL principles. Proficiency in industry-standard EDA tools for IC design, simulation, and layout. Solid knowledge of system-level trade-offs and constraints in areas such as resolution, speed, power consumption, noise, and jitter. Experience with Data Converter and PLL characterization, validation, and debugging. Excellent problem-solving, analytical, and communication skills. Ability to work effectively in a collaborative team environment. Applied Intelligence Semiconductors Private Limited (AISemiCon), an Innovative Product Enterprise is founded by seasoned semiconductor professionals, envisioned to deliver cutting edge products for the globe. At our company, we provide an innovative and collaborative workplace environment that empowers talented individuals to make a significant impact on the future of the semiconductor industry. We look forward to reviewing your application and discussing how you can contribute to our mission of advancing high-performance computing. Note: This job description provides a general overview of the responsibilities and requirements for the position and may be subject to change based on business needs. By using this form you agree with the storage and handling of your data by this website. *