Senior Staff Analog Design Engineer

6 - 11 years

8 - 13 Lacs

Posted:-1 days ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

About Marvell

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Your Team, Your Impact

Marvell s Central Engineering Group is responsible for development of range of mixed signal IPs that support Marvell s success in Datacenter, Networking, Automotive and Storage and ASIC businesses. From industry leading designs of high performance SerDes and PHY, analog front ends to IPs such as ADC/DACS, temperature sensors and PLLs, Central Engineering group delivers the essential technology behind this success.

What You Can Expect

  • Responsible for designing highly sophisticated CMOS transceivers, SERDES, Die2Die interface and essential analog IPs for AI , Datacenter and Automotive applications.
  • You will play a critical role in architectural investigations, implementing key circuits such as transmitters, receivers, analog front end, DFE, PLL, DLL, regulators, CDRs, and more, ensuring they meet stringent performance targets.
  • Responsible for design and verification of a complex analog block, work with other analog design engineers, interface with layout, verification, and application teams.
  • Implement complex analog circuits for high-speed SerDes and other IPs by understanding specs and translating them to circuits.
  • Design, optimize and verify critical circuits (PLL, DLL, ADC, regulators, TX, RX, CDRs) to meet performance targets.
  • Collaborate with cross-functional teams including architecture, layout, digital, verification and silicon bring-up/validation teams from design till product integration.
  • Drive design reviews to ensure highly reliable automotive IP development.
  • Provide guidance and mentorship to junior analog design engineers.
  • Ensure adherence to robust methodologies and design practices. Document design details and comply with best practices.
  • Always do the right thing and represent Marvell with ethics and integrity.

What Were Looking For

  • Bachelors/Masters/PhD in Electrical Engineering or a related field with 6+years of experience in analog IC design for high-speed SerDes and transceivers
  • Expertise in designing any of Tx, Rx, CDR, PLL, DLL, ADC, regulators.
  • Strong understanding of analog IC design principles and methodologies. Proven track record in delivering analog IPs.
  • Proficiency in using Cadence Virtuoso, Spectre, HSPICE, MATLAB, and other industry-standard tools for design and verification.
  • Silicon debug and interfacing with validation teams
  • A thorough understanding of the physical layout requirement and ability to perform the critical layouts.
  • Excellent communication and collaboration abilities.

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Marvell Semiconductors

Semiconductors

Santa Clara

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