1109 Dft Jobs - Page 21

Job Overview: We are seeking a skilled and motivated Embedded Engineer with hands-on experience in audio systems , ESP32/ESP8266 microcontrollers , and hardware development . The ideal candidate will be responsible for designing, developing, and testing embedded systems for IoT and audio-based applications. Key Responsibilities: Design and develop embedded firmware for ESP32/ESP8266 platforms using C/C++ or MicroPython Integrate and optimise audio input/output , including microphones, speakers, amplifiers, and audio codecs Work on real-time signal processing , voice commands, and audio playback functionalities Schematic design, PCB development, and hardware debugging for embedded systems Collaborate with cross-functional teams for prototyping and product development Interface with peripherals like I2C, SPI, UART, ADC, DAC, etc. Conduct thorough testing, validation, and troubleshooting of both firmware and hardware Maintain documentation for firmware, hardware, and testing procedures Requirements: Bachelor’s/Master’s degree in Electronics, Embedded Systems, or related field 2–5 years of hands-on experience in embedded firmware development Proficiency with ESP32/ESP8266 microcontrollers and development tools (ESP-IDF, Arduino, etc.) Experience working with audio hardware components and audio signal flow Strong understanding of digital and analog electronics Familiarity with PCB design tools (e.g., KiCad, Altium, Eagle) Solid grasp of communication protocols (I2C, SPI, UART, BLE, Wi-Fi) Debugging skills using tools like oscilloscopes, logic analysers, and multimeters Experience in power optimisation and working with battery-powered devices is a plus Good to Have: Experience with voice assistant integration or audio streaming Knowledge of FreeRTOS or other RTOS environments Exposure to manufacturing and DFM/DFT considerations Prior experience with cloud-connected IoT systems What We Offer: Opportunity to work on cutting-edge embedded and audio technologies A collaborative and learning-driven work environment Competitive salary and benefits

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Design and implementation of Interconnect for next gen SoC design. Work with System architects and IP design owners to understand requirements for optimal implementation of interconnect. Prior experience with Arteris Flexnoc/NIC/NoC will be an added advantage. RTL development including tool flows like lint, CDC and synthesis. Knowledge of standard bus protocols mandatory for efficient interconnect design. Understand timing constraints, run synthesis and deliver synthesized netlist to PD team and provide constraints support for PD teams. Provide support to SoC integration and chip level pre/post-silicon debug. Work closely with Functional verification, performance verification and emulation teams to ensure all requirements are verified in pre Silicon environments. Provide post Silicon support related to device performance to validation and SW teams. Qualifications MTech/BTech in EE/CS with hardware engineering experience of 12+ years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Ability to understand IP needs and translate to optimal Interconnect design needs. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Join us and contribute to the discovery of medicines that will impact lives! Hyderabad, India | Hybrid | Full-Time About Aganitha High-throughput experimentation, computational & data-driven modeling, and the advent of the Open Science era are fundamentally transforming research, discovery, and development across diverse industries. Aganitha is at the forefront of co-innovation with global clients, shaping next-generation R&D (aganitha.ai). While our primary client base has been in global Biopharma, we are actively expanding our collaborations into consumer brands and, in the near future, the materials design industry. As a Scientist at Aganitha, you will be instrumental in leveraging cutting-edge advances in computational chemistry, materials science, soft matter physics, AI/ML, and high-performance computing in the Cloud. You will contribute to accelerating design and development across a spectrum of applications, including but not limited to: small molecule therapeutics, biologics, gene, cell & RNA therapies within Biopharma; new product formulations for consumer brands; and novel materials for various industrial applications. You will collaborate closely with research leaders at our client organizations, identifying their needs and designing innovative solutions. Working with our internal technical and scientific teams, you will drive solutions from concept to launch and growth. You may also interact with external vendors to coordinate experimental validation of the in silico solutions developed at Aganitha. To excel in this role, you must possess a strong interest in engaging with customers to apply the latest scientific and technological advancements for R&D acceleration, thereby contributing to Aganitha’s growth. Key Responsibilities Perform advanced computational simulations (e.g., Periodic and non-periodic Quantum Mechanics, Atomistic and/or Coarse-grained variants of Molecular Dynamics, Monte Carlo, Brownian Dynamics, Langevin Dynamics, Dissipative Particle Dynamics, etc.) to understand stability, complex interactions and design principles relevant to various hard and soft matter systems e.g., inorganic/organic crystalline materials, surfactants, polymers, colloids, biomolecules, etc. Apply computational methods to materials design for various applications such as semiconductor devices, capture and storage of greenhouse gases, skin and body care formulations, excipients, etc. Conduct molecular modeling studies to investigate self-assembly phenomena and interactions between various components in the formulation of a material, such as surfactant or polymer interactions with diverse substrates (e.g., skin, hair, fabric). Interpret results from domain-specific simulations (e.g., MD, DFT) and structure the scientific data into features or descriptors—such as radial distribution functions, binding energies, surface areas, or density profiles—relevant for downstream AI/ML modeling of material properties or formulation performance. Understand, analyze, critique, and implement research papers, tailoring approaches to specific problem contexts. Develop clear and concise narratives of data-driven analyses performed using computational techniques. Effectively articulate and communicate complex domain knowledge to cross-functional teams. Participate actively in requirements gathering, design discussions, and demonstrations. Continuously learn and stay up-to-date on emerging technologies and scientific advancements in computational chemistry, materials science, and related fields—research opportunities for applying advanced computational methods to evolving industry challenges. Educational & Research Qualifications PhD, post-doctoral research, or equivalent higher studies in Computational Chemistry or Computational Physics applied to Materials Science, Polymer Science, Surfactant Science, Colloidal Chemistry, Soft Matter Physics, Fluid Dynamics, or a closely related field. Demonstrated first-hand research experience in problems in the domain of materials science, for example: Materials design for various applications such as semi-conductor devices, capture and storage of green-house gases, skin and body care formulations, excipients. Crystal structure prediction of inorganic/organic molecules Molecular/colloidal self-assembly and crystallization phenomena Interactions between various components in the formulation of a material, e.g., surfactant or polymer interactions with diverse substrates (e.g., skin, hair, fabric). Proficiency in at least one of the advanced computational chemistry methods viz. periodic and non-periodic Quantum Mechanics, Atomistic and/or Coarse-grained variants of Molecular Dynamics, Monte Carlo, Brownian Dynamics, Langevin Dynamics, Dissipative Particle Dynamics. Technical Skills Familiarity with computational chemistry packages such as Quantum Espresso, VASP, LAMMPS, PySCF, GROMACS, NAMD, CP2K, SIESTA, OpenMM, or similar. Must have a keen understanding of the interface of computer technology, high-throughput sciences, and chemistry/materials science. Added Advantages Familiarity with AI/ML methods and their application in scientific research. Expertise in computer programming (e.g., Python, C++, Fortran). Exposure to High-Performance Computing (HPC) environments and parallel computing. Soft Skills Excellent verbal and written communication skills are essential. Excellent communication skills, with the ability to distill complex scientific concepts into easily understandable insights for diverse audiences. Right attitude to collaborate effectively within a cross-functional team environment. Ability to quickly grasp new scientific domains and apply critical thinking to novel challenges. Comfortable working in a fast-paced, rapidly changing environment. Strong interest and aptitude to break down large, complex problem statements into manageable work packets.

Job Description: We are looking for a proactive and enthusiastic HR Intern to join our dynamic team in the VLSI domain . This role is ideal for someone passionate about talent acquisition, employee engagement, and learning HR practices in a fast-paced tech environment. Key Responsibilities: Assist in end-to-end recruitment for VLSI profiles (PD, STA, DFT, etc.) Coordinate and schedule interviews, follow-ups, and candidate communication Maintain and update candidate databases and application tracking sheets Support onboarding processes and documentation for new joiners Draft job descriptions, internship letters, and other HR documents Help organize internal training sessions and employee engagement activities Assist with day-to-day HR operations and policy implementation Job Types: Full-time, Fresher Pay: ₹10,000.00 - ₹15,000.00 per month Schedule: Day shift Monday to Friday Work Location: In person

Internal Job Title: Associate Principal Hardware Engineer Business: Lucy Electric Manufacturing & Technologies India Pvt Ltd Location: Halol, Vadodara, India Job Reference No: 3330 Why Us? Lucy Electric is a leader in secondary power distribution solutions with over 100 years’ industry experience. Specializing in high-performance medium voltage switchgear for utility, industrial and commercial applications, we enable the safe and reliable distribution of energy to homes and businesses worldwide. About This Role The Principal Hardware Engineer will be an integral part of the Automation Engineering team. As a key expert in hardware engineering, you will support and develop of hardware for the next generation Remote Terminal Unit (RTU) and other Lucy Automation products for Distribution Automation. Your role will involve utilizing skills, tools, and processes within the global team. The Principal Hardware Engineer will collaborate with the Project Manager, Product Manager, and other stakeholders to address hardware issues and bring the product to fruition, ensuring a successful release to end users. Responsibilities Within Our Team Analyze in design and development of hardware solutions for Automation engineering. Analyze scope and requirements, identifying and resolving hardware problems on high priority. Stay abreast of industry trends and advancements in firmware technologies, providing recommendations for improvement. Actively participate in hardware design and reviews. Support change management, testing, fault finding, prototype development, and production builds. Provide end-user support for both new and existing products. Collaborate within an agile, multi-disciplined team. Propose innovative solutions to technical challenges. Dimensions The role will eventually be based in the office, with some flexibility for remote work. Qualifications, Experience & Skills Skills: Analyze hardware scope and requirements. Experience of electronic Digital, Analog, and Power electronic design. Experience with ECAD tools for schematic capture, simulation, component selection, PCB design. Experience with tools like Cadence, ORCad, Proteus Experience in application of Design for Manufacturability (DFM) and Design for Testability (DFT) techniques. Experience in analyze in debugging and fault finding in new and existing designs. Experience in analyze of RFQ package for EMS provider and qualification of offers. Experience in EMI, EMC, Environmental, Mechanical standards, and type tests. Self-motivated, innovative, willing to pursue new technical areas and capable of working independently. Knowledge of MS Office applications, including Word, Power-Point, and Excel Desirable Knowledge: Experience to usage of test equipment like Omicron test set, Multimeter, Oscilloscope and maintenance of laboratory equipment  Experience of project/task planning Experience in using debuggers, simulators, and oscilloscope.  Safety critical hardware principles Electrical distribution systems Knowledge of MV distribution systems and switchgear Qualifications: Candidate should have a good degree in a relevant subject (Hardware Engineering or equivalent) and possess 16 to 20 years of hands-on engineering experience. Principal Hardware Engineer at Lucy Electric is innovative, flexible, methodical, patient, logical, enthusiastic, and open to new ideas. He/she will work in teams and enjoy learning and share knowledge. Does this sound interesting? We would love to hear from you. Our application process in quick and easy. Apply today!

Role & responsibilities Please interested candidate send me cv :galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Industry: SEMICON Position Name DFT MBIST Engineer Position type: Permanent Total Exp: 3 to 5 Years HBTS Budget: Open No of Position: 1 Notice Period: Immediate to 15days Work Location: Hyderabad Job Description Must have: "The person is responsible for ensuring the integrity of a design by analyzing signal connectivity, specifically related to Design for Testability (DFT) features, utilizing Spyglass tools to identify and report potential violations within the test logic. Expertise should include and not limited to the following Strong understanding of digital circuit design principles and timing analysis concepts Experience with RTL design, synthesis Proficiency in scripting languages like TCL, Perl, or Python for automation Excellent problem-solving and debugging skills Strong communication and teamwork abilities to collaborate with cross-functional teams " AMD (Dont Share AMD Profiles) Preferred candidate profile

Role & responsibilities Please interested candidate send me cv :galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Position Name VLSI MBIST Engineer Position type: Permanent Total Exp: 4-8 years HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore South Job Description Must have: We are seeking a skilled VLSI MBIST Engineer with approximately 4 years of experience, specialized in Memory Built-In Self-Test (MBIST) methodologies. The ideal candidate will have hands-on experience with Synopsys SMS tool and be proficient in MBIST pattern generation, fault simulation, and test development for various embedded memories in ASIC/SoC designs. Requirements Key Responsibilities: Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) using Synopsys SMS tool. Create MBIST test infrastructure and collaborate with design teams to integrate MBIST macros into SoC designs. Perform fault modeling, fault simulation, and analysis to ensure high fault coverage and test quality. Validate MBIST patterns through simulation and silicon validation. Debug MBIST failures at both pre-silicon and post-silicon stages and provide root cause analysis. Work closely with RTL designers, physical design, and test teams to optimize MBIST architecture and test flows. Generate MBIST test reports, documentation, and provide design-for-test (DFT) reviews. Stay updated with latest MBIST methodologies and industry trends. Required Skills & Qualifications: Bachelors/Master’s degree in Electronics, Electrical Engineering, VLSI, or related field. Minimum 4 years of experience in MBIST engineering for ASIC/SoC designs. Strong knowledge of MBIST architectures, memory testing algorithms, and fault models. Hands-on experience with Synopsys SMS tool for MBIST pattern generation and validation. Familiarity with other DFT tools and methodologies is a plus. Proficient in scripting languages such as TCL, Perl, or Python for automation of MBIST flows. Good understanding of digital design and RTL coding (Verilog/SystemVerilog). Experience with simulation tools (ModelSim, VCS, etc.) and testbench development. Strong analytical and problem-solving skills with attention to detail. Good communication skills and ability to work in a team environment. Preferred Skills: Experience with other memory test tools or DFT tools like Tessent. Knowledge of ATPG and other DFT methodologies. Exposure to silicon bring-up and failure analysis. Familiarity with industry standards such as IEEE 1149.1 (JTAG), IEEE 1500. AMD (Don’t Share AMD Profiles) Preferred candidate profile

Hi All, We have immediate hiring for DFT Engineers for HYD Location. Exp - 5+ yrs Location - HYD NP - immediate to 15 days max JD - DFT, DFT Architecture, ATPG Interested candidates, Kindly me your profile to anand.arumugam@modernchipsolutions.com

We are seeking a talented and detail-oriented Physical Backend Design Engineer to join our IC (Integrated circuit) development team. The role involves key aspects of physical design, including automated place and route, floorplanning, clock tree synthesis (CTS), static timing analysis (STA), power analysis, and physical verification (DRC/LVS). The ideal candidate will have a strong knowledge of physical design methodologies, experience with industry-standard tools, and a passion for delivering high-quality semiconductor solutions. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters preferred) 3+ years of experience in physical backend design for ICs. Complex chip designs through all stages of physical implementation Experience with tape-out of designs for advanced nodes is highly desirable Strong knowledge of physical design concepts, including place and route (PnR), clock tree synthesis (CTS), static timing analysis (STA) and power grid design Experience with physical verification tools like Cadence Pegasus or Mentor Calibre Familiarity with parasitic extraction tools (e.g., StarRC, Quantus, Calibre xRC) Scripting skills in Python, Tcl, Perl, or Shell for automation Required ToolsCadence Innovus, Cadence Quantus, Cadence Tempus, Cadence Pegasus suite It would be nice if you also had: Experience with advanced process nodes (e.g., 7nm and below) Knowledge of low-power design techniques, such as multi-Vt, multi-Vdd, or clock gating Familiarity with DFT concepts and tools, Chip packaging and thermal analysis considerations, FinFET technology and 3D IC design methodologies Perform floorplanning, partitioning, and optimization to achieve area, power, and performance targets. Execute automated place and route (PnR) using industry-standard tools to generate physical layouts. Implement clock tree synthesis (CTS), ensuring low skew and efficient clock distribution. Conduct static timing analysis (STA) to verify timing closure and ensure the design meets performance requirements. Perform power analysis, including IR drop and electromigration (EM) checks, to optimize power distribution networks. Conduct physical verification tasks, including design rule checks (DRC) and layout vs. schematic (LVS) checks, to ensure manufacturability and compliance with foundry standards. Collaborate with design, verification, and DFT teams to resolve physical design challenges and improve chip performance. Work closely with foundry teams to address process technology issues and implement best practices.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities BE/BTECH/ME/MTECH Or Equivalent Degree Job Description Sr. Design Verification engineer with strong high-speed interface experience ( UCIe ,PCIe, CXL, Ethernet, NVMe,). 2+ years DV experience. Strong with UVM and SV. Responsibilities Develop test plans, tests , and verification infrastructure for complex IP’s/sub-system/SOC’s. Create verification environment using UVM methodology. Create reusable bus functional models, monitors, checkers, and scoreboards. Drive functional coverage driven verification closure. Work with architects, designers and DFT teams. Skill Sets BTech/ MTech with 2-7 years of experience. Or Equivalent IP/Sub-system/SOC level verification experience. Expert in developing test bench/test case using System Verilog & UVM. Experience with code coverage, functional coverage & assertions is desired. Experience in the following areas: UCIE or PCIE Bus protocols (AXI/AHB/APB) Exposure to industry standard verification tools for simulation and debug Good debugging and problem-solving skills. Good communication skills We’re doing work that matters. Help us solve what others can’t.

Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics. Job Description Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste Requirements 7+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with power management IC testing would be a plus Familiarity with ATE tester platforms (eg. Teradyne J750, Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as PDF Exensio, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment Qualifications EDUCATION: BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics. Job Description Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste Requirements 7+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with power management IC testing would be a plus Familiarity with ATE tester platforms (eg. Teradyne J750, Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as PDF Exensio, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment Qualifications BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Manage multiple new products through their full product lifecycle, Product Compliance to Sustainment of production released parts Generate Characterization, Qualification, Bench-to-ATE Correlation and Test Limit plans for new products based on REA guidelines and JEDEC standards Drive measurements/data collection and statistical analysis for Characterization, Qualification, Correlation, Production Test Limit setting, and any other specialized testing for datasheet parameters Cost reduction via yield improvement and test time reduction from safe launch study at both NPI and MP stage. Excursion management (Low yield and RMAs) and MRB lot disposition. Work with DE/TE team to design and implement production test solutions. Continually look for opportunities to improve the NPI process. Focus areas include streamlining Test, Qualification and Characterization plans and strategies, reducing documentation overhead, and leveraging NPI efficiencies such as Qualification by Similarity (QBS) Be a mentor to junior Product Engineering team members to accelerate their technical and career growth Contribute technical expertise to business critical projects as required to advance MID (Memory Interface Division) business objectives Qualifications Preferred with 10+ years experience from Product Engineer, Quality Engineer, Test Engineer, Validation Engineer and FA Engineer in fabless. Deep knowledge of Digital / Analog Product Characterization Technique. Hands-on experience to work on Characterization Plan, PVT test, Report. Strong statistical data analysis background for NPI/MP products. Hands-on experience from PDF (TIBCO Spotfire, Exensio), JMP, Galaxy Examinator,VB, etc. Strong working knowledge of Product / Package Qualification Process. Hands-on experience from HTOL / ESD / LU / HTS / TC / ELFR / UHAST / Endurance / Retention, etc. Experienced in ATE testing on V93K (PS1600 /PS9G/PSSL) ATE testers in CP/FT test. Hands-on experience from ATE test debug analysis with Test program , STDF, datalog, etc. Experienced in Bench testing of Electrical Characteristics, Tx/Rx Jitter, Eye Diagram for Memory Interface Products (RCD, DB, TS, SPD, etc) Familiar with Digital / Analog Product DFT / DFM method. JEDECT Spec and Product Datasheet. Deep knowledge of CMOS Process in HKMG / FINFET process. Ability to manage complex projects in parallel and on schedule . Preferred with Project Management experience. Solid organizational skills with attention to detail for risk management Good communication / reporting skills Self-motivated to work independently and in a team environment with project teams from different regions / timezones High energy, driven-to-succeed personality in fast pace environment Experience working with databases and creating regular reports Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: RTL Lead Engineer Location: Mysore Work Type: Onsite Job Type: Full time Job Description: Strong proficiency in Verilog and SystemVerilog, with experience in designing finite state machines (FSMs), clocking, reset strategies, and bus architectures. Capable of developing microarchitecture from specification to RTL, including block and subsystem design, as well as thorough documentation. Skilled in RTL debugging, with working knowledge of synthesis processes and timing closure. Familiar with industry protocols and integration, such as AXI, APB, AHB, PCIe, SoC integration, design-for-test (DFT), and power domain management. Good to Have Skills: Experience with scripting and automation using Python, Tcl, or Perl to streamline design flows. Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, AMS integration, UPF-based low-power design, post-silicon debugging, and a proactive approach to automation TekWissen® Group is an equal opportunity employer supporting workforce diversity.

Key Responsibilities: Operate FBE coating equipment as per standard operating procedures (SOPs). Monitor and control pre-heating, powder spray, curing, and cooling stages of the coating process. Ensure correct pipe surface preparation including cleaning, blasting, and inspection before coating. Apply coating thickness checks and perform holiday (defect) detection tests. Record operational data including temperatures, coating thickness, and line speed. Identify and troubleshoot equipment malfunctions or coating defects. Assist in maintenance and calibration of coating equipment. Ensure adherence to HSE (Health, Safety & Environment) standards during operation. Support QA/QC teams during inspections and audits. Maintain cleanliness and organization of the work area. Qualifications: High school diploma or ITI / Diploma in Mechanical, Industrial, or related field. 13 years of experience as an FBE Operator or in a pipe coating environment (preferred). Knowledge of FBE coating process and associated equipment. Key Skills: Understanding of FBE coating principles, surface preparation, and quality control methods. Familiarity with measuring tools such as DFT gauges, thermometers, and holiday detectors. Ability to read and follow work instructions and technical specifications. Strong safety awareness and teamwork skills. Willingness to work in shifts and physically demanding environments.

BENGALURU, KARNATAKA, INDIA FULL-TIME HARDWARE ENGINEERING 3559 Waymo is an autonomous driving technology company with the mission to be the most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo One, a fully autonomous ride-hailing service, and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over one million rider-only trips, enabled by its experience autonomously driving tens of millions of miles on public roads and tens of billions in simulation across 13+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. In this hybrid role, you will report to an ASIC Design Manager This position will require the ability to work some hours that align with the team in the Pacific Daylight Time (PDT) zone on an as needed basis. You will: Participate in the Physical Design of advanced silicon for our self-driving cars. Contribute to the design and closure of the full chip and individual blocks from RTL-to-GDS with a focus on block ownership. Collaborate with internal logic and internal and external PD teams to achieve the best PPA possible. This includes conducting feasibility studies for new microarchitectures as well as optimizing runs for finished RTL. You have: 5+ years of experience on PD design tasks in advanced silicon nodes with a minimum of 2 tapeouts. Expertise in owning a complex, computation heavy, high frequency block from RTL-to-GDS with a focus on Synthesis and Placement but knowledge and experience with all tasks. Deep knowledge of timing constraints with a demonstrated ability to generate, maintain, and verify SDC files. Proficient in scripting with demonstrated facility in TCL and Python. Excellent verbal and written communication skills and demonstrated capability to work under tight schedule. We prefer: Experience with CTS and an understanding of routing for both CTS and general timing closure. Experience working with external partners on PD closure. Understanding of DFT, especially MBIST. Understanding of different memory types and their tradeoffs and experience with custom and structured memories. Deep understanding of performance, power and area (PPA) tradeoffs. Strong experience with back end flows (PI/SI, DRC/LVS, etc). May require infrequent travel to Mountain View, CA or to partner sites (Up to 15%) The expected base salary range for this full-time position is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range ₹5,500,000—₹6,650,000 INR

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair equipment as needed e. Allocates modules for testing and verification and reviews data and project documentation f. Provides guidance on technical escalations and review regression testing data g. Prepares documentation containing information such as test case and product scripts for IP and publishes it to the client for feedback and review h. Ensures all project documentation is complete and uploaded as per technical specifications required by the client 2. Provide customer support & governance of VLSI components & hardware systems a. Identify and recommend system improvements to improve technical performance b. Inspect VLSI components & hardware systems to ensure compliance with all applicable regulations and safety standards c. Be the first point of contact to provide technical support to client and help debug specific, difficult in-service engineering problems d. Evaluate operational systems, prototypes and proposals and recommend repair or design modifications based on factors such as environment, service, cost, and system capabilities 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Deliver No. Performance Parameter Measure 1. Verification Timeliness, Quality and coverage of verification, Compliance to UVM standards, Customer responsiveness 2. Project documentation and MIS 100% on time MIS & report generation Complete Project documentation (including scripts and test cases) 3. Team % trained on new skills, Team attrition %, Employee satisfaction score (ESAT) Mandatory Skills: VLSI Design For Testability - DFT. Experience5-8 Years.

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair equipment as needed e. Allocates modules for testing and verification and reviews data and project documentation f. Provides guidance on technical escalations and review regression testing data g. Prepares documentation containing information such as test case and product scripts for IP and publishes it to the client for feedback and review h. Ensures all project documentation is complete and uploaded as per technical specifications required by the client 2. Provide customer support & governance of VLSI components & hardware systems a. Identify and recommend system improvements to improve technical performance b. Inspect VLSI components & hardware systems to ensure compliance with all applicable regulations and safety standards c. Be the first point of contact to provide technical support to client and help debug specific, difficult in-service engineering problems d. Evaluate operational systems, prototypes and proposals and recommend repair or design modifications based on factors such as environment, service, cost, and system capabilities 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Deliver No. Performance Parameter Measure 1. Verification Timeliness, Quality and coverage of verification, Compliance to UVM standards, Customer responsiveness 2. Project documentation and MIS 100% on time MIS & report generation Complete Project documentation (including scripts and test cases) 3. Team % trained on new skills, Team attrition %, Employee satisfaction score (ESAT) Mandatory Skills: VLSI Design For Testability - DFT. Experience5-8 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Design For Testability - DFT. Experience3-5 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Deliver No. Performance Parameter Measure 1. Verification Timeliness Quality of Code/ Number of defects Customer responsiveness Project documentation (scripts, test cases etc) 2. Self-development Skill test for next level clearance on Trend Nxt Mandatory Skills: VLSI Design For Testability - DFT. Experience3-5 Years.

Forza Silicon is a Business Unit in the Materials Analysis Division of AMETEK, Inc. Forza s history begins at the formation of the CMOS imaging industry where company co-founders, Barmak Mansoorian and Daniel Van Blerkom were a critical part of the Photobit team. Along with Photobit Co-founder, Dr. Eric Fossum, and many others, the team pioneered the development of CMOS imaging technology. Founded in 2001, Forza Silicon has established itself as an innovator and industry leader in the field of mixed-signal IC and CMOS imaging designs that have set the standard of the possible. Primarily through long standing customer relationships and partner referrals, Forza Silicon has grown to where today the company employs one of the industry s largest and most experienced independent CMOS imaging engineering teams. To learn more about Forza Silicon, please go to www.forzasilicon.com Postition Summary: This position will involve all phases of a design project, including specification and architectural design, detailed digital block design, simulation, verification, and design bring-up and test. This role involves collaborating with cross-functional teams to ensure that the design meets specifications. The candidate will also be expected to interface with customers to communicate specifications, design status, technical details, etc. Primary Responsibilities: Work with customers to understand sensor requirements, translate requirements to detailed specifications, and develop sensor architecture to ensure specifications are met. Work collaboratively with a team of engineers to execute design according to technical specification and schedule in an efficient manner. Design architecture and RTL coding of digital blocks, with complex operating modes. Participate in design verification, chip bring-up, and debugging in the lab by writing scripts, analyze data, and propose experiments, etc. Create and maintain detailed documentation of design processes, methodologies, and best practices. Participate in technical reviews with design team and customer. Able to work independently and collaborate with local technical lead. Work with test engineers to facilitate development of test hardware, test plans, and participate in block level bring-up and characterization efforts and results. Position Requirements Bachelor s or master s degree in electrical engineering, computer engineering, or a related field. 3-5 years of experience in RTL design, mixed signal concepts, and verification, with a strong understanding of the entire ASIC design flow. Strong knowledge of digital design principles, front-end tools, clock design, datapath, timing analysis of CMOS digital circuits, Verilog, SystemVerilog. Strong knowledge of FPGA design, firmware development for test systems, and high-speed data transmission. Working knowledge of synthesis, static timing, DFT is a plus. Proficiency in scripting languages such as Perl, Python, or Tcl for automation. Excellent problem-solving abilities, with a keen eye for detail and a methodical approach to debugging and optimization. Effective communication skills, with the ability to collaborate with cross-functional teams and present technical information clearly. Ability to adapt to new tools, technologies, and methodologies, staying current with industry trends and advancements.

Forza Silicon is a Business Unit in the Materials Analysis Division of AMETEK, Inc. Forza s history begins at the formation of the CMOS imaging industry where company co-founders, Barmak Mansoorian and Daniel Van Blerkom were a critical part of the Photobit team. Along with Photobit Co-founder, Dr. Eric Fossum, and many others, the team pioneered the development of CMOS imaging technology. Founded in 2001, Forza Silicon has established itself as an innovator and industry leader in the field of mixed-signal IC and CMOS imaging designs that have set the standard of the possible. Primarily through long standing customer relationships and partner referrals, Forza Silicon has grown to where today the company employs one of the industry s largest and most experienced independent CMOS imaging engineering teams. To learn more about Forza Silicon, please go to www.forzasilicon.com Postition Summary: This position will report to the engineering manager and assume engineering responsibility to plan, manage, and oversee detailed sensor design and analysis for custom CMOS image sensors. This position will involve all phases of a design project, including specification and architectural design, detailed circuit design, simulation, layout, verification, and design bring-up and test. The candidate will also be expected to interface extensively with customers and external vendors to communicate specifications, design status, technical details, etc. Primary Responsibilities: Oversee all phases of sensor design: specification, design and tapeout, test, transition to product. Work with customers to understand sensor requirements, translate requirements to detailed specifications, and develop sensor architecture to ensure specifications are met. Work collaboratively with a team of engineers to execute design according to technical specification and schedule in an efficient manner. Perform detailed circuit analysis, design, simulation, layout, verification of mixed-mode circuits Interface with foundry partners to understand process details in support of design implementation, manage pixel design and performance, and oversee tapeout and fabrication. Work with test engineers to facilitate development of test hardware, test plans, and oversee chip bring-up and characterization efforts and results. Position Requirements B.S. in Electrical Engineering (M.S./Ph.D. preferred) 6-8 years of experience in practical analog/mixed signal design for image sensors or other relevant areas. Expert at transistor level circuit design, simulation, verification using modern EDA tools from Cadence, Siemens, Synopsys, etc. Knowledgeable in ADC architectures for image sensor readout Relevant experience with bandgaps, bias, op-amps, switched-cap circuits, LDOs, PLL, SERDES, high-speed TX, general feedback, and compensation techniques. Expert in noise analysis, transistor/capacitor matching and sources of errors in analog integrated circuits. Experienced in all stages of mixed-signal chip design (preferably in the context of image sensors) flow including DFT, timing analysis, top chip integration and tapeout, and silicon bring up. Experience leading a design team is highly preferred. Excellent communication skills are required.

We require DFT Engineers with 5-7 yrs who is having ATPG Experience

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities: The role s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications: BE/BTech/ME/MTech- Computer Science or others Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We re doing work that matters. Help us solve what others can t.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Physical design for high-performance designs going into industry leading CPU and AI/ML architecture. The person coming into this role will be involved in all implementation aspects from synthesis to tapeout for various IPs on the chip. The work is done alongside a group of highly experienced engineers across various domains of the AI chip. This role is hybrid, based out of Bangalore. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities Define PD requirements by working closely with the front-end team, understand the chip architecture and drive physical aspects early in the design cycle Physical design tasks including such as synthesis, PnR, timing closure, area improvement, floorplanning, clocking, I/O planning and power optimization Discussions with 3rd party IP providers, foundry partners and design services End to end tasks from flow development to sign-off Deploy innovative techniques for improving power, performance and area of the design, drive experiments with RTL, and evaluate synthesis, timing and power results Experience & Qualifications BS/MS/PhD in EE/ECE/CE/CS Hands-on experience with synthesis, block and chip level implementation with industry standard PnR flows and tools Strong experience in SOC/ASIC/GPU/CPU design flows on taped out designs, expertise in timing closure at block/chip levels and ECO flows Experience with back-end design tools such as Primetime, Innovus, RedHawk, etc. Knowledge of low-power design flows such as power gating, multi-Vt and voltage scaling Strong programming skills in Tcl/Perl/Shell/Python Excellent understanding of logic design fundamentals and gate/transistor level implementation Exposure to DFT is an asset Prior experience working on high performance technology nodes and understanding of deep sub-micron design problems/solutions Strong problem solving and debug skills across various levels of design hierarchies Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government. As this position will have direct and/or indirect access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and supporting documentation will be required and considered as a condition of employment. If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.