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For Employers

DFT leads

Smart Soc Solutions

5 - 10 years

0 Lacs

hyderabad bengaluru

Posted:1 month ago| Platform:

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Skills Required

scan insertion dft jtag atpg mbist

Work Mode

Work from Office

Job Type

Full Time

Job Description

Key Responsibilities:- DFT Architecture Definition: Develop and implement DFT architectures, including MBIST, scan insertion, and JTAG.

- Test Pattern Generation: Generate test patterns and simulate with and without timing annotation.

- Test Coverage Analysis: Analyze test coverage and optimize test strategies.

- Collaboration: Work closely with cross-functional teams, including IC design, verification, and product engineering.

- Scripting and Automation: Develop scripts for automatic scan insertion, ATPG, and pattern generation using languages like Perl, Python, or Tcl.

Requirements:- Experience: 5+ years of experience in DFT, MBIST, scan insertion, ATPG, and JTAG.

- Technical Skills: Proficiency in EDA tools like Synopsys DFTMAX, TetraMAX, Mentor Graphics Tessent, and Cadence NCSIM.

- Knowledge: Strong understanding of digital circuit design, verification, and test methodologies.

- Programming Skills: Familiarity with scripting languages like Perl, Python, or Tcl, and programming languages like C/C++.

- Analytical Skills: Strong analytical, problem-solving, and communication skills.Role & responsibilities

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Smart Soc Solutions

IT Services and IT Consulting

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DFT leads