2311 Dft Jobs - Page 15

Full Time Job (8 Hours) Ahmedabad Gujarat India QA/QC Engineer | TATA Project – Ahmedabad Oil and Gas Job Description Urgent Requirement | TATA Project – Ahmedabad Position: QA/QC Engineer Location: Ahmedabad Qualification: Diploma (Mechanical) / BE (Mechanical) Experience: 8–10 Years (Projects – Structural) Salary: ₹50,000 – ₹60,000 CTC + Travel Conveyance + Accommodation (Laptop & Food under candidate scope) Apply Now Rutvi – 9909342220 it.royalstaffing@gmail.com ✅ Mandatory Certification: NDT Level II (LPT, MPT, UT, RT) ✅ Preferred Experience: PEB Factories, Industries, Warehouses, Powerplants, Refineries, Cleanrooms, DataCentress Key Responsibilities: Good experience in inspecting and te...

Research & Design Engineer - Parcel Pioneer your career! Koerber is the home for passionate people who innovate, collaborate, and love what they do. Entrepreneurial spirit is our joint DNA. We develop future technologies and support talents to deploy their skills and reach their full potential. Together, we aim to be the first to do the right thing at the right time. Join the home for entrepreneurs! About the Role: We are seeking a dynamic and technically competent Project Manager – Product Development to lead the end-to-end development of advanced warehouse automation and robotic solutions . The role involves managing new product development (NPD) and VAVE projects, based on frugal approach...

Hi All, Greetings from Eximietas...! Position: Senior DFT Engineers/Leads/Architects. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugg...

Role Overview: You will be part of the Client Development Group (CDG) as a Design for Test engineer, responsible for developing logic design, RTL coding, simulation, DFT timing closure support, test content generation, and delivery to manufacturing for various DFx content. Your role will involve participating in the definition of architecture and microarchitecture features of the block, subsystem, and SoC under DFT being designed. You will apply various strategies, tools, and methods to write and generate RTL and structural code to integrate DFT. Additionally, you will optimize logic to qualify the design for power, performance, area, timing, and design integrity for physical implementation....

Job Requirements At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster. In depth knowledge of DFT concepts In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, ...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to ...

Full Time Job (8 Hours) Ahmedabad Gujarat India QA/QC Engineer | TATA Project – Ahmedabad Oil and Gas Job Description Urgent Requirement | TATA Project – Ahmedabad Position: QA/QC Engineer Location: Ahmedabad Qualification: Diploma (Mechanical) / BE (Mechanical) Experience: 8–10 Years (Projects – Structural) Salary: ₹50,000 – ₹60,000 CTC + Travel Conveyance + Accommodation (Laptop & Food under candidate scope) Apply Now Rutvi – 9909342220 it.royalstaffing@gmail.com ✅ Mandatory Certification: NDT Level II (LPT, MPT, UT, RT) ✅ Preferred Experience: PEB Factories, Industries, Warehouses, Powerplants, Refineries, Cleanrooms, DataCentress Key Responsibilities: Good experience in inspecting and te...

Role Overview: You will be responsible for implementing Design for Test (DFT) techniques to ensure the quality and reliability of semiconductor products. Your primary focus will be on areas such as JTAG, ATPG, logic diagnosis, Scan compression, and MBIST/LBIST. Additionally, you will be involved in Tessent based ATPG flow, GLS, and Post-silicon-debug. Your expertise in Perl/Tcl/Python scripting will be crucial for this role. Key Responsibilities: - Utilize your strong fundamental knowledge of DFT techniques to perform Core and SOC level ATPG, ensuring Automotive grade quality. - Engage in hierarchical ATPG retargeting and Pattern release for application on ATE. - Conduct SOC and Core level T...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Analyse customer requirements, legal regulations and internal specification to be applied in Testing strategies of products Develop EOLT specifications for new equipments (Hardware & Software) Design and develop complex test programs, process and systems to measure product functionality and integrality in the electrical and programming domains Analyse test cases and failure, providing scenarios and proposing actions based on results Checks product SW and Test Methodology/Coverage during DFT Design Review, with R&D interaction May make himself some functional Tester software development and improvements Checks the Functional Testers development (review of technical issues and planning) Work w...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

We are looking for a Senior Electronics Hardware Engineer in the team. In this role, candidate is expected to have a hands-on experience in hardware design and development of digital and analogue electronics; analogue and mixed domain circuits solutions. As a core member of Electronics system design team you will drive microprocessors/ micro controllers, SoC / SoM based processing unit design and peripheral interface control, power electronics for power supply, power distribution and battery charging management, BMS and embedded systems board bring-up, integration, functional and environmental qualification. Core Responsibilities Design and develop electronics hardware platform for multiple ...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

As an RTL Architect SERDES at Ambit Semiconductors Private Limited, you will play a crucial role in defining and owning the RTL architecture for high-speed and many lanes SERDES IPs. Your responsibilities will include leading RTL design, coding, and integration of SERDES blocks, collaborating with various teams for seamless integration, driving micro-architecture development, and supporting post-silicon validation efforts. Additionally, you will mentor junior engineers and provide technical leadership in design reviews. Key Responsibilities: - Define and own the RTL architecture for high-speed and many lanes SERDES IPs. - Lead RTL design, coding, and integration of SERDES blocks. - Collabora...

As a PMTS SILICON DESIGN ENGINEER at AMD, you will play a crucial role in developing and implementing advanced DFT IP and design methodologies for complex SoCs/ASICs. Your deep technical expertise in DFT architecture and strong leadership skills will be essential in driving execution, mentoring engineers, and ensuring high-quality, testable designs. Here's what you will be responsible for: - **Team Leadership & Management** - Lead and mentor a team of DFX engineers, fostering technical excellence, innovation, and collaboration. - Manage project priorities, schedules, and deliverables to meet program milestones. - Recruit, train, and develop engineering talent. - **DFT Strategy & Execution** ...

Job Summary: We are seeking a highly experienced Senior Physical Design Engineer with over 10 years of experience in the RTL to GDS flow. This full-time role will be based in Bangalore Karnataka. The ideal candidate will possess strong scripting skills, have hands-on experience with 3nm, 5nm nodes, and have a proven track record in physical design. Key Responsibilities Physical design efforts from RTL to GDS, ensuring high-quality and timely delivery of projects Perform floorplanning, placement, clock tree synthesis (CTS), routing, and physical verification Develop and maintain scripts for automation of physical design tasks, improving efficiency and reliability Collaborate with RTL designer...

We are looking for a detail-oriented and skilled PCB Designer to develop high-quality printed circuit board layouts for electronic products. The ideal candidate should have knowledge of schematic design, component placement, routing, and generation of manufacturing files. Key Responsibilities: Create schematic diagrams and PCB layouts using tools like Altium Designer / KiCAD / Eagle / OrCAD / EasyEDA Optimize component placement and routing for electrical performance and manufacturability Generate Gerber files, BOM, and fabrication drawings for PCB manufacturing Collaborate with hardware engineers for design verification and testing Review and implement design rules for DFM (Design for Manuf...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

As a DFT Lead, you will be responsible for defining, developing, and implementing Design-For-Test (DFT) methodologies for high-performance LiDAR SoCs. You will own DFT planning, insertion, verification, and validation, and collaborate with RTL, Physical Design, IP vendors, and ASIC partners to ensure proper DFT implementation. The role includes supporting post-silicon bring-up, silicon debug, yield improvement, and creating/maintaining documentation and DFT guidelines. You will ensure robust test strategies for automotive-grade SoCs with focus on reliability, quality, and compliance. Location-Remote, Delhi NCR, Bangalore, Chennai, Pune, Kolkata, Ahmedabad, Mumbai, Hyderabad

Analyse customer requirements, legal regulations and internal specification to be applied in Testing strategies of products Develop EOLT specifications for new equipments (Hardware & Software) Design and develop complex test programs, process and systems to measure product functionality and integrality in the electrical and programming domains Analyse test cases and failure, providing scenarios and proposing actions based on results Checks product SW and Test Methodology/Coverage during DFT Design Review, with R&D interaction May make himself some functional Tester software development and improvements Checks the Functional Testers development (review of technical issues and planning) Work w...

Strong experience in Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs Job Description In your new role you will: Implement high-performance, low-power, and area-efficient digital designs. Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. Optimize designs for power, performance, and area, and meet PPA goals. Power analysis using PT-PX or equivalent flow. Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirement Your Profile You are best equipped for this task if you have: Strong fundamentals and experi...