2311 Dft Jobs - Page 16

Key Responsibilities Develop and validate PCB libraries in line with organizational standards. Perform schematic capture and ensure design correctness. Execute component placement considering electrical, DFA, and DFM constraints. Develop power split plans and ensure robust design for power delivery. Carry out PCB routing with controlled impedance and length-tuning as required. Handle the complete post-Gerber process with fabrication and assembly readiness. Define and calculate layer stack-ups for various board designs. Work with HDI technologies, including blind/buried vias and high-speed peripherals. Apply DFX guidelines during design and carry out validation reviews. Ensure compliance with...

About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System-on-Chip (SoC) solutions. As a key technical skill, you will drive the SoC Architecture, Design, and integration of complex digital systems , collaborating with cross-functional teams to deliver next-generation semiconductor products. Key Responsibilities: Define and review SoC architecture and design specifications . Develop high-quality RTL which is synthesizable using Verilog/SystemVerilog. Ensure robust design methodologies, including lint, CDC, RDC and FC-Elab . Drive Cross-Functional Collaboration: Partner with SoC Design, Verification, Validation, DFT, Physical...

- Own Subsystem level STA , providing direction and guidance to PnR team for Timing closure & Synthesis report analysis. - Work with IP & Design team for Timing constraints Development & Review activities. - Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs. - Collaborate with cross-functional teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing performance. - Drive the development and maintenance of STA scripts and tools to automate and streamline timing analysis processes. - Conduct thorough timing analysis, identify critical paths, and develop strategie...

Ownership: End-to-end ownership of one or more subsystems or SoC verification flows, including planning, execution, and closure Mentorship: Experience mentoring junior and mid-level engineers, reviewing their test plans, code, and coverage. Define verification strategy, create detailed test plans, and develop robust test benches for SoC verification. Collaborate with architects, RTL designers, and pre- and post-silicon verification teams to ensure end-to-end verification coverage. Develop and run UVM/SystemVerilog-based verification environments. Write, run, and debug C-based tests on SoCs; processor and embedded software knowledge is a must. Define and achieve functional and code coverage g...

Emulation Platform Strategy & Execution Lead the definition, bring-up, and support of emulation builds using Cadence Palladium and Protium platforms. Evaluate and drive adoption of next-generation emulation hardware. Promote and expand emulation usage across ASIC and firmware teams, including simulation acceleration for DFT and UPF low-power simulation. FPGA Infrastructure Management Maintain and support local FPGA hardware installations to enable a robust and scalable FPGA farm. Act as a liaison for lab health and configuration between different sites. Develop and manage outsourcing capabilities Global Firmware Support Provide firmware end-user support for programs staffed in the APEC regio...

Join SanDisk India as a Technical ASIC Project Leader and take charge of developing cutting-edge ASICs that power the next generation of SD cards for imaging, gaming, mobile, and data storage. This is a high-impact leadership role where your technical expertise and strategic vision will drive projects from concept to mass production. Key Responsibilities: Lead Full-Cycle SoC Development: Own the end-to-end development of high-performance ASIC controllers, from architecture definition to production ramp-up. Translate Product Vision into Technical Execution: Collaborate with product, firmware, and system teams to define ASIC requirements aligned with SanDisk s storage solutions. Drive Cross-Fu...

Qualifications Required Skills/Experience: B.E/B.Tech with 20+ years of experience in SoC verification/post silicon debug Excellent design and verification concepts Experience in C based SoC verification and methodologies Experience in PCIe transport and link layers and/or NVME architecture The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Self-motivated and self-directed, however, must have demonstrated ability to work well with people A proven desire to work as a team member, both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multi-task and meet deadline Excellent communicatio...

Define verification strategy, create detailed test plans, and develop robust test benches for SoC verification. Collaborate with architects, RTL designers, and pre- and post-silicon verification teams to ensure end-to-end verification coverage. Develop and run UVM/SystemVerilog-based verification environments. Write, run, and debug C-based tests on SoCs; processor and embedded software knowledge is a must. Define and achieve functional and code coverage goals; track and close coverage gaps. Run, debug, and sign off gate-level simulations with SDF annotation. Develop and validate functional patterns for ATE (Automatic Test Equipment). Debug complex issues across multiple domains (digital logi...

Position- QA Engineer Email - punejob2025@gmail.com Contact - 9356395439 Experience : 3- 8 years. Salary: depend upon interview Education :- BE Mechanical./ DME / Production / Chemical Preferred candidate profile Quality Assurance management. Blasting and Painting QA . Paint Inspection RAL Codes and DFT , Gloss and Viscosity . PDI and Customer End quality checks. Documentation , deviation and Rejection analysis. ISO - 14001 , 45001 and 3834-2 Compliance. Training for Painters and Blasters.

Position- QA Engineer Email - punejob2025@gmail.com Contact - 9356395439 Experience : 3- 8 years. Salary: depend upon interview Education :- BE Mechanical./ DME / Production / Chemical Preferred candidate profile Quality Assurance management. Blasting and Painting QA . Paint Inspection RAL Codes and DFT , Gloss and Viscosity . PDI and Customer End quality checks. Documentation , deviation and Rejection analysis. ISO - 14001 , 45001 and 3834-2 Compliance. Training for Painters and Blasters.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ PMTS SILICON DESIGN ENGINEER ABOUT THE DEPARTMENT Central DFX (CDFX) is a centralized ASIC de...

Job Title: Lead DFT Engineer Location: Bengaluru Experience: 12+ Years Notice Period: 30days Role Overview We are seeking an experienced Lead DFT Engineer to drive the integration and optimization of Design-for-Test (DFT) architecture in our LiDAR SoCs. In this role, you will own DFT strategy, planning, implementation, and validation across our high-performance silicon platforms. Key Responsibilities Define, develop, and implement DFT methodologies for high-performance LiDAR SoCs. Own DFT planning, insertion, verification, and validation processes. Collaborate with RTL Design, Physical Design, and ASIC vendors to ensure robust test implementation for automotive-grade SoCs. Partner with IP ve...

Requisition ID: 71262-0 Hardware Development Engineer 5 Duties & Responsibilities As the Lead Hardware Eng, you will be responsible for the electrical design of Multimedia, Medical, Aviation, Consumer and Industrial electronic products. We are looking for candidates who thrive in a fast paced start-up like environment. In your role, you will be the owner of all aspects of EE hardware design, including circuit/board design and validation. To be successful, you need to be highly motivated and detail oriented while showing highest standards of responsibilities. Qualifications Required  BE/B.tech in Electronics and Communication, Electrical and Electronics Engineering  More than 10 years in de...

Role : ASIC RTL Engineer / Digital Design Location: Bangalore, Hyderabad, Pune Mandatory Skill RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One Good To Have processor architecture / ARM debug architecture debug issues for multiple subsystems create/review design documents for multiple subsystems Able to support physical design, verification, DFT and SW teams on design queries and reviews Details JD Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC leve...

Role- VLSI Sales Head Experience- 12+years Location - Bangalore JD IC Design services Sales expertise Ability to engage with customer R&D leaders and influence business opportunities. Build strong customer relationships and possess influential skills to drive business growth Work within organization delivery/ resourcing/ CoE teams and external partner ecosystem to staff and ramp-up VLSI team based on customer needs Understanding of Silicon Engineering Value Chain (Frontend, Backend, Post Silicon) and VLSI design fundamentals (ASIC/SoC, FPGA, digital/analog design, Package Design) Familiarity with tools and design flows (e.g., RTL to GDSII, DFT, STA, CAD flow & methodologies) Familiarity with...

Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your day will involve overseeing the application development process, coordinating with team members, and ensuring project milestones are met. Roles & Responsibilities:Bachelors degree in computer science, Electronics Eng...

As Logic Lead, you will be responsible for design and development of Compression, Security, and sustainability features for high performance Processors chips. Lead the Development of features - propose enhancements to existing features, new features, architecture in High level design discussions Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, FW, SW, Research teams to develop the feature Guide and mentor junior engineers. Represent as Design Lead in various forums. Signoff the Pre-silicon Design that meets all the functional, area and timing goals Participate in silicon bring-up and validation of the hardware Estimate the overall effort to dev...

Develop and implement DFT strategies for data center scale large/disaggregated SOCs, considering factors such as fault coverage, test time, and in-system test Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion, and test pattern generation Ensure compliance with IEEE standards (1149, 1687) for DFT methodologies and test patterns Conduct fault simulation and coverage analysis to assess the effectiveness of DFT strategies and identify areas for improvement Generate high-quality test patterns using automated test pattern generation (ATPG) tools Verify the correctness of DFT implementation through simulation and hardware testing Collaborate with des...

1. RTL development and Verification for Digital subsystems, Memory Subsystems including BIST. 2. DFT Insertion and Verification signoff for IO, ARM-PNR, Memory Digital Subsystems with Tessent/Embedded MBIST 3. MBIST, ATPG, RSQ Verification and sign-off. 4. Formal verification, Cross Clock Domain checks, Power/Timing sign off 5. Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently. Skillset: 1. Hands on Experience with RTL, Synthesis, 2. Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs 3. Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the...

We are looking for an experienced DFT Lead / Architect with a proven track record of DFT architecture, implementation and verification at SoC level. The ideal candidate will have the ability to build and lead a high-performing DFT team while delivering world-class DFT solutions for complex chips. --- Key Responsibilities DFT Architecture & Strategy Define and develop DFT architecture concepts at SoC level. Work with technical leads to define test modes to optimize test time. Define MBIST algorithms, grouping and top-level MBIST strategies for optimal test coverage. DFT Implementation Define scan length and insert SCAN chains. Generate EDT compactors and integrate into RTL clusters/macros. Ge...

We are seeking highly motivated DFT Engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation and delivery of DFT patterns for IBM’s chip design team. As a member of DFT team, you will be required but not restricted to insertion, pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Hands-on experience in DFT on complex designs involving scan insertion, compression, MBIST, ATPG, simulations and IP integration and validation. Proven expert...

- Lead the architecture, design and development of Power Management for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature...

Job ID: 38337 Location: Chennai, IN Area of interest: Technology Job type: Regular Employee Work style: Office Working Opening date: 28 Sept 2025 Job Summary Strategy This requirement is for testing delivery and align the testing delivery process and controls. Business Test Delivery Identify and analyse issues in requirements, design specifications, application architecture as well as product documentation. Develop test specifications based on various requirement documents within schedule constraints. Develop test bed and/or test data and verify test environments (based on project requirements). Develop regression packs to ensure that requirements from previous scope are still functioning as...

Key Responsibilities Sand Blasting: Operate sandblasting equipment to clean and prepare surfaces (metal structures, pipelines, tanks, etc.). Remove rust, scale, old paint, and contaminants to achieve required surface profile. Select appropriate abrasives, nozzles, and blasting techniques. Inspect blasted surfaces for quality before painting. Painting / Coating: Mix and apply primers, paints, and protective coatings by spray gun, brush, or roller. Ensure uniform thickness and smooth finish as per specifications. Follow proper drying/curing times and apply multiple coats if required. Handle specialized coatings (epoxy, polyurethane, fireproof, etc.) as per project needs. Quality & Safety: Ensu...

Strong experience in Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs Job Description In your new role you will: Implement high-performance, low-power, and area-efficient digital designs. Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis. Optimize designs for power, performance, and area, and meet PPA goals. Power analysis using PT-PX or equivalent flow. Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirement Your Profile You are best equipped for this task if you have: Strong fundamentals and experi...