1105 Dft Jobs - Page 12

ASIC DFT Engineering Technical Leader :: Design for testability, JTAG, Scan and BIST :: Exp 8+ yearsDFT Engineering Technical Lead Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your Impact Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs. Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows. Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies. The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship. Minimum Qualifications: Bachelor's or a Masters Degree in Electrical or Computer Engineering required with at least 10 years of experience. Knowledge of the latest innovative trends in DFT, test and silicon engineering. Background with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Background with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design Knowledge of the latest innovative trends in DFT, test and silicon engineering. Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Prior experience working with Gate level simulation, debugging with VCS and other simulators. Prior experience with Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687 Prior experience with Scripting skills: Tcl, Python/Perl. Preferred Qualifications: Verilog design experience developing custom DFT logic & IP integration; familiarity with functional verification DFT CAD development Test Architecture, Methodology and Infrastructure Background in Test Static Timing Analysis Past experience with Post silicon validation using DFT patterns.

Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your Impact Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs. Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL. Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows. Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug strategies. The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship. Minimum Qualifications: Bachelor's or a Masters Degree in Electrical or Computer Engineering required with at least 7+ years of experience. Knowledge of the latest innovative trends in DFT, test and silicon engineering. Background with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Background with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Verification skills include, System Verilog Logic Equivalency checking and validating the Test-timing of the design Knowledge of the latest innovative trends in DFT, test and silicon engineering. Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan. Prior experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime Prior experience working with Gate level simulation, debugging with VCS and other simulators. Prior experience with Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687 Prior experience with Scripting skills: Tcl, Python/Perl. Preferred Qualifications: Verilog design experience developing custom DFT logic & IP integration; familiarity with functional verification DFT CAD development Test Architecture, Methodology and Infrastructure Background in Test Static Timing Analysis Past experience with Post silicon validation using DFT patterns.

Job Description : We are looking for a VLSI MBIST Engineer with strong expertise in Memory Built-In Self-Test (MBIST) methodologies for ASIC/SoC designs. The ideal candidate should have hands-on experience using Synopsys SMS tool and a solid understanding of MBIST test development, pattern generation, and fault simulation. Key Responsibilities : Develop and implement MBIST algorithms and test patterns for embedded memories (SRAM, DRAM, ROM, CAM) Use Synopsys SMS tool for MBIST pattern generation and validation Perform fault modeling, fault simulation, and fault coverage analysis Integrate MBIST macros into SoC designs in collaboration with RTL and physical design teams Debug MBIST issues in pre- and post-silicon stages Document MBIST flows, generate test reports, and provide support for DFT reviews Stay updated on industry trends and best practices in MBIST and memory testing Required Skills : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, VLSI, or related fields 4+ years of experience in MBIST implementation and validation Strong experience with Synopsys SMS tool Proficiency in scripting languages like TCL, Perl, or Python Good knowledge of Verilog/SystemVerilog and digital design fundamentals Familiarity with simulation tools like VCS, ModelSim Preferred Skills : Experience with DFT tools such as Tessent Knowledge of ATPG, JTAG (IEEE 1149.1), and IEEE 1500 standards Exposure to silicon bring-up and failure analysis

CAD Engineer 3 Duties of Position: (Include specific duties and responsibilities) Requires a broad knowledge of PCB Layout Engineering practices, manufacturing process and IPC standards Should be responsible to adhere the DFM/DFA and DFT process and preparing the files for PCB Fabrication and Assembly Execute the High speed Design boards and support team members to develop skill sets for Sanmina Design specifications. Should interact with SI and PI team. Design consideration for EMI/EMC, thermal and Mechanical performance enhancement Design the complex and multi-Layer PCB Board using Cadence Allegro Tool. Technical expertise to handle project independently Design consideration for EMI/EMC, thermal and Mechanical performance enhancement Excellent Team player who interact with other Team Members and Supervisors Experience in skill development, Design automation are preferred Experience in Library database management is preferred. Experience in EDA tool automation is preferred. Qualifications Required: (Education, experience, skills, etc. Please be specific) BE/B.Tech in Electronics, Electronics and Communication , Electrical and Electronics Engineering Minimum of 5 years of experience in PCB Layout development experience in computer, Server, Storage PCBAs or related fields. Technical expertise in High Speed Digital , Analog and Power Supply designs Experience in board layout for x86 based Computing, Server and Storage Application domain. Experience in Intel designs especially Sandy bridge and Server platform designs. Familiarity in High End Processor based Mother Board Design, DDRx memory interfaces, Ethernet interfaces Familiarity with Signal Integrity concepts and its implementation Strong knowledge in EDA Tool (Cadence Allegro). Knowledge in other EDA tools like Mentor Graphics and Altium is added advantage. Expertise in DFx concepts and its implementation. Familiarity with Valor/CAM350 or DFM/DFA tool is preferred The Candidate should have experience in successful participation in development projects from design to production. Should be proficient with office productivity tools including Microsoft Office. Candidate should have basic knowledge of project management methods, and strong verbal and written communication skills. Solid understanding of manufacturing pcb assembly flows. Experience in EDA tool automation is preferred. Must be detail oriented and have a proven ability to organize, analyze, set priorities, and multi task in a fast paced environment Must be self-disciplined, highly productive and work effectively in team.

DFT Design Engineer (6 to 15 Years) DFT Engineer Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore] Experience: 4 to 15 Years Openings: 3 Positions Preferred - Immediate to 90 Days (Notice Period) About the company: ACL Digital, an ALTEN Group Company, is a digital product innovation and engineering leader. We help our clients design and build innovative products (AI, Cloud, and Mobile ready), content and commerce-driven platforms, and connected, converged digital experiences for the modern world through a design-led Digital Transformation framework. By integrating our strategic design, engineering, and industry capabilities, we help our clients decode the digital world and accelerate their growth journey. Headquartered in Silicon Valley, ACL Digital is a leader in design-led digital experience, innovation, enterprise modernization, and product engineering services converging to Technology, Media & Telecom. We are a talented workforce and part of the 50,000+ employee ALTEN Group, spread across more than 30 countries, offering a multicultural workplace and a collaborative knowledge environment. Job Description: 6+ years of hands-on experience in DFT methodologies. Proficiency with DFT tools (e.g., Synopsys DFT Compiler, Mentor Tessent, Cadence Modus). Strong understanding of test methodologies including scan insertion, boundary scan, BIST, and memory testing. Familiarity with RTL design and verification processes (Verilog/VHDL, UVM, System Verilog). Hands-on experience in automatic test pattern generation (ATPG) and fault simulation. Strong debugging and troubleshooting skills in both simulation and silicon environments. Excellent analytical skills with the ability to analyze large sets of test data and recommend improvements. Experience with JTAG/IEEE 1149.x boundary scan standards.

We are seeking an experienced and technically strong Probe Card and Boards Design Lead to drive the development of probe cards, load boards, and interface hardware for ATE-based testing of SoCs, MCUs, and mixed-signal ICs. The ideal candidate will have deep expertise in board-level hardware design, probe card specifications, signal/power integrity, and vendor coordination, with the ability to lead a cross-functional team through development, validation, and production support. Key Responsibilities: Own the end-to-end design and development of probe cards and test interface boards (load boards, DUT boards) for wafer-level and package-level ATE testing. Define probe card specifications based on die pad layout, test requirements, and ATE platform constraints. Collaborate with DFT, validation, and product engineering teams to capture test interface needs and ensure compatibility with test plans. Perform board-level schematic and layout reviews for signal integrity, power integrity, and mechanical constraints. Coordinate with probe card vendors and OSAT partners for fabrication, delivery, and debug. Drive characterization of signal paths, trace impedance, and routing quality for high-speed interfaces (e. g. , LPDDR, PCIe, USB). Define test socket, pogo pin, connector, and mechanical fixture requirements. Lead bring-up, debug, and issue resolution of probe cards and load boards on ATE (Teradyne UltraFlex, Advantest T2000, etc. ). Manage timelines, design reviews, and hardware readiness for silicon validation milestones. Qualifications B. E. /B. Tech or M. E. /M. Tech in Electronics or Electrical Engineering. 13+ years of experience in ATE hardware interface design, probe card development, or board-level hardware design. Strong knowledge of probe card technologies (MEMS, vertical, cantilever), pitch considerations, and DUT layout alignment. Proficient in PCB design tools (e. g. , Cadence Allegro, Mentor Xpedition) and schematic capture. Experience with high-speed signal routing, power delivery, controlled impedance, and board stack-up. Solid understanding of ATE platform requirements (e. g. , load board layer count, impedance control, pin mapping). Familiarity with mechanical design constraints and fixture interface. Hands-on experience in lab debugging and ATE test floor support. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Highly motivated Test Pattern Environment Engineer to develop, maintain, and support the infrastructure used for test pattern generation, conversion, and deployment in silicon validation and ATE production environments. You will collaborate closely with design, DFT, validation, and ATE teams to ensure high-quality pattern delivery from pre-silicon to post-silicon stages. Key Responsibilities: Develop and maintain pattern conversion flows and automation scripts (e. g. , STIL, WGL, VCD ATE format). Manage pattern validation infrastructure: simulation-based checks, equivalency, and compare tools. Support pattern bring-up and debug on ATE platforms (e. g. , Teradyne UltraFlex, Advantest 93K/Advantest T2000). Work with DFT teams to enable scan, LBIST, MBIST, and functional patterns in production test. Maintain version control and configuration management of pattern databases. Interface with post-silicon and product engineers for debug and pattern quality improvements. Automate pattern flow pipelines and regression checks using Python, Perl, or shell scripting. Document processes and best practices for cross-functional teams. Qualifications Required skills and Qualification: B. E. /B. Tech or M. E. /M. Tech in Electronics, Electrical, or Computer Engineering. 7+ years of experience in test pattern environment, DFT, or ATE domains. Strong understanding of digital test patterns, scan chains, MBIST, and vector formats (STIL, WGL, VCD). Experience in using simulation tools (e. g. , VCS, ModelSim) and waveform analysis. Familiarity with ATE pattern conversion tools and pattern delivery pipelines. Proficient in scripting languages: Python, Perl, TCL, or shell. Good understanding of semiconductor test flows and silicon lifecycle. Strong debugging and problem-solving skills. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Seeking a technically strong and proactive Post-Silicon System Validation / Functional Validation Lead to drive the planning, execution, and debug of system-level validation of IP and SoC/MCU designs. This role is critical in verifying functional correctness, feature compliance, performance, and robustness of silicon devices across use cases, voltage/temperature corners, and real application conditions. Key Responsibilities: Lead post-silicon system and functional validation of complex SoCs/MCUs. Develop and own validation plans, test strategies, and feature coverage matrices aligned with architecture and design specifications. Work closely with architecture, design, verification, firmware, and product teams to identify validation scope and execution path. Set up bring-up environments on evaluation boards, FPGA/emulation platforms, and validation platforms. Validate system functionality (boot, interfaces, power management, interrupts, etc. ) under various stress, corner, and performance scenarios. Develop test content, diagnostic tools, automation scripts, and custom firmware to exercise system features. Drive silicon debug, root cause analysis, and collaborate on corrective actions with design and DFT teams. Analyze test logs and data, track bugs, and drive closure through structured validation cycles. Lead a team of validation engineers, assign tasks, and manage deliverables for tape-out schedules or customer milestones. Prepare validation reports, functional coverage summaries, and risk assessments for tape-out or production release. Qualifications Required skills and Qualification: B. E. /B. Tech or M. E. /M. Tech in Electronics, Electrical, or Computer Engineering. 13+ years of experience in post-silicon validation, system validation, or embedded SoC bring-up. Strong understanding of SoC architecture , ARM cores (A/M series) , peripherals , power/clock/reset , and low-power design techniques . Experience validating high-speed interfaces (e. g. , DDR, USB, PCIe, MIPI, Ethernet) and standard protocols (SPI, I2C, UART, CAN, etc. ). Proficiency in C/C++ or embedded programming for firmware development and test automation. Hands-on experience with lab tools (oscilloscopes, logic analyzers, power analyzers, thermal sensors). Familiarity with validation frameworks, debug utilities (JTAG, Lauterbach, OpenOCD), and issue tracking systems (JIRA, Bugzilla). Strong leadership, communication, and collaboration skills. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Create the future of e-health together with us by becoming an Interface Analyst As a pioneer in digital health our heart beats for the development and implementation of new technologies. Become part of a cooperative Agile Team working in the latest technologies Angular and .Net developing PC base, cloud base and mobile base solutions. For the next level of e-health evolution we are looking for creative minds who enjoy working with a variety of technologies, their own design freedom and professional development. Empowering employees to solve challenging problems with full support of your peers. What you can expect from us – An extensive group health and accidental insurance program. A safe digital application and a structured and streamlined onboarding process. Our progressive transportation model allows you to choose: You can either receive a self-transport allowance, or we can pick you up and drop you off on your way from or to the office. Subsidized meal facility. Fun at Work: tons of engagement activities and entertaining games for everyone to participate. Various career growth opportunities as well as a lucrative merit increment policy in a work environment where we promote Diversity, Equity, and Inclusion. Best HR practices along with an open-door policy to ensure a very employee friendly environment. A recession proof and secured workplace for our entire workforce. What you can do for us: You are responsible for building the next physician office experience and help build an amazing application used by healthcare providers and patients across the country If you want to make a difference for physicians, nurses and patients with the code you write, and not just work on the next chat app, this opportunity is for you. Your main duties will include working with vendors and customers to implement important interfaces in the realm of labs (ORM, ORU), PM (ADT, SIU and DFT) and completely custom ones depending on need You and the team will participate in all phases of design and development; from high level design, to defining the REST APIs; to writing the code and tests. The application is built with most of the UI implemented using Angular. There is a messaging layer between the Angular and C# code. The backend is a REST API implemented using ASP.NET Web API. As a member of the team, you will work with all these technologies. Your Qualifications: 2+ years developing software with any OOP language knowledge. For example, C#, Microsoft .NET, or .NET Core. SQL knowledge is a strong plus. Experience designing or working with REST APIs is a strong plus Good knowledge of HL7 standard (ADT, SIU, DFT, ORM, ORU and others) as well as working with an HL7 interface engine – (C#, Mirth, Core point) Flexible to work shift per client requirement. Convinced? Submit your persuasive application now (including desired salary and earliest possible starting date). We create the future of e-health. Become part of a significant mission.

Job Description We are seeking a Senior Staff Verification Engineer to lead and contribute to the functional verification of complex SoC and IP designs for next-generation AI, HPC, and data center products. The ideal candidate has extensive experience in UVM/SystemVerilog , SoC and IP-level verification, and is passionate about ensuring first-pass silicon success . This role involves defining verification strategies, developing scalable environments, and collaborating cross-functionally with architecture, design, and software teams. Experience with Virtual Modeling, SystemC, and TLM is a plus , enabling advanced verification and early system-level validation. Qualifications Required Qualifications Education & Experience B.S./M.S. in Electrical Engineering, Computer Engineering, or related field. 8+ years of experience in IP/SoC verification with a proven track record of successful silicon delivery. Technical Expertise Deep knowledge of UVM/SystemVerilog for testbench development and verification IP integration. Strong understanding of SoC architecture and protocols such as DDR5, HBM3, PCIe Gen6, CXL 3.0 , and other high-speed interfaces. Expertise in coverage-driven verification , constrained-random testing, and assertion-based verification. Proficient in debugging RTL, testbenches, and simulation failures using industry-standard tools. Tools & Languages Hands-on experience with simulation tools (VCS, Xcelium, Questa, etc.), waveform viewers, coverage tools, and automation scripting (Python, Perl, TCL). Preferred/Additional Skills Virtual Modeling and System-Level Verification Familiarity with SystemC and Transaction-Level Modeling (TLM) for virtual prototyping and early system validation. Experience developing or using virtual platforms for hardware/software co-verification is a strong plus. Emulation & Prototyping Exposure to emulation platforms (Palladium, ZeBu) and FPGA-based prototyping for system-level validation and performance analysis. Software Co-verification Experience working alongside firmware/software teams for pre-silicon software validation and early driver/OS bring-up. Low-Power and DFT Verification Knowledge of power-aware verification (UPF/CPF) and DFT validation methodologies is desirable. Additional Information Key Responsibilities Verification Planning & Execution Lead the definition, development, and execution of comprehensive verification plans at IP and SoC levels. Develop UVM/SystemVerilog-based testbenches , including stimulus generation, checkers, and monitors for advanced SoC designs. Drive coverage-driven verification processes, ensuring functional and code coverage goals are met. Cross-Functional Collaboration Collaborate with architecture, RTL design, firmware, software, and emulation teams to define verification requirements and ensure comprehensive test coverage. Participate in design and architecture reviews , providing critical feedback on functionality, testability, and performance considerations. Debug & Issue Resolution Lead debug efforts on complex SoC and IP issues through simulation, emulation, and FPGA prototypes. Perform root-cause analysis and drive issues to closure in partnership with cross-disciplinary teams. Methodology & Infrastructure Development Enhance and maintain verification methodologies , including reusable verification IP, automation scripts, and regression infrastructure. Evaluate and adopt new tools and verification technologies to improve quality and efficiency. Leadership & Mentorship Provide technical guidance and mentorship to junior verification engineers. Lead verification reviews and strategy discussions , ensuring high technical standards and best practices. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Job Description Job Summary Drive Architecture that will define the SOC/MCU architecture and detailed technical specifications from product requirements provided by business and product marketing organizations. Collaborate closely with product and software architects to define and refine SoC-level architecture Play a key role in shaping the microarchitecture of complex IP blocks and SoC subsystems Work closely with functional verification teams on test-plan development and reviews Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets Provide support to functional validation teams in post silicon debug IP selection and make/buy decisions are a key factor for this role Qualifications Qualifications Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus BTech/MTech in Electrical/Electronic/Computer/Hardware Engineering with experience of 12+ years Can – do attitude, openness to new environment, people and culture Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency Experience with benchmarking IP/SoC performance and tuning IP/SoC architecture Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems. Experience in using Virtual Prototype tools (ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS etc..) is a plus Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, you can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Associate's degree in Computer Science, Electrical/Electronic Engineering, Engineering, or related field. Experience in Logic design /micro-architecture / RTL coding Must have hands on experience with SoC design, synthesis and timing analysis for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Work closely with the SoC DFT, Physical Design and STA teams Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as DesignCompiler, Genus, FusionCompiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Create the future of e-health together with us by becoming an Interface Analyst As a pioneer in digital health our heart beats for the development and implementation of new technologies. Become part of a cooperative Agile Team working in the latest technologies Angular and .Net developing PC base, cloud base and mobile base solutions. For the next level of e-health evolution we are looking for creative minds who enjoy working with a variety of technologies, their own design freedom and professional development. Empowering employees to solve challenging problems with full support of your peers. What You Can Expect From Us – An extensive group health and accidental insurance program. A safe digital application and a structured and streamlined onboarding process. Our progressive transportation model allows you to choose: You can either receive a self-transport allowance, or we can pick you up and drop you off on your way from or to the office. Subsidized meal facility. Fun at Work: tons of engagement activities and entertaining games for everyone to participate. Various career growth opportunities as well as a lucrative merit increment policy in a work environment where we promote Diversity, Equity, and Inclusion. Best HR practices along with an open-door policy to ensure a very employee friendly environment. A recession proof and secured workplace for our entire workforce. What You Can Do For Us You are responsible for building the next physician office experience and help build an amazing application used by healthcare providers and patients across the country If you want to make a difference for physicians, nurses and patients with the code you write, and not just work on the next chat app, this opportunity is for you. Your main duties will include working with vendors and customers to implement important interfaces in the realm of labs (ORM, ORU), PM (ADT, SIU and DFT) and completely custom ones depending on need You and the team will participate in all phases of design and development; from high level design, to defining the REST APIs; to writing the code and tests. The application is built with most of the UI implemented using Angular. There is a messaging layer between the Angular and C# code. The backend is a REST API implemented using ASP.NET Web API. As a member of the team, you will work with all these technologies. Your Qualifications 2+ years developing software with any OOP language knowledge. For example, C#, Microsoft .NET, or .NET Core. SQL knowledge is a strong plus. Experience designing or working with REST APIs is a strong plus Good knowledge of HL7 standard (ADT, SIU, DFT, ORM, ORU and others) as well as working with an HL7 interface engine – (C#, Mirth, Core point) Flexible to work shift per client requirement. Convinced? Submit your persuasive application now (including desired salary and earliest possible starting date). We create the future of e-health. Become part of a significant mission.

Hiring for One of Our Client Job Title: Senior / Lead Design Verification Engineer Experience: 6 – 10 years Location: Siruseri, Chennai (Work from Office only) Industry: Semiconductor / VLSI Employment Type: Full-time / Permanent Key Responsibilities Perform functional verification at block and chip level for complex ASIC/SoC designs. Build UVM-based testbenches from scratch for new IPs or subsystems. Develop and execute detailed verification test plans based on design specifications. Write directed and constrained-random test cases; debug simulation failures. Perform coverage analysis (functional and code) and drive closure. Work with RAL (Register Abstraction Layer) to verify register-level functionality. Develop and validate assertions (SVA) for protocol and functional correctness. Collaborate closely with RTL, DFT, and GLS teams to ensure alignment acrossdesign phases. Participate in multiple tapeouts, ensuring verification quality and delivery. Required Skills Strong hands-on experience with SystemVerilog and UVM methodology. Solid knowledge of SoC/ASIC architecture and verification lifecycle. Hands-on experience in writing testbenches, stimulus, checkers, monitors, and scoreboards . Strong debugging skills using simulation tools like VCS, Questa. Experience with functional and code coverage. Familiarity with Register Abstraction Layer (RAL) modeling and verification. Excellent analytical and problem-solving skills. Strong communication and teamwork abilities. Interested candidates kindly forward your resumr to swetha.s@thompsonshr.com

We are looking for a skilled PCB Design Engineer with expertise in Altium Designer to develop high-performance printed circuit boards (PCBs) for automotive applications. This role involves designing Battery Management Systems (BMS), Vehicle Control Units (VCU), and Motor control Units (MCU) while ensuring compliance with industry standards. The ideal candidate will have experience in high-voltage system design, signal integrity analysis, and DFM/DFT best practices. Responsibilities · PCB Layout & Design: Develop automotive-grade PCB layouts for BMS, VCU, MCU, and high-voltage systems, considering isolated ground planes and power integrity requirements. · High-Voltage PCB Design: Implement optimized layer stack-ups and impedance-controlled layouts to support high-voltage isolation and safety regulations. · Signal & Power Integrity Analysis: Perform crosstalk analysis, impedance matching, and EMI/EMC optimizations to enhance circuit performance. · Component Placement & Routing: Optimize high-speed signal routing and deferential pair designs to improve manufacturability and reliability. · Simulation & Validation: Utilize simulation tools to validate electrical performance and minimize design risks before fabrication. · Design for Manufacturing & Testing: Work closely with fabrication and assembly teams to ensure designs meet manufacturing and testing feasibility. · Technical Documentation: Prepare detailed design files, BOMs, Gerber files, and fabrication documentation. · Compliance & Standards: Ensure all PCB designs adhere to IPC-6012, ISO 9001, and automotive industry regulations. · Cross-Functional Collaboration: Work with hardware, firmware, and system engineering teams to meet project requirements efficiently. Qualifications · Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field. · 3-5 years of experience in PCB design and layout for automotive applications. · Expertise in Altium Designer (knowledge of Cadence OrCAD, Allegro PCB Designer is a plus). · Strong understanding of signal integrity, power integrity, EMI/EMC compliance, and high-speed PCB design. · Experience with impedance-controlled designs, differential pair routing, and high-voltage system layouts. · Knowledge of PCB fabrication and assembly processes with a focus on DFM/DFT best practices. · Excellent problem-solving skills and ability to work in cross-functional engineering teams.

Job Description Job Summary We are seeking a Principal Post-Silicon Validation Engineer to lead the system-level validation, debug, and bring-up of complex SoCs for cutting-edge AI, HPC, automotive, MCU and data center products. In this senior role, you will drive post-silicon validation strategy , coordinate across hardware and software teams, and ensure the delivery of high-quality, production-ready silicon . Experience with Virtual Modeling, SystemC, and TLM is a plus , supporting pre-silicon co-validation and accelerating silicon bring-up. Key Responsibilities Post-Silicon Validation Planning & Execution Define and lead comprehensive post-silicon validation plans, including functional validation, performance tuning, stress testing, and interoperability. Develop and execute system-level test content, leveraging real-world workloads, benchmarks, and custom test suites. Drive silicon bring-up, working closely with cross-functional teams to ensure first-pass success. Silicon Debug & Issue Resolution Lead complex issue triage, debug, and root cause analysis using hardware debug tools (logic analyzers, protocol analyzers, JTAG, trace). Interface with design, verification, and firmware teams to resolve issues found in silicon and drive corrective actions. Collaboration & Cross-Functional Coordination Work closely with design, verification, firmware, software, and system teams to align validation goals and schedules. Provide critical feedback to architecture and design teams on silicon behavior and feature readiness. Validation Infrastructure Development Develop and enhance validation frameworks, automation scripts, and post-silicon diagnostics to accelerate validation cycles. Contribute to lab infrastructure setup, including platform bring-up, test environments, and debug tool integration. Leadership & Mentorship Lead technical reviews, debug task forces, and post-silicon readiness assessments. Mentor junior engineers and drive a culture of technical rigor and innovation. Qualifications Required Qualifications Education & Experience B.S./M.S. in Electrical Engineering, Computer Engineering, or related field. 10+ years of experience in post-silicon validation, hardware bring-up, or related SoC/system validation roles. Technical Expertise Proven track record of silicon bring-up and validation for complex SoCs or silicon systems. Strong understanding of SoC architecture, high-speed interfaces (PCIe Gen5/6, CXL, DDR5, HBM3), and embedded system design. Hands-on expertise in system-level validation, performance tuning, and debug of complex SoC designs. Debug & Validation Tools Proficient in hardware debug tools (JTAG, logic analyzers, protocol analyzers), as well as embedded software and firmware-level debugging. Experience with diagnostic software and post-silicon validation frameworks. Soft Skills Excellent problem-solving and analytical skills, with a methodical approach to debug and issue resolution. Strong communication and collaboration skills to work across multi-disciplinary teams. Additional Information Preferred/Additional Skills Virtual Modeling & Pre-Silicon Co-Validation Experience with SystemC and Transaction-Level Modeling (TLM) for virtual prototypes and early system-level validation is a strong plus. Ability to leverage virtual platforms for pre-silicon software/firmware validation to accelerate post-silicon efforts. Firmware & Software Integration Familiarity with low-level firmware (boot loaders, drivers) and OS integration for hardware/software co-validation. DFx and System Test Exposure to Design for Test (DFT) concepts and silicon testability features (scan, BIST, boundary scan). Power & Performance Validation Experience with low-power validation, dynamic power analysis, and performance optimization techniques. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Job Description We are seeking a Senior Staff Verification Engineer to lead and contribute to the functional verification of complex SoC and IP designs for next-generation AI, HPC, and data center products. The ideal candidate has extensive experience in UVM/SystemVerilog , SoC and IP-level verification, and is passionate about ensuring first-pass silicon success . This role involves defining verification strategies, developing scalable environments, and collaborating cross-functionally with architecture, design, and software teams. Experience with Virtual Modeling, SystemC, and TLM is a plus , enabling advanced verification and early system-level validation. Qualifications Required Qualifications Education & Experience B.S./M.S. in Electrical Engineering, Computer Engineering, or related field. 8+ years of experience in IP/SoC verification with a proven track record of successful silicon delivery. Technical Expertise Deep knowledge of UVM/SystemVerilog for testbench development and verification IP integration. Strong understanding of SoC architecture and protocols such as DDR5, HBM3, PCIe Gen6, CXL 3.0, and other high-speed interfaces. Expertise in coverage-driven verification, constrained-random testing, and assertion-based verification. Proficient in debugging RTL, testbenches, and simulation failures using industry-standard tools. Tools & Languages Hands-on experience with simulation tools (VCS, Xcelium, Questa, etc.), waveform viewers, coverage tools, and automation scripting (Python, Perl, TCL). Preferred/Additional Skills Virtual Modeling and System-Level Verification Familiarity with SystemC and Transaction-Level Modeling (TLM) for virtual prototyping and early system validation. Experience developing or using virtual platforms for hardware/software co-verification is a strong plus. Emulation & Prototyping Exposure to emulation platforms (Palladium, ZeBu) and FPGA-based prototyping for system-level validation and performance analysis. Software Co-verification Experience working alongside firmware/software teams for pre-silicon software validation and early driver/OS bring-up. Low-Power and DFT Verification Knowledge of power-aware verification (UPF/CPF) and DFT validation methodologies is desirable. Additional Information Key Responsibilities Verification Planning & Execution Lead the definition, development, and execution of comprehensive verification plans at IP and SoC levels. Develop UVM/SystemVerilog-based testbenches, including stimulus generation, checkers, and monitors for advanced SoC designs. Drive coverage-driven verification processes, ensuring functional and code coverage goals are met. Cross-Functional Collaboration Collaborate with architecture, RTL design, firmware, software, and emulation teams to define verification requirements and ensure comprehensive test coverage. Participate in design and architecture reviews, providing critical feedback on functionality, testability, and performance considerations. Debug & Issue Resolution Lead debug efforts on complex SoC and IP issues through simulation, emulation, and FPGA prototypes. Perform root-cause analysis and drive issues to closure in partnership with cross-disciplinary teams. Methodology & Infrastructure Development Enhance and maintain verification methodologies, including reusable verification IP, automation scripts, and regression infrastructure. Evaluate and adopt new tools and verification technologies to improve quality and efficiency. Leadership & Mentorship Provide technical guidance and mentorship to junior verification engineers. Lead verification reviews and strategy discussions, ensuring high technical standards and best practices. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Qualcomm India Private Limited is seeking a talented individual to join their Hardware Engineering team. As a part of the Engineering Group, you will be responsible for ASIC design with a focus on digital front end design. The ideal candidate should hold a PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with 3-5 years of relevant experience in ASIC design. Key responsibilities include RTL coding in Verilog/VHDL/SV for complex designs with multiple clock domains, expertise in bus protocols like AHB, AXI, and NOC designs, and experience in low power design methodology and clock domain crossing designs. Additionally, the candidate should have experience in Spyglass Lint/CDC checks, waiver creation, formal verification with Cadence LEC, and understanding of the full RTL to GDS flow to collaborate with DFT and PD teams. Desired qualifications for this role also include experience in mobile Multimedia/Camera design, DSP/ISP knowledge, working knowledge of timing closure, expertise in Perl, TCL language, post-Si debug, and good documentation skills. The ability to create a unit level test plan is essential for this position. Minimum qualifications for this role include a Bachelor's degree with 4+ years of Hardware Engineering experience, a Master's degree with 3+ years of relevant experience, or a PhD with 2+ years of related work experience. Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations for individuals with disabilities during the application/hiring process. If you are looking to be a part of a dynamic team where your skills and expertise will be valued, consider applying for this exciting opportunity at Qualcomm India Private Limited. For further information about this role, please reach out to Qualcomm Careers.,

We are looking for experienced RTL Integration Engineers to join our team and contribute to cutting-edge semiconductor designs. If you have a passion for SoC integration and front-end design methodologies, we want to hear from you! Key Responsibilities: Deliver RTL Subsystems and/or top-level SoC RTL across multiple projects Expertise in RTL database management, partitioning, and third-party IP integration Work with lint, DFT, UPF, synthesis, timing, and power analysis Address SoC integration challenges at both subsystem and full-chip levels Integrate Digital IPs such as PCIe, SDIO, USB, and ARM processors with protocol expertise Design top-level clock/reset circuits and manage memory selection/generation Join us and be part of a high-impact team shaping the future of semiconductor technology! Interested Drop your resume at info@silcosys.com #RTL #SoC #Integration #Semiconductor #Hiring #VLSI #Engineering #JobOpening,

As an intern at our company, you will be responsible for assisting in various recruitment activities. Your day-to-day responsibilities will include sourcing and screening potential candidates, scheduling interviews, and maintaining candidate databases. Additionally, you will help in developing job postings and recruitment materials, as well as participating in job fairs and recruitment events. Your role will also involve providing administrative support to the recruitment team. Our company is dedicated to providing comprehensive semiconductor design services, ranging from RTL & ASIC design to physical design, STA, verification, DFT, circuit design & layout, FPGA, Foundation IP design, PSV, and emulation. We are experiencing rapid growth and boast an exceptional team of technology specialists who bring a competitive advantage, agile mindset, and innovation to tackle technological challenges and drive business transformation. With expertise in electronic design, platform design, automation, embedded systems, and software technologies, we focus on strategizing, innovating, and designing intelligent solutions that enhance product performance and enable seamless connectivity.,

Job Description Job Summary Drive Architecture that will define the SOC/MCU architecture and detailed technical specifications from product requirements provided by business and product marketing organizations. Collaborate closely with product and software architects to define and refine SoC-level architecture Play a key role in shaping the microarchitecture of complex IP blocks and SoC subsystems Work closely with functional verification teams on test-plan development and reviews Collaborate with other functional teams including Design, Validation, DFT, physical design and emulation teams to achieve architectural goals and performance targets Provide support to functional validation teams in post silicon debug IP selection and make/buy decisions are a key factor for this role Qualifications Qualifications Strong communication skills (written and verbal), problem solving, teamwork, attention to detail, commitment to task, and quality focus BTech/MTech in Electrical/Electronic/Computer/Hardware Engineering with experience of 12+ years Can – do attitude, openness to new environment, people and culture Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency Experience with benchmarking IP/SoC performance and tuning IP/SoC architecture Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems. Experience in using Virtual Prototype tools (ARM Fast Models, Synopsys Virtualizer, Windriver SIMICS etc..) is a plus Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Description Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. You will be joining a successful engineering team whose deliveries can be found in billions of mobile, compute and IoT products worldwide. Based out of Qualcomm's Bangalore office, this role offers a position in Digital Design working on IP subsystem and cores targeted to a variety of industry leading SoCs. Key Responsibilities Responsible for debugging and root cause of internal and external customer issues/RMAs for Automotive SoCs Drive and supervise a team consisting of design, verification, validation, DFT engineers in a metrics structure for post-Si issue/RMA resolution during commercialization and product launch phases. Ability to decipher the problem from Si debug of system issues and work with multiple stakeholders for root cause. Report status and communicate progress against expectations. Minimum Qualifications Bachelor’s or Master’s degree in Electronics or Electrical Engineering Preferred Qualifications 17+ years of work experience in SoC Design/Verification/ Validation/Systems debug and Integration Experienced in RTL design using Verilog / System Verilog / VHDL Experienced in Verification, Simulation tools, Waveform analysis for simulation debug. Experienced in Si Validation and post-Si debug. Strong expertise in debugging functional and system level issues involving both HW and SW. Exposure to ATE, bench and understanding of functional / test patterns. Ability to drive and root cause post-Si issues and debug with multiple design, verification, validation stakeholders Ability to interface with customer engineering and SW teams. Experience in leading the team to ensure all the deliverables are met. Guiding and helping the team with all the resources needed. Knowledge of SoC Architecture NOC, AXI, AHB protocols and memory controllers like DDR, Flash Memory. Knowledge of different peripherals and high-speed interfaces like PCIE, Ethernet, USB etc. Exposure to Automotive SoC and functional safety would be plus. Familiarity with PDN and Signal integrity issues. Experienced in database management flows with ClearCase/ClearQuest. Excellent oral and written communications skills Proactive, creative, ability to take ownership, motivated to learn and contribute with good collaboration skills.. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ions. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3066629

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . Analog Devices is seeking a highly qualified individual to service and support physical design projects using world-class EDA tools. The Physical Design (Place-and-Route) engineer will be responsible for the following tasks: Job Description P3 Job Profile As a key member of the team, he/she will be responsible for: Performing Netlist-to-GDS Physical Design including Place-and-Route, Extraction, STA, Timing/SI/Power/EM/IR analysis & closure and Physical Design Verification (LVS/DRC). Service business units for physical design needs and promote best practices. Participate in R&D activities, tool evaluations, flow automations, QA and enhancements Python/Perl/Shell/TCL scripting for flow and procedure automation Technical support to junior engineers Qualifications ME/MTech/MS in Electrical/Electronics/Computer Engineering with 4+ years of solid physical design place-and-route production project experience using industry-leading EDA tools/flows. Well versed in Netlist-to-GDS Physical design flow. Basic understanding of Synthesis flow and DFT would be desirable Adequate programing/scripting skills in Perl/TCL/Python. Quick learner and good problem-solving skills. Team-player and good communicator For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) may have to go through an export licensing review process.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. In this role You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3078079

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. In this role You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality, and PPAS (Performance Power Area Schedule) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking, transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC integration, function/performance simulation debug. Drive Lint/CDC/FV/UPF checks to ensure design quality. Develop Assertions as part of white-box testing-coverage. Work with stakeholders to discuss the right collateral quality and identify solutions/workarounds. Work towards delivering with key design collaterals (timing constraints, UPF etc.). Desired Skillset Good understanding of low power microarchitecture techniques and AI/ML systems. Thorough knowledge of Computer system architecture, including design aspects of AI/ML designs. Experience in high performance design techniques and trade-offs in a Computer microarchitecture. Good understanding of principals of NoC Design Define Performance (Bandwidth, Latency) and Bus transactions sizing based on usecases across Voltage/Frequency corners Working with Power and Synthesis teams on usecases, dynamic power and datapath interactions Knowledge of Verilog / System Verilog. Experience with simulators and waveform debugging tools Working with SOC DFT and PD teams as part of collaterals exchanges Knowledge of logic design principles along with timing and power implications. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3078078