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Smart Soc Solutions
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Design Verification Engineer Ã¢â‚¬â€œ Position 1

Design Verification Engineer Ã¢â‚¬â€œ Position 1

Smart Soc Solutions

5 - 10 years

5 - 8 Lacs

Bengaluru

Posted:1 week ago| Platform:

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Skills Required

system verilog protocols sv uvm ethernet soc verification c++ soc design verification electrical engineering vhdl rtl design axi fpga modelsim rtl coding perl axi protocols asic c ip ovm rtl ptp verilog asic design regression tests vlsi pcie

Work Mode

Work from Office

Job Type

Full Time

Job Description

Experience: 5 to 12 years
Location: Bangalore
:
We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). The primary focus of this role will be on Ethernet protocol verification, ranging from 100G to 800G standards. Key Responsibilities:

Ethernet Protocol Expertise

Demonstrate expertise in Ethernet standards, encompassing 100G to 800G.

In-depth knowledge of specific standards, including 100GE (cl45, cl49, CL82, CL91, CL119), 200GE, 400GE (cl161, cl116), and 800GE (802.df/800ETA).

Proficiency in PTP 1588 standard and various Ethernet frame types.

Competence in packet insertion/extraction techniques.

(Additional knowledge of AXI protocol would be considered an advantage)

UVM/SV Proficiency

Showcase strong expertise in SystemVerilog (SV) and Universal Verification Methodology (UVM).

Architectural Skills

Proven ability to architect, build, and maintain a comprehensive verification stack.

Test Development

Extensive experience in developing a set of regression tests for verification purposes.

Qualifications:

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

5 to 12 years of relevant industry experience in IP and SOC verification.

Strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM).

Excellent understanding of Ethernet protocols, ranging from 100G to 800G.

Proficiency in PTP 1588 standard and various Ethernet frame types.

Experience with packet insertion/extraction techniques.

Knowledge of AXI protocol (preferred).

Proven ability to architect, build, and maintain verification stacks.

Demonstrated expertise in developing a comprehensive set of regression tests.

If you are a talented Design Verification Engineer with a passion for ensuring the reliability and performance of cutting-edge technology, we encourage you to apply. Join our dynamic team and contribute to the advancement of next-generation technologies. Job Category VLSI (Silicon engineering)
Job Type Full Time
Job Location IndiaBangalore

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Design Verification Engineer Ã¢â‚¬â€œ Position 1