FPGA Prototyping/Emulation Engineer Ceremorphic Technologies

3.0 - 7.0 years

0 Lacs

hyderabad, telangana

On-site

As an FPGA Engineer at our company, you will be responsible for owning and driving the design, implementation, and verification of FPGA prototypes for next-generation SOCs. Your main responsibilities will include: - FPGA integration and implementation of all interfaces such as PCIe, DDR, etc. - FPGA implementation and timing closure. - Providing emulation platform solutions for FW development. - Offering emulation platforms for pre-silicon validation. - FPGA validation and debug. To excel in this role, you should meet the following key requirements: - Hands-on design experience using Verilog, System Verilog, and porting large designs to FPGA, including a combination of custom RTL and proven ...

Posted 3 weeks ago

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ASIC Design and Validation Staff Micron Technology

8.0 - 12.0 years

0 Lacs

hyderabad, telangana

On-site

You are responsible for hands-on SOC C verification, validation, product debug issues, and silicon bring-up experience. Your role involves engaging in multi-processor SOC C verification, validation activities with a strong skill set in C/C++. It is essential for you to have a good understanding of End-to-End debug on various platforms like Bring Up Boards and FPGA prototyping platforms. Moreover, you should be well-versed in NAND, UFS, ARC, ONFI, AXI protocols and debug mechanisms using tools like Metaware debugger. Your responsibilities will also include gaining exposure to Firmware flows during debug activities and being familiar with Verilog/System Verilog RTL. You must be able to analyze...

Posted 1 month ago

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Design and Verification Engineer Techno Facts Solutions

3.0 - 8.0 years

10 - 15 Lacs

noida, pune, bengaluru

Work from Office

Roles and Responsibilities Design verification using UVM methodology for IP/SOC level verification. Create testbenches from scratch, including drivers, monitors, and scoreboard components. Develop VIPs (Virtual Interface Platform) for functional verification of IP blocks. Collaborate with cross-functional teams to identify requirements and develop test plans. Participate in peer review process to ensure high-quality deliverables.

Posted 1 month ago

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Design Verification Engineer Ã¢â‚¬â€œ Position 1 Smart Soc Solutions

5.0 - 10.0 years

5 - 8 Lacs

Bengaluru

Work from Office

Experience: 5 to 12 years Location: Bangalore : We are seeking a highly skilled Design Verification Engineer to join our team in Bangalore. The ideal candidate will have 5 to 12 years of experience in IP and SOC verification, with a strong background in SystemVerilog (SV) and Universal Verification Methodology (UVM). The primary focus of this role will be on Ethernet protocol verification, ranging from 100G to 800G standards. Key Responsibilities: Ethernet Protocol Expertise Demonstrate expertise in Ethernet standards, encompassing 100G to 800G. In-depth knowledge of specific standards, including 100GE (cl45, cl49, CL82, CL91, CL119), 200GE, 400GE (cl161, cl116), and 800GE (802.df/800ETA). P...

Posted 2 months ago

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DFD (Design For Debug) DV Smart Soc Solutions

8.0 - 13.0 years

3 - 6 Lacs

Hyderabad

Work from Office

Qualifications: Bachelor’s or Master’s degree in Electrical Engineering or related field (BE/BTech/M.E/M.Tech) Strong communication skills, both written and verbal Experience: At least 8 years of professional experience in the field Skills: Proficiency in Trace, Cross-Trigger, JTAG, and AXI protocols Expertise in security protocols, real boot processes, Debug mode, Warm reset, power management, and LP-UPF Previous experience with AMD is considered an advantage NoteInterested candidates should submit a detailed resume highlighting their relevant experience and skills. Job Category VLSI (Silicon engineering) Job Type Full Time Job Location IndiaBangalore IndiaHyderabad

Posted 2 months ago

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Design and Verification Engineer Coventine Digital

5.0 - 10.0 years

8 - 18 Lacs

Bengaluru

Work from Office

Job Description: We are looking for a skilled Design Verification (DV) Engineer with strong experience in AXI protocols and Verdi for debugging. The ideal candidate should have hands-on expertise in simulation, debugging, FSDB handling, and coding for verification environments. Key Responsibilities: Work on verification of SoC/IP-level modules using industry-standard protocols (AXI preferred) Run simulations, generate and open FSDBs for waveform analysis Debug RTL and testbench issues using Verdi or similar waveform tools Collaborate with RTL and design teams to ensure functional correctness Develop, execute, and maintain testbenches and testcases for various blocks Must-Have Skills: AXI pro...

Posted 2 months ago

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