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Smart Soc Solutions
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Analog Layout Engineer

Analog Layout Engineer

Smart Soc Solutions

3 - 5 years

4 - 8 Lacs

Noida Hyderabad Bengaluru

Posted:1 day ago| Platform:

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Skills Required

fabrication lvs dfm esd eda tools physical design floorplan routing cadence virtuoso drc shell scripting perl analog layout cmos asic mixed signal eda cadence verilog physical verification floor planning layout design pnr vlsi synopsys

Work Mode

Work from Office

Job Type

Full Time

Job Description

Analog Layout Engineer
Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech
ESSENTIAL DUTIES AND RESPONSIBILITIES:

Candidate should have a strong knowledge on devices and process/fabrication technology.

Should have work experience in 7nm, 10nm, 14nm, 16nm etc

Good understating of Deep Submicron issues and layout techniques.

Expertise on matching, parasitic reduction, ESD, DFM etc.

Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc.

Cadence Virtuoso Layout editor (L/XL/GXL)

Verification toolsAssura/PVS/Calibre/ Hercules

Preferred
Skills:

Scripting Knowledge of perl/shell/skill are highly preferred

Job Category VLSI (Silicon engineering)
Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas

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Analog Layout Engineer