267 Analog Layout Jobs

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Analog Layout Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to perform maintenance and enhan...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Static Timing Analysis (STA) Good to have skills : NA Minimum 12 year(s) of experience is required Educational Qualification : 15 years full time education Summary : Full Chip level Constraints development, validation, and timing closure Deep understanding of Finfet low technology node 7nm and below Expertise on IO budgeting, MMMC timing eco generation and convergence Expertise in Clock Tree analysis for deep submicron Hands-on expe...

Role & responsibilities Would be able to build entire Semi-Conductor vertical for recruitment business. Should be able to get mandates from client and take responsibility for delivery of the mandates. Should be able to take P&L responsibility. Should be able to handle team of recruiters and make sure the client is happy on the service. Should be able to provide strategic solutions to the team and drive for organizational growth. Preferred candidate profile Any Graduate with proven track record of working in recruitment / Staffing Industry. Should have minimum 10 years of experience. Should be a stable candidate. We are not looking for Job Hoppers. Should be able to handle team. Should be wil...

Skills: VLE, Cadence Software, VLX, Calibre, DRC, LVS,. Layout Designer _ Hyderabad (5 to 8 Years. Description. Role and Responsibilities. Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Guide junior team-members in their execution of Sub block-level layouts & review their work....

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or VLSI Engineering. Expertise in high performance analog layout in advance CMOS process nodes Expertise in layouts of high performance and high speed analog blocks (ADC, DAC, PLL) Expertise in high speed SERDES is mandatory Expertise in analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology Expertise in physical verification checks DRC, LVS, DFM, ERC, EM, IR etc. Expertise in layout automation using SKILL / PERL / Python Location- Remote,Delhi NCR,Bengaluru,Chennai,Pune,Kolkata,Ahmedabad,Mumbai, Hyderabad

Lead Analog Layout Engineer Lead Analog Layout Engineer Experience8 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Ability to handle a team Preferred Skills: Scripting Knowledge of perl/shel...

Analog Layout Engineer Analog Layout Engineer Experience3 to 5 Years QualificationB.E / B. Tech / M.E / M. Tech ESSENTIAL DUTIES AND RESPONSIBILITIES: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job C...

Job Description Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1.Conduct verification of the module/ IP functionality and provide customer support a.Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b.Create test bench development and test case coding of the one or multiple module c.Write the codes or check the code as required d.Execute the test cases and debug the test cases if required e.Conduct functional coverage analysis and document the test cases inc...

About The Role Project Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Analog Layout Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Lead, you will engage in the development and configuration of software systems, either managing the entire process or focusing on specific stages of the product lifecycle. Your day will involve colla...

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Analog Layout Good to have skills : NAMinimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to perform maintenance and enhanc...

About The Role Project Role : Software Development Lead Project Role Description : Develop and configure software systems either end-to-end or for a specific stage of product lifecycle. Apply knowledge of technologies, applications, methodologies, processes and tools to support a client, project or entity. Must have skills : Analog Layout Good to have skills : NAMinimum 3 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Lead, you will engage in the development and configuration of software systems, either managing the entire process or focusing on specific stages of the product lifecycle. Your day will involve colla...

Analog / Custom Layout Design Engineer (TSMC 3nm | FinFET | Cadence | Calibre) Experience: 4 to 8 Years Location: Hyderabad Job Description: We are seeking a highly skilled Analog / Custom Layout Design Engineer to drive the design and development of critical analog, mixed-signal, and custom digital layouts , supporting full-chip level integration in advanced FinFET process technologies. You will be responsible for end-to-end layout execution from schematic translation and floor planning to verification and final sign-off — while collaborating closely with circuit designers, verification engineers, and project leads. Key Responsibilities: Design, develop, and implement analog, mixed-signal, ...

Educational Background • BE or MTech in Electronic/VLSI Engineering • 4 + year experience in analog/custom layout design in advanced CMOS process. NOTE: **custom layout or analog layout with TSMC 3nm/5nm7nm/16nm Finfet & 5+ exp **** TSMC 3nm Exp - MANDATORY. POINTERS TO BE CONSIDERED: 1. Candidate needs to be very clear about basic concepts. 2. He/She is expected to be really good at problem solving. 3. The candidate has to be able to challenge traditional way of doing layouts (Out of the box approach is needed). 4. Candidate needs to be able to work independently with minimal inputs. 5. Dedication, commitment and flexibility are very critical to achieve tight timelines without compromising

SYMPHISYS SOFTWARE CONSULTING is looking for SoC Verification Engineer Mixed Signal / High-Speed Interfaces to join our dynamic team and embark on a rewarding career journey Collaborate with cross-functional teams to achieve strategic outcomes Apply subject expertise to support operations, planning, and decision-making Utilize tools, analytics, or platforms relevant to the job domain Ensure compliance with policies while improving efficiency and outcomes Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official ch...

Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Excellent problem-solving skills in physical verification of custom layout. Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items....

Qualification/Requirements: Must have 1-6 Years of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be able to perform standard cell layout development and physical verification activities for complex designs as per provided specifications. Should have expertise in layout area and routing optimization, design rules, yield and reliability issues. Good understanding of layout fundamentals i.e., Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc. Should have adequate knowledge of schematics, in...

Duties & Responsibilities Responsible for the integration of mixed signal blocks in the IO, which includes generation of constraint files, floor planning and place and route of performance critical digital blocks in the IO signal path, and timing closure using STA. Develop and integrate custom mixed signal circuits for high-speed DDR and other IO applications in advanced FinFET nodes. Experience in place and route, timing closure is required. Work with the IO lead to understand the design requirements and translate them into circuit architectures, implement and simulate them. Work closely with layout engineers on floorplan, placement and routing of their designs. Create efficient power deliv...

Hands-on experience in developing Analog Layout /IO layout design Good exposure on FinFet layouts in lower nodes Expertise in using the best and latest features of Cadence and Calibre DRC/LVS Good exposure to ESD, LUP, antenna layout challenges, and analyzing/fixing EMIR issues Capable of working independently and with the team and getting work done The ability to work communicate effectively with global engineering teams Apply now Please enable JavaScript in your browser to complete this form. Name * Email * Phone * File Upload Click or drag a file to this area to upload. Comment Submit

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including fai...

As a Layout Engineer at GlobalFoundries Kolkata, you will work on gallium nitride and other power semiconductor technologies, contributing to custom p-cell development and layout of devices and circuits and supporting tapeout engineering work . We are looking for candidates with relevant work experience and good programming skills. Job role: Manual and automated l ayouts of analog/power devices and circuits Custom P-cell development Collaborate cross-functionally with Tech-Development, Design, PDK, and Ta peout Teams Document work progress through technical reports and presentations and to file patents Perform additional job-related tasks assigned by the direct manager Other Responsibilities...

As a Layout Engineer at GlobalFoundries Kolkata, you will work on gallium nitride and other power semiconductor technologies, contributing to custom p-cell development and layout of devices and circuits and supporting tapeout engineering work . We are looking for candidates with relevant work experience and good programming skills. Job role: Manual and automated l ayouts of analog/power devices and circuits Custom P-cell development Collaborate cross-functionally with Tech-Development, Design, PDK, and Ta peout Teams Document work progress through technical reports and presentations and to file patents Perform additional job-related tasks assigned by the direct manager Other Responsibilities...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

Role Overview: You are expected to execute any sized customer projects independently with minimum supervision and guide team members technically in any field of VLSI Frontend Backend or Analog design. As an Individual contributor, you will take ownership of any one or more tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc. and lead the team to achieve results. Your responsibilities will include completing assigned tasks successfully and on-time within the defined domain(s), anticipating, diagnosing, and resolving problems, coordinating with cross-functional teams as necessary, ensuring on-time quality...

The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm. Qualifications 10+ years experience in high performance analog layout in advance CMOS process nodes Experience with layouts of high performance and high speed analog blocks (such as ADC, DAC, PLL, and SERDES, for example) Experience with analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology Familiarity in various physical verification checks D...

Responsibilities: Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. • Ability to guide junior team-members in their execution of Sub block-level layouts & review cr...